//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Wed Jul 10 12:41:20 2013 (1373485280)
// Cuda compilation tools, release 5.5, V5.5.0
//

.version 3.2
.target sm_30
.address_size 64

	.file	1 "D:/singlebarrel/releases/2014.03/shared/adobe/MediaCore/Renderers/RendererGPU/Src/Effects/UltraKey.cu", 1399785316, 16463
	.file	2 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\mediacore\\external\\3rdparty\\nvidia\\cuda\\win\\include\\device_functions.h", 1399785281, 191626
	.file	3 "D:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\MediaCore\\GPUFoundation\\API\\Inc\\GPUFoundation/KernelSupport/KernelCore.h", 1399785310, 7840
.const .align 4 .b8 inParams[164];
// cuda_kernel_chokefilter_x$__cuda_local_var_169956_3088_non_const_data has been demoted
// cuda_kernel_chokefilter_y$__cuda_local_var_169956_4502_non_const_data has been demoted
.extern .shared .align 4 .b8 smem[];
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};

.visible .func  (.param .b32 func_retval0) _Z9ReadAlphaPK6float4i17DevicePixelFormat(
	.param .b64 _Z9ReadAlphaPK6float4i17DevicePixelFormat_param_0,
	.param .b32 _Z9ReadAlphaPK6float4i17DevicePixelFormat_param_1,
	.param .b32 _Z9ReadAlphaPK6float4i17DevicePixelFormat_param_2
)
{
	.reg .pred 	%p<2>;
	.reg .s16 	%rs<2>;
	.reg .s32 	%r<3>;
	.reg .f32 	%f<5>;
	.reg .s64 	%rd<6>;


	ld.param.u64 	%rd1, [_Z9ReadAlphaPK6float4i17DevicePixelFormat_param_0];
	ld.param.u32 	%r1, [_Z9ReadAlphaPK6float4i17DevicePixelFormat_param_1];
	ld.param.u32 	%r2, [_Z9ReadAlphaPK6float4i17DevicePixelFormat_param_2];
	.loc 1 19 1
	setp.eq.s32	%p1, %r2, 0;
	@%p1 bra 	BB0_2;

	mul.wide.s32 	%rd2, %r1, 16;
	add.s64 	%rd3, %rd1, %rd2;
	.loc 1 19 1
	ld.f32 	%f4, [%rd3+12];
	bra.uni 	BB0_3;

BB0_2:
	mul.wide.s32 	%rd4, %r1, 8;
	add.s64 	%rd5, %rd1, %rd4;
	.loc 1 19 1
	ld.u16 	%rs1, [%rd5+6];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f4, %temp;
	}

BB0_3:
	st.param.f32	[func_retval0+0], %f4;
	.loc 1 19 1
	ret;
}

.visible .func _Z6MinRowiP6float2Pf(
	.param .b32 _Z6MinRowiP6float2Pf_param_0,
	.param .b64 _Z6MinRowiP6float2Pf_param_1,
	.param .b64 _Z6MinRowiP6float2Pf_param_2
)
{
	.reg .pred 	%p<3>;
	.reg .s32 	%r<9>;
	.reg .f32 	%f<13>;
	.reg .s64 	%rd<14>;


	ld.param.s32 	%rd6, [_Z6MinRowiP6float2Pf_param_0];
	cvt.u32.u64	%r4, %rd6;
	ld.param.u64 	%rd4, [_Z6MinRowiP6float2Pf_param_1];
	ld.param.u64 	%rd5, [_Z6MinRowiP6float2Pf_param_2];
	not.b64 	%rd7, %rd6;
	shl.b64 	%rd8, %rd7, 2;
	add.s64 	%rd9, %rd5, %rd8;
	.loc 1 100 1
	ld.f32 	%f1, [%rd9];
	ld.f32 	%f12, [%rd9+4];
	.loc 1 100 1
	shl.b32 	%r1, %r4, 1;
	setp.lt.s32	%p1, %r1, 1;
	@%p1 bra 	BB1_3;

	mov.u32 	%r8, 0;
	mov.u32 	%r6, 2;
	sub.s32 	%r7, %r6, %r4;
	mul.wide.s32 	%rd10, %r7, 4;
	add.s64 	%rd13, %rd5, %rd10;

BB1_2:
	.loc 1 100 1
	ld.f32 	%f6, [%rd13+-4];
	.loc 2 2765 10
	min.ftz.f32 	%f7, %f12, %f6;
	.loc 1 100 1
	ld.f32 	%f8, [%rd13];
	.loc 2 2765 10
	min.ftz.f32 	%f12, %f7, %f8;
	add.s64 	%rd13, %rd13, 8;
	.loc 1 100 29
	add.s32 	%r8, %r8, 2;
	.loc 1 100 1
	setp.lt.s32	%p2, %r8, %r1;
	@%p2 bra 	BB1_2;

BB1_3:
	mul.wide.s32 	%rd11, %r4, 4;
	add.s64 	%rd12, %rd5, %rd11;
	.loc 1 100 1
	ld.f32 	%f9, [%rd12+4];
	.loc 2 2765 10
	min.ftz.f32 	%f10, %f1, %f9;
	.loc 2 2765 10
	min.ftz.f32 	%f11, %f10, %f12;
	.loc 1 100 15
	st.v2.f32 	[%rd4], {%f11, %f12};
	.loc 1 100 2
	ret;
}

.visible .func  (.param .align 8 .b8 func_retval0[8]) _Z9MinColumniP6float2(
	.param .b32 _Z9MinColumniP6float2_param_0,
	.param .b64 _Z9MinColumniP6float2_param_1
)
{
	.reg .pred 	%p<3>;
	.reg .s32 	%r<10>;
	.reg .f32 	%f<27>;
	.reg .s64 	%rd<14>;


	ld.param.s32 	%rd5, [_Z9MinColumniP6float2_param_0];
	cvt.u32.u64	%r5, %rd5;
	ld.param.u64 	%rd4, [_Z9MinColumniP6float2_param_1];
	.loc 1 100 1
	add.s32 	%r1, %r5, 1;
	not.b64 	%rd6, %rd5;
	shl.b64 	%rd7, %rd6, 3;
	add.s64 	%rd8, %rd4, %rd7;
	.loc 1 100 1
	ld.f32 	%f9, [%rd8];
	ld.v2.f32 	{%f10, %f11}, [%rd8+8];
	.loc 2 2765 10
	min.ftz.f32 	%f25, %f9, %f10;
	.loc 1 100 1
	shl.b32 	%r2, %r5, 1;
	setp.lt.s32	%p1, %r2, 1;
	.loc 1 100 1
	mov.f32 	%f26, %f11;
	.loc 1 100 1
	@%p1 bra 	BB2_3;

	mov.u32 	%r9, 0;
	mov.u32 	%r7, 2;
	sub.s32 	%r8, %r7, %r5;
	mul.wide.s32 	%rd9, %r8, 8;
	add.s64 	%rd10, %rd4, %rd9;
	add.s64 	%rd13, %rd10, 4;

BB2_2:
	.loc 1 100 1
	ld.v2.f32 	{%f13, %f14}, [%rd13+-12];
	.loc 2 2765 10
	min.ftz.f32 	%f16, %f25, %f13;
	.loc 2 2765 10
	min.ftz.f32 	%f18, %f26, %f14;
	.loc 1 100 1
	ld.v2.f32 	{%f19, %f20}, [%rd13+-4];
	.loc 2 2765 10
	min.ftz.f32 	%f25, %f16, %f19;
	min.ftz.f32 	%f26, %f18, %f20;
	add.s64 	%rd13, %rd13, 16;
	.loc 1 100 29
	add.s32 	%r9, %r9, 2;
	.loc 1 100 1
	setp.lt.s32	%p2, %r9, %r2;
	@%p2 bra 	BB2_2;

BB2_3:
	mul.wide.s32 	%rd11, %r1, 8;
	add.s64 	%rd12, %rd4, %rd11;
	.loc 1 100 1
	ld.f32 	%f23, [%rd12];
	.loc 2 2765 10
	min.ftz.f32 	%f24, %f25, %f23;
	st.param.f32	[func_retval0+0], %f24;
	st.param.f32	[func_retval0+4], %f26;
	.loc 1 100 1
	ret;
}

.visible .func  (.param .b32 func_retval0) _Z5clampIiET_S0_S0_S0_(
	.param .b32 _Z5clampIiET_S0_S0_S0__param_0,
	.param .b32 _Z5clampIiET_S0_S0_S0__param_1,
	.param .b32 _Z5clampIiET_S0_S0_S0__param_2
)
{
	.reg .s32 	%r<6>;


	ld.param.u32 	%r1, [_Z5clampIiET_S0_S0_S0__param_0];
	ld.param.u32 	%r2, [_Z5clampIiET_S0_S0_S0__param_1];
	ld.param.u32 	%r3, [_Z5clampIiET_S0_S0_S0__param_2];
	.loc 2 2642 10
	max.s32 	%r4, %r1, %r2;
	.loc 2 2621 10
	min.s32 	%r5, %r4, %r3;
	st.param.b32	[func_retval0+0], %r5;
	.loc 3 146 8
	ret;
}

.visible .entry cuda_kernel_chokefilter_x(
	.param .u64 cuda_kernel_chokefilter_x_param_0,
	.param .u64 cuda_kernel_chokefilter_x_param_1,
	.param .u32 cuda_kernel_chokefilter_x_param_2,
	.param .u32 cuda_kernel_chokefilter_x_param_3,
	.param .u32 cuda_kernel_chokefilter_x_param_4,
	.param .u32 cuda_kernel_chokefilter_x_param_5,
	.param .u32 cuda_kernel_chokefilter_x_param_6,
	.param .u32 cuda_kernel_chokefilter_x_param_7
)
{
	.reg .pred 	%p<15>;
	.reg .s16 	%rs<4>;
	.reg .s32 	%r<36>;
	.reg .f32 	%f<36>;
	.reg .s64 	%rd<39>;
	// demoted variable
	.shared .align 4 .b8 cuda_kernel_chokefilter_x$__cuda_local_var_169956_3088_non_const_data[1152];

	ld.param.u64 	%rd13, [cuda_kernel_chokefilter_x_param_0];
	ld.param.u64 	%rd14, [cuda_kernel_chokefilter_x_param_1];
	ld.param.u32 	%r15, [cuda_kernel_chokefilter_x_param_2];
	ld.param.u32 	%r16, [cuda_kernel_chokefilter_x_param_3];
	ld.param.u32 	%r12, [cuda_kernel_chokefilter_x_param_4];
	ld.param.u32 	%r13, [cuda_kernel_chokefilter_x_param_6];
	ld.param.u32 	%r14, [cuda_kernel_chokefilter_x_param_7];
	cvta.to.global.u64 	%rd15, %rd14;
	cvta.to.global.u64 	%rd1, %rd13;
	.loc 1 100 1
	mov.u32 	%r17, %ntid.x;
	mov.u32 	%r18, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r17, %r18, %r1;
	add.s32 	%r3, %r13, 1;
	mov.u32 	%r19, %ctaid.y;
	mad.lo.s32 	%r4, %r19, %r15, %r2;
	mad.lo.s32 	%r20, %r19, %r16, %r2;
	mul.wide.s32 	%rd16, %r20, 8;
	add.s64 	%rd2, %rd15, %rd16;
	.loc 1 100 1
	add.s32 	%r21, %r1, 16;
	mul.wide.s32 	%rd17, %r21, 4;
	mov.u64 	%rd18, cuda_kernel_chokefilter_x$__cuda_local_var_169956_3088_non_const_data;
	add.s64 	%rd3, %rd18, %rd17;
	add.s32 	%r22, %r1, %r13;
	mul.wide.s32 	%rd19, %r22, 4;
	add.s64 	%rd4, %rd18, %rd19;
	.loc 1 100 96
	not.b32 	%r23, %r13;
	add.s32 	%r24, %r1, %r23;
	mul.wide.s32 	%rd20, %r24, 4;
	add.s64 	%rd5, %rd18, %rd20;
	.loc 1 100 1
	setp.ge.s32	%p2, %r2, %r12;
	@%p2 bra 	BB4_16;

	.loc 1 19 1
	setp.eq.s32	%p3, %r14, 0;
	@%p3 bra 	BB4_3;

	mul.wide.s32 	%rd21, %r4, 16;
	add.s64 	%rd22, %rd1, %rd21;
	.loc 1 19 1
	ld.global.f32 	%f34, [%rd22+12];
	bra.uni 	BB4_4;

BB4_3:
	mul.wide.s32 	%rd23, %r4, 8;
	add.s64 	%rd24, %rd1, %rd23;
	.loc 1 19 1
	ld.global.u16 	%rs1, [%rd24+6];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f34, %temp;
	}

BB4_4:
	.loc 1 100 53
	st.shared.f32 	[%rd3], %f34;
	.loc 1 100 1
	setp.lt.s32	%p4, %r1, %r3;
	@%p4 bra 	BB4_11;

	.loc 1 100 1
	sub.s32 	%r26, %r17, %r3;
	setp.lt.s32	%p5, %r1, %r26;
	@%p5 bra 	BB4_16;

	.loc 1 100 1
	sub.s32 	%r27, %r12, %r3;
	setp.lt.s32	%p6, %r2, %r27;
	@%p6 bra 	BB4_8;

	.loc 1 100 1
	st.shared.f32 	[%rd4+68], %f34;
	bra.uni 	BB4_16;

BB4_8:
	.loc 1 100 1
	add.s32 	%r5, %r4, %r3;
	.loc 1 19 1
	@%p3 bra 	BB4_10;

	mul.wide.s32 	%rd25, %r5, 16;
	add.s64 	%rd26, %rd1, %rd25;
	.loc 1 19 1
	ld.global.f32 	%f4, [%rd26+12];
	.loc 1 100 93
	st.shared.f32 	[%rd4+68], %f4;
	bra.uni 	BB4_16;

BB4_10:
	mul.wide.s32 	%rd27, %r5, 8;
	add.s64 	%rd28, %rd1, %rd27;
	.loc 1 19 1
	ld.global.u16 	%rs2, [%rd28+6];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f5, %temp;
	}
	.loc 1 100 93
	st.shared.f32 	[%rd4+68], %f5;
	bra.uni 	BB4_16;

BB4_11:
	.loc 1 100 1
	setp.lt.s32	%p8, %r2, %r3;
	@%p8 bra 	BB4_15;

	.loc 1 100 1
	sub.s32 	%r6, %r4, %r3;
	.loc 1 19 1
	@%p3 bra 	BB4_14;

	mul.wide.s32 	%rd29, %r6, 16;
	add.s64 	%rd30, %rd1, %rd29;
	.loc 1 19 1
	ld.global.f32 	%f7, [%rd30+12];
	.loc 1 100 96
	st.shared.f32 	[%rd5+64], %f7;
	bra.uni 	BB4_16;

BB4_14:
	mul.wide.s32 	%rd31, %r6, 8;
	add.s64 	%rd32, %rd1, %rd31;
	.loc 1 19 1
	ld.global.u16 	%rs3, [%rd32+6];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f8, %temp;
	}
	.loc 1 100 96
	st.shared.f32 	[%rd5+64], %f8;
	bra.uni 	BB4_16;

BB4_15:
	.loc 1 100 1
	st.shared.f32 	[%rd5+64], %f34;

BB4_16:
	setp.lt.s32	%p1, %r2, %r12;
	.loc 1 100 1
	bar.sync 	0;
	.loc 1 100 1
	@!%p1 bra 	BB4_26;
	bra.uni 	BB4_17;

BB4_17:
	setp.lt.u32	%p10, %r13, 4;
	.loc 1 100 1
	shl.b32 	%r7, %r13, 1;
	.loc 1 100 1
	ld.shared.f32 	%f10, [%rd5+64];
	ld.shared.f32 	%f35, [%rd5+68];
	.loc 1 100 1
	@%p10 bra 	BB4_22;

	.loc 1 100 1
	setp.lt.s32	%p11, %r7, 1;
	@%p11 bra 	BB4_21;

	mov.u32 	%r34, 0;
	sub.s32 	%r29, %r1, %r13;
	add.s32 	%r30, %r29, 18;
	mul.wide.s32 	%rd33, %r30, 4;
	add.s64 	%rd37, %rd18, %rd33;

BB4_20:
	.loc 1 100 1
	ld.shared.f32 	%f18, [%rd37+-4];
	.loc 2 2765 10
	min.ftz.f32 	%f19, %f35, %f18;
	.loc 1 100 1
	ld.shared.f32 	%f20, [%rd37];
	.loc 2 2765 10
	min.ftz.f32 	%f35, %f19, %f20;
	add.s64 	%rd37, %rd37, 8;
	.loc 1 100 23
	add.s32 	%r34, %r34, 2;
	.loc 1 100 1
	setp.lt.s32	%p12, %r34, %r7;
	@%p12 bra 	BB4_20;

BB4_21:
	.loc 1 100 1
	ld.shared.f32 	%f21, [%rd4+68];
	.loc 2 2765 10
	min.ftz.f32 	%f22, %f10, %f21;
	.loc 2 2765 10
	min.ftz.f32 	%f23, %f22, %f35;
	.loc 1 100 54
	st.global.v2.f32 	[%rd2], {%f23, %f35};
	bra.uni 	BB4_26;

BB4_22:
	.loc 1 100 1
	setp.lt.s32	%p13, %r7, 1;
	@%p13 bra 	BB4_25;

	mov.u32 	%r35, 0;
	sub.s32 	%r32, %r1, %r13;
	add.s32 	%r33, %r32, 18;
	mul.wide.s32 	%rd35, %r33, 4;
	add.s64 	%rd38, %rd18, %rd35;

BB4_24:
	.loc 1 100 1
	ld.shared.f32 	%f24, [%rd38+-4];
	.loc 2 2765 10
	min.ftz.f32 	%f25, %f35, %f24;
	.loc 1 100 1
	ld.shared.f32 	%f26, [%rd38];
	.loc 2 2765 10
	min.ftz.f32 	%f35, %f25, %f26;
	add.s64 	%rd38, %rd38, 8;
	.loc 1 100 29
	add.s32 	%r35, %r35, 2;
	.loc 1 100 1
	setp.lt.s32	%p14, %r35, %r7;
	@%p14 bra 	BB4_24;

BB4_25:
	.loc 1 100 1
	ld.shared.f32 	%f27, [%rd4+68];
	.loc 2 2765 10
	min.ftz.f32 	%f28, %f10, %f27;
	.loc 2 2765 10
	min.ftz.f32 	%f29, %f28, %f35;
	.loc 1 100 15
	st.global.v2.f32 	[%rd2], {%f29, %f35};

BB4_26:
	.loc 1 100 2
	ret;
}

.visible .entry cuda_kernel_chokefilter_y(
	.param .u64 cuda_kernel_chokefilter_y_param_0,
	.param .u64 cuda_kernel_chokefilter_y_param_1,
	.param .u32 cuda_kernel_chokefilter_y_param_2,
	.param .u32 cuda_kernel_chokefilter_y_param_3,
	.param .u32 cuda_kernel_chokefilter_y_param_4,
	.param .u32 cuda_kernel_chokefilter_y_param_5,
	.param .u32 cuda_kernel_chokefilter_y_param_6,
	.param .f32 cuda_kernel_chokefilter_y_param_7,
	.param .u32 cuda_kernel_chokefilter_y_param_8,
	.param .u32 cuda_kernel_chokefilter_y_param_9,
	.param .u64 cuda_kernel_chokefilter_y_param_10
)
{
	.reg .pred 	%p<18>;
	.reg .s16 	%rs<2>;
	.reg .s32 	%r<50>;
	.reg .f32 	%f<75>;
	.reg .s64 	%rd<39>;
	// demoted variable
	.shared .align 8 .b8 cuda_kernel_chokefilter_y$__cuda_local_var_169956_4502_non_const_data[3200];

	ld.param.u64 	%rd11, [cuda_kernel_chokefilter_y_param_0];
	ld.param.u64 	%rd12, [cuda_kernel_chokefilter_y_param_1];
	ld.param.u32 	%r11, [cuda_kernel_chokefilter_y_param_2];
	ld.param.u32 	%r12, [cuda_kernel_chokefilter_y_param_3];
	ld.param.u32 	%r13, [cuda_kernel_chokefilter_y_param_4];
	ld.param.u32 	%r14, [cuda_kernel_chokefilter_y_param_5];
	ld.param.u32 	%r15, [cuda_kernel_chokefilter_y_param_6];
	ld.param.f32 	%f24, [cuda_kernel_chokefilter_y_param_7];
	ld.param.u32 	%r16, [cuda_kernel_chokefilter_y_param_8];
	ld.param.u32 	%r17, [cuda_kernel_chokefilter_y_param_9];
	cvta.to.global.u64 	%rd13, %rd11;
	.loc 1 100 1
	mov.u32 	%r18, %ntid.x;
	mov.u32 	%r19, %ctaid.x;
	mov.u32 	%r20, %tid.x;
	mad.lo.s32 	%r1, %r18, %r19, %r20;
	mov.u32 	%r21, %ntid.y;
	mov.u32 	%r22, %ctaid.y;
	mov.u32 	%r23, %tid.y;
	mad.lo.s32 	%r2, %r21, %r22, %r23;
	add.s32 	%r3, %r15, 1;
	mad.lo.s32 	%r4, %r2, %r11, %r1;
	mul.wide.s32 	%rd14, %r4, 8;
	add.s64 	%rd1, %rd13, %rd14;
	mad.lo.s32 	%r24, %r20, 25, %r23;
	mul.wide.s32 	%rd15, %r24, 8;
	mov.u64 	%rd16, cuda_kernel_chokefilter_y$__cuda_local_var_169956_4502_non_const_data;
	add.s64 	%rd2, %rd16, %rd15;
	.loc 1 100 1
	setp.lt.s32	%p1, %r1, %r13;
	setp.lt.s32	%p2, %r2, %r14;
	and.pred  	%p3, %p1, %p2;
	.loc 1 100 1
	not.b32 	%r25, %r15;
	add.s32 	%r26, %r24, %r25;
	mul.wide.s32 	%rd17, %r26, 8;
	add.s64 	%rd3, %rd16, %rd17;
	add.s32 	%r27, %r24, %r15;
	mul.wide.s32 	%rd18, %r27, 8;
	add.s64 	%rd4, %rd16, %rd18;
	.loc 1 100 1
	@!%p3 bra 	BB5_9;
	bra.uni 	BB5_1;

BB5_1:
	.loc 1 100 1
	ld.global.v2.f32 	{%f25, %f26}, [%rd1];
	st.shared.v2.f32 	[%rd2+64], {%f25, %f26};
	.loc 1 100 1
	setp.ge.s32	%p4, %r23, %r3;
	@%p4 bra 	BB5_5;

	.loc 1 100 1
	setp.lt.s32	%p5, %r2, %r3;
	@%p5 bra 	BB5_4;

	mad.lo.s32 	%r30, %r25, %r11, %r4;
	mul.wide.s32 	%rd20, %r30, 8;
	add.s64 	%rd21, %rd13, %rd20;
	.loc 1 100 1
	ld.global.v2.f32 	{%f27, %f28}, [%rd21];
	st.shared.v2.f32 	[%rd3+64], {%f27, %f28};
	bra.uni 	BB5_5;

BB5_4:
	.loc 1 100 1
	st.shared.v2.f32 	[%rd3+64], {%f25, %f26};

BB5_5:
	.loc 1 100 1
	sub.s32 	%r32, %r21, %r3;
	setp.lt.s32	%p6, %r23, %r32;
	@%p6 bra 	BB5_9;

	.loc 1 100 1
	sub.s32 	%r34, %r14, %r3;
	setp.lt.s32	%p7, %r2, %r34;
	@%p7 bra 	BB5_8;

	.loc 1 100 1
	ld.shared.v2.f32 	{%f31, %f32}, [%rd2+64];
	st.shared.v2.f32 	[%rd4+72], {%f31, %f32};
	bra.uni 	BB5_9;

BB5_8:
	mad.lo.s32 	%r35, %r3, %r11, %r4;
	mul.wide.s32 	%rd23, %r35, 8;
	add.s64 	%rd24, %rd13, %rd23;
	.loc 1 100 1
	ld.global.v2.f32 	{%f35, %f36}, [%rd24];
	st.shared.v2.f32 	[%rd4+72], {%f35, %f36};

BB5_9:
	.loc 1 100 1
	bar.sync 	0;
	setp.ge.s32	%p8, %r1, %r13;
	.loc 1 100 1
	setp.ge.s32	%p9, %r2, %r14;
	or.pred  	%p10, %p8, %p9;
	.loc 1 100 1
	@%p10 bra 	BB5_24;

	setp.lt.u32	%p11, %r15, 4;
	.loc 1 100 1
	shl.b32 	%r5, %r15, 1;
	.loc 1 100 1
	ld.shared.f32 	%f39, [%rd3+64];
	ld.shared.v2.f32 	{%f40, %f41}, [%rd3+72];
	.loc 2 2765 10
	min.ftz.f32 	%f71, %f39, %f40;
	.loc 1 100 1
	mov.f32 	%f73, %f41;
	.loc 1 100 1
	@%p11 bra 	BB5_15;

	.loc 1 100 1
	setp.lt.s32	%p12, %r5, 1;
	@%p12 bra 	BB5_14;

	mov.u32 	%r48, 0;
	sub.s32 	%r40, %r24, %r15;
	add.s32 	%r41, %r40, 10;
	mul.wide.s32 	%rd25, %r41, 8;
	add.s64 	%rd27, %rd16, %rd25;
	add.s64 	%rd37, %rd27, 4;

BB5_13:
	.loc 1 100 1
	ld.shared.v2.f32 	{%f43, %f44}, [%rd37+-12];
	.loc 2 2765 10
	min.ftz.f32 	%f46, %f71, %f43;
	min.ftz.f32 	%f48, %f73, %f44;
	.loc 1 100 1
	ld.shared.v2.f32 	{%f49, %f50}, [%rd37+-4];
	.loc 2 2765 10
	min.ftz.f32 	%f71, %f46, %f49;
	min.ftz.f32 	%f73, %f48, %f50;
	add.s64 	%rd37, %rd37, 16;
	.loc 1 100 23
	add.s32 	%r48, %r48, 2;
	.loc 1 100 1
	setp.lt.s32	%p13, %r48, %r5;
	@%p13 bra 	BB5_13;

BB5_14:
	.loc 1 100 1
	ld.shared.f32 	%f53, [%rd4+72];
	.loc 2 2765 10
	min.ftz.f32 	%f72, %f71, %f53;
	bra.uni 	BB5_19;

BB5_15:
	.loc 1 100 1
	setp.lt.s32	%p14, %r5, 1;
	@%p14 bra 	BB5_18;

	mov.u32 	%r49, 0;
	sub.s32 	%r46, %r24, %r15;
	add.s32 	%r47, %r46, 10;
	mul.wide.s32 	%rd28, %r47, 8;
	add.s64 	%rd30, %rd16, %rd28;
	add.s64 	%rd38, %rd30, 4;

BB5_17:
	.loc 1 100 1
	ld.shared.v2.f32 	{%f54, %f55}, [%rd38+-12];
	.loc 2 2765 10
	min.ftz.f32 	%f57, %f71, %f54;
	.loc 2 2765 10
	min.ftz.f32 	%f59, %f73, %f55;
	.loc 1 100 1
	ld.shared.v2.f32 	{%f60, %f61}, [%rd38+-4];
	.loc 2 2765 10
	min.ftz.f32 	%f71, %f57, %f60;
	min.ftz.f32 	%f73, %f59, %f61;
	add.s64 	%rd38, %rd38, 16;
	.loc 1 100 29
	add.s32 	%r49, %r49, 2;
	.loc 1 100 1
	setp.lt.s32	%p15, %r49, %r5;
	@%p15 bra 	BB5_17;

BB5_18:
	.loc 1 100 1
	ld.shared.f32 	%f64, [%rd4+72];
	.loc 2 2765 10
	min.ftz.f32 	%f72, %f71, %f64;

BB5_19:
	mov.f32 	%f65, 0f3F800000;
	.loc 1 100 1
	sub.ftz.f32 	%f66, %f65, %f24;
	mul.ftz.f32 	%f67, %f72, %f24;
	fma.rn.ftz.f32 	%f74, %f73, %f66, %f67;
	.loc 1 100 1
	setp.eq.s32	%p16, %r16, 0;
	@%p16 bra 	BB5_21;

	.loc 1 100 1
	ld.const.f32 	%f68, [inParams+140];
	ld.const.f32 	%f69, [inParams+144];
	fma.rn.ftz.f32 	%f70, %f74, %f68, %f69;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f74, %f70;

BB5_21:
	.loc 1 100 1
	mad.lo.s32 	%r10, %r2, %r12, %r1;
	.loc 1 100 1
	setp.eq.s32	%p17, %r17, 0;
	@%p17 bra 	BB5_23;

	cvta.to.global.u64 	%rd31, %rd12;
	mul.wide.s32 	%rd32, %r10, 16;
	add.s64 	%rd33, %rd31, %rd32;
	.loc 1 100 1
	st.global.f32 	[%rd33+12], %f74;
	bra.uni 	BB5_24;

BB5_23:
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f74;
	mov.b16 	%rs1, %temp;
}
	cvta.to.global.u64 	%rd34, %rd12;
	mul.wide.s32 	%rd35, %r10, 8;
	add.s64 	%rd36, %rd34, %rd35;
	.loc 1 100 41
	st.global.u16 	[%rd36+6], %rs1;

BB5_24:
	.loc 1 100 2
	ret;
}

.visible .entry BoxFilterKernel(
	.param .u64 BoxFilterKernel_param_0,
	.param .u32 BoxFilterKernel_param_1,
	.param .u32 BoxFilterKernel_param_2,
	.param .u32 BoxFilterKernel_param_3,
	.param .u32 BoxFilterKernel_param_4,
	.param .f32 BoxFilterKernel_param_5,
	.param .u32 BoxFilterKernel_param_6,
	.param .u64 BoxFilterKernel_param_7,
	.param .u64 BoxFilterKernel_param_8
)
{
	.reg .pred 	%p<21>;
	.reg .s16 	%rs<18>;
	.reg .s32 	%r<107>;
	.reg .f32 	%f<95>;
	.reg .s64 	%rd<60>;


	ld.param.u64 	%rd10, [BoxFilterKernel_param_0];
	ld.param.u32 	%r39, [BoxFilterKernel_param_1];
	ld.param.u32 	%r40, [BoxFilterKernel_param_2];
	ld.param.u32 	%r41, [BoxFilterKernel_param_3];
	ld.param.u32 	%r42, [BoxFilterKernel_param_4];
	ld.param.f32 	%f40, [BoxFilterKernel_param_5];
	ld.param.u32 	%r43, [BoxFilterKernel_param_6];
	cvta.to.global.u64 	%rd1, %rd10;
	.loc 1 100 1
	mov.u32 	%r44, %ctaid.x;
	shl.b32 	%r45, %r44, 7;
	mov.u32 	%r1, %tid.x;
	add.s32 	%r46, %r45, %r1;
	mov.u32 	%r47, %ctaid.y;
	mul.lo.s32 	%r105, %r47, 100;
	.loc 2 3251 10
	cvt.rzi.ftz.s32.f32	%r3, %f40;
	.loc 1 100 1
	shl.b32 	%r4, %r3, 1;
	add.s32 	%r48, %r4, 3;
	cvt.rn.f32.s32	%f41, %r4;
	add.ftz.f32 	%f42, %f41, 0f3F800000;
	add.ftz.f32 	%f43, %f42, 0f40000000;
	mul.ftz.f32 	%f1, %f42, %f42;
	mul.ftz.f32 	%f2, %f43, %f43;
	mul.lo.s32 	%r5, %r48, 160;
	not.b32 	%r49, %r3;
	add.s32 	%r104, %r105, %r49;
	add.s32 	%r50, %r46, -16;
	mov.u32 	%r103, 0;
	.loc 2 2642 10
	max.s32 	%r52, %r50, %r103;
	.loc 1 100 1
	add.s32 	%r53, %r41, -1;
	.loc 2 2621 10
	min.s32 	%r7, %r52, %r53;
	.loc 1 100 1
	setp.lt.s32	%p2, %r48, 1;
	@%p2 bra 	BB6_6;

	.loc 1 100 1
	add.s32 	%r8, %r42, -1;
	mul.wide.s32 	%rd11, %r1, 4;
	mov.u64 	%rd12, smem;
	add.s64 	%rd58, %rd12, %rd11;
	mov.u32 	%r54, 0;
	mov.u32 	%r99, %r54;

BB6_2:
	.loc 2 2642 10
	mov.u32 	%r9, %r99;
	max.s32 	%r56, %r104, %r54;
	.loc 2 2621 10
	min.s32 	%r57, %r56, %r8;
	.loc 1 100 156
	mad.lo.s32 	%r11, %r57, %r39, %r7;
	setp.eq.s32	%p3, %r40, 0;
	.loc 1 100 156
	@%p3 bra 	BB6_4;

	mul.wide.s32 	%rd13, %r11, 16;
	add.s64 	%rd14, %rd1, %rd13;
	ld.global.v4.f32 	{%f44, %f45, %f46, %f47}, [%rd14];
	mov.f32 	%f89, %f47;
	mov.f32 	%f5, %f46;
	mov.f32 	%f4, %f45;
	mov.f32 	%f3, %f44;
	bra.uni 	BB6_5;

BB6_4:
	mul.wide.s32 	%rd15, %r11, 8;
	add.s64 	%rd16, %rd1, %rd15;
	.loc 1 100 156
	ld.global.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd16];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f89, %temp;
	}

BB6_5:
	st.shared.f32 	[%rd58], %f89;
	.loc 1 100 1
	add.s32 	%r104, %r104, 1;
	add.s64 	%rd58, %rd58, 640;
	.loc 1 100 63
	add.s32 	%r13, %r9, 1;
	.loc 1 100 1
	setp.lt.s32	%p4, %r13, %r48;
	mov.u32 	%r99, %r13;
	@%p4 bra 	BB6_2;

BB6_6:
	.loc 1 100 1
	add.s32 	%r101, %r1, 160;
	add.s32 	%r16, %r4, 2;
	setp.gt.s32	%p5, %r16, 1;
	@%p5 bra 	BB6_8;

	mov.f32 	%f90, 0f00000000;
	bra.uni 	BB6_10;

BB6_8:
	add.s32 	%r60, %r1, 160;
	mul.wide.s32 	%rd17, %r60, 4;
	mov.u64 	%rd18, smem;
	add.s64 	%rd59, %rd18, %rd17;
	mov.f32 	%f90, 0f00000000;
	mov.u32 	%r100, 1;

BB6_9:
	.loc 1 100 1
	ld.shared.f32 	%f50, [%rd59];
	add.ftz.f32 	%f90, %f90, %f50;
	.loc 1 100 1
	add.s32 	%r101, %r101, 160;
	add.s64 	%rd59, %rd59, 640;
	.loc 1 100 69
	add.s32 	%r100, %r100, 1;
	.loc 1 100 1
	setp.lt.s32	%p6, %r100, %r16;
	@%p6 bra 	BB6_9;

BB6_10:
	add.s32 	%r61, %r1, %r5;
	mul.wide.s32 	%rd19, %r61, 4;
	mov.u64 	%rd20, smem;
	add.s64 	%rd21, %rd20, %rd19;
	.loc 1 100 1
	st.shared.f32 	[%rd21], %f90;
	mul.wide.s32 	%rd22, %r101, 4;
	add.s64 	%rd23, %rd20, %rd22;
	.loc 1 100 1
	ld.shared.f32 	%f51, [%rd23];
	add.ftz.f32 	%f52, %f90, %f51;
	mul.wide.s32 	%rd24, %r1, 4;
	add.s64 	%rd25, %rd20, %rd24;
	.loc 1 100 1
	ld.shared.f32 	%f53, [%rd25];
	add.ftz.f32 	%f54, %f52, %f53;
	add.s32 	%r22, %r5, 160;
	.loc 1 100 1
	st.shared.f32 	[%rd21+640], %f54;
	.loc 1 100 1
	bar.sync 	0;
	.loc 1 100 1
	setp.ge.s32	%p7, %r105, %r42;
	@%p7 bra 	BB6_26;

	mov.u32 	%r64, 16;
	.loc 1 100 1
	sub.s32 	%r65, %r64, %r3;
	add.s32 	%r23, %r65, %r1;
	add.s32 	%r66, %r23, %r22;
	add.s32 	%r67, %r66, -1;
	mul.wide.s32 	%rd26, %r67, 4;
	add.s64 	%rd8, %rd20, %rd26;
	.loc 1 100 1
	add.s32 	%r24, %r23, %r4;
	add.s32 	%r68, %r22, %r24;
	mul.wide.s32 	%rd28, %r68, 4;
	add.s64 	%rd9, %rd20, %rd28;
	.loc 1 100 1
	cvt.rn.f32.s32	%f55, %r3;
	sub.ftz.f32 	%f18, %f40, %f55;
	mov.u32 	%r102, %r103;

BB6_12:
	.loc 1 100 1
	mov.u32 	%r26, %r103;
	setp.lt.s32	%p8, %r1, 128;
	setp.lt.s32	%p9, %r46, %r41;
	and.pred  	%p10, %p8, %p9;
	.loc 1 100 1
	@!%p10 bra 	BB6_22;
	bra.uni 	BB6_13;

BB6_13:
	.loc 1 100 1
	mad.lo.s32 	%r29, %r4, 160, 480;
	mov.f32 	%f92, 0f00000000;
	.loc 1 100 1
	setp.gt.s32	%p11, %r4, -1;
	@%p11 bra 	BB6_15;

	mov.f32 	%f91, %f92;
	bra.uni 	BB6_17;

BB6_15:
	mov.f32 	%f91, %f92;
	mov.u32 	%r106, %r23;

BB6_16:
	.loc 1 100 1
	mov.u32 	%r30, %r106;
	add.s32 	%r73, %r30, %r29;
	mul.wide.s32 	%rd29, %r73, 4;
	add.s64 	%rd31, %rd20, %rd29;
	.loc 1 100 1
	ld.shared.f32 	%f58, [%rd31];
	add.ftz.f32 	%f92, %f92, %f58;
	ld.shared.f32 	%f59, [%rd31+640];
	add.ftz.f32 	%f91, %f91, %f59;
	add.s32 	%r31, %r30, 1;
	.loc 1 100 1
	setp.le.s32	%p12, %r31, %r24;
	mov.u32 	%r106, %r31;
	@%p12 bra 	BB6_16;

BB6_17:
	.loc 1 100 1
	ld.shared.f32 	%f62, [%rd9+4];
	ld.shared.f32 	%f63, [%rd8];
	add.ftz.f32 	%f64, %f63, %f62;
	add.ftz.f32 	%f65, %f91, %f64;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f66, %f65, %f2;
	mov.f32 	%f67, 0f3F800000;
	.loc 1 100 95
	sub.ftz.f32 	%f68, %f67, %f18;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f69, %f92, %f1;
	mul.ftz.f32 	%f70, %f68, %f69;
	fma.rn.ftz.f32 	%f93, %f18, %f66, %f70;
	setp.eq.s32	%p13, %r43, 0;
	.loc 1 100 1
	@%p13 bra 	BB6_19;

	.loc 1 100 1
	ld.const.f32 	%f71, [inParams+140];
	ld.const.f32 	%f72, [inParams+144];
	fma.rn.ftz.f32 	%f73, %f93, %f71, %f72;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f93, %f73;

BB6_19:
	.loc 1 100 1
	mad.lo.s32 	%r32, %r105, %r39, %r46;
	setp.eq.s32	%p14, %r40, 0;
	.loc 1 100 1
	@%p14 bra 	BB6_21;

	mul.wide.s32 	%rd33, %r32, 16;
	add.s64 	%rd34, %rd1, %rd33;
	.loc 1 100 1
	st.global.f32 	[%rd34+12], %f93;
	bra.uni 	BB6_22;

BB6_21:
	mul.wide.s32 	%rd36, %r32, 8;
	add.s64 	%rd37, %rd1, %rd36;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f93;
	mov.b16 	%rs9, %temp;
}
	.loc 1 100 47
	st.global.u16 	[%rd37+6], %rs9;

BB6_22:
	setp.eq.s32	%p1, %r40, 0;
	.loc 1 100 1
	bar.sync 	0;
	.loc 1 100 1
	add.s32 	%r78, %r26, 1;
	setp.lt.s32	%p15, %r78, %r48;
	selp.b32	%r79, 0, %r48, %p15;
	mov.u32 	%r80, 0;
	.loc 1 100 1
	sub.s32 	%r103, %r78, %r79;
	mad.lo.s32 	%r83, %r103, 160, %r1;
	mul.wide.s32 	%rd38, %r83, 4;
	add.s64 	%rd40, %rd20, %rd38;
	mad.lo.s32 	%r84, %r48, 160, %r1;
	mul.wide.s32 	%rd41, %r84, 4;
	add.s64 	%rd42, %rd20, %rd41;
	.loc 1 100 1
	ld.shared.f32 	%f74, [%rd42];
	ld.shared.f32 	%f75, [%rd40];
	sub.ftz.f32 	%f76, %f74, %f75;
	st.shared.f32 	[%rd42], %f76;
	mad.lo.s32 	%r85, %r26, 160, %r1;
	mul.wide.s32 	%rd43, %r85, 4;
	add.s64 	%rd44, %rd20, %rd43;
	.loc 1 100 1
	ld.shared.f32 	%f77, [%rd42+640];
	ld.shared.f32 	%f78, [%rd44];
	sub.ftz.f32 	%f79, %f77, %f78;
	st.shared.f32 	[%rd42+640], %f79;
	add.s32 	%r86, %r42, -1;
	.loc 2 2642 10
	max.s32 	%r87, %r104, %r80;
	.loc 2 2621 10
	min.s32 	%r88, %r87, %r86;
	.loc 1 100 156
	mad.lo.s32 	%r34, %r88, %r39, %r7;
	@%p1 bra 	BB6_24;

	mul.wide.s32 	%rd46, %r34, 16;
	add.s64 	%rd47, %rd1, %rd46;
	ld.global.v4.f32 	{%f80, %f81, %f82, %f83}, [%rd47];
	mov.f32 	%f94, %f83;
	mov.f32 	%f30, %f82;
	mov.f32 	%f29, %f81;
	mov.f32 	%f28, %f80;
	bra.uni 	BB6_25;

BB6_24:
	mul.wide.s32 	%rd49, %r34, 8;
	add.s64 	%rd50, %rd1, %rd49;
	.loc 1 100 156
	ld.global.v4.u16 	{%rs10, %rs11, %rs12, %rs13}, [%rd50];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs13;
	cvt.f32.f16 	%f94, %temp;
	}

BB6_25:
	mul.wide.s32 	%rd51, %r85, 4;
	add.s64 	%rd53, %rd20, %rd51;
	st.shared.f32 	[%rd53], %f94;
	.loc 1 100 1
	add.s32 	%r104, %r104, 1;
	mul.wide.s32 	%rd54, %r84, 4;
	add.s64 	%rd55, %rd20, %rd54;
	.loc 1 100 1
	ld.shared.f32 	%f84, [%rd55+640];
	add.ftz.f32 	%f85, %f84, %f94;
	st.shared.f32 	[%rd55+640], %f85;
	.loc 1 100 1
	add.s32 	%r92, %r4, %r26;
	.loc 1 100 1
	add.s32 	%r93, %r92, 2;
	setp.lt.s32	%p16, %r93, %r48;
	selp.b32	%r94, 0, %r48, %p16;
	sub.s32 	%r95, %r93, %r94;
	mad.lo.s32 	%r96, %r95, 160, %r1;
	mul.wide.s32 	%rd56, %r96, 4;
	add.s64 	%rd57, %rd20, %rd56;
	.loc 1 100 1
	ld.shared.f32 	%f86, [%rd55];
	ld.shared.f32 	%f87, [%rd57];
	add.ftz.f32 	%f88, %f86, %f87;
	st.shared.f32 	[%rd55], %f88;
	.loc 1 100 1
	bar.sync 	0;
	.loc 1 100 19
	add.s32 	%r102, %r102, 1;
	.loc 1 100 1
	setp.lt.s32	%p17, %r102, 100;
	.loc 1 100 1
	add.s32 	%r105, %r105, 1;
	.loc 1 100 1
	setp.lt.s32	%p18, %r105, %r42;
	.loc 1 100 1
	and.pred  	%p19, %p17, %p18;
	@%p19 bra 	BB6_12;

BB6_26:
	.loc 1 100 2
	ret;
}

.visible .entry cuda_kernel_composite(
	.param .u64 cuda_kernel_composite_param_0,
	.param .u64 cuda_kernel_composite_param_1,
	.param .u32 cuda_kernel_composite_param_2,
	.param .u32 cuda_kernel_composite_param_3,
	.param .u32 cuda_kernel_composite_param_4,
	.param .u32 cuda_kernel_composite_param_5,
	.param .u32 cuda_kernel_composite_param_6,
	.param .u32 cuda_kernel_composite_param_7,
	.param .u64 cuda_kernel_composite_param_8
)
{
	.reg .pred 	%p<21>;
	.reg .s16 	%rs<13>;
	.reg .s32 	%r<17>;
	.reg .f32 	%f<251>;
	.reg .s64 	%rd<14>;


	ld.param.u64 	%rd3, [cuda_kernel_composite_param_0];
	ld.param.u64 	%rd2, [cuda_kernel_composite_param_1];
	ld.param.u32 	%r9, [cuda_kernel_composite_param_2];
	ld.param.u32 	%r10, [cuda_kernel_composite_param_3];
	ld.param.u32 	%r5, [cuda_kernel_composite_param_4];
	ld.param.u32 	%r6, [cuda_kernel_composite_param_5];
	ld.param.u32 	%r7, [cuda_kernel_composite_param_6];
	ld.param.u32 	%r8, [cuda_kernel_composite_param_7];
	cvta.to.global.u64 	%rd1, %rd3;
	.loc 1 100 1
	mov.u32 	%r11, %ntid.x;
	mov.u32 	%r12, %ctaid.x;
	mov.u32 	%r13, %tid.x;
	mad.lo.s32 	%r1, %r11, %r12, %r13;
	mov.u32 	%r14, %ntid.y;
	mov.u32 	%r15, %ctaid.y;
	mov.u32 	%r16, %tid.y;
	mad.lo.s32 	%r2, %r14, %r15, %r16;
	.loc 1 100 1
	setp.ge.s32	%p1, %r2, %r10;
	setp.ge.s32	%p2, %r1, %r9;
	or.pred  	%p3, %p2, %p1;
	.loc 1 100 1
	@%p3 bra 	BB7_39;

	.loc 1 100 1
	mad.lo.s32 	%r3, %r2, %r5, %r1;
	setp.eq.s32	%p4, %r8, 0;
	@%p4 bra 	BB7_3;

	mul.wide.s32 	%rd4, %r3, 16;
	add.s64 	%rd5, %rd1, %rd4;
	ld.global.v4.f32 	{%f70, %f71, %f72, %f73}, [%rd5];
	mov.f32 	%f243, %f73;
	mov.f32 	%f242, %f72;
	mov.f32 	%f241, %f71;
	mov.f32 	%f240, %f70;
	bra.uni 	BB7_4;

BB7_3:
	mul.wide.s32 	%rd6, %r3, 8;
	add.s64 	%rd7, %rd1, %rd6;
	.loc 1 100 1
	ld.global.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd7];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f240, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f241, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f242, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f243, %temp;
	}

BB7_4:
	ld.const.f32 	%f16, [inParams+148];
	ld.const.f32 	%f17, [inParams+152];
	ld.const.f32 	%f18, [inParams+156];
	ld.const.f32 	%f19, [inParams+160];
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f20, %f240;
	setp.gt.ftz.f32	%p5, %f20, 0f3D25AEE6;
	@%p5 bra 	BB7_6;

	mov.f32 	%f74, 0f414EB852;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f244, %f20, %f74;
	bra.uni 	BB7_9;

BB7_6:
	add.ftz.f32 	%f75, %f20, 0f3D6147AE;
	mov.f32 	%f76, 0f3F870A3D;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f22, %f75, %f76;
	setp.ltu.ftz.f32	%p6, %f22, 0f00000000;
	@%p6 bra 	BB7_8;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f77, %f22;
	mul.ftz.f32 	%f78, %f77, 0f4019999A;
	ex2.approx.ftz.f32 	%f244, %f78;
	bra.uni 	BB7_9;

BB7_8:
	neg.ftz.f32 	%f79, %f22;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f80, %f79;
	mul.ftz.f32 	%f81, %f80, 0f4019999A;
	ex2.approx.ftz.f32 	%f82, %f81;
	neg.ftz.f32 	%f244, %f82;

BB7_9:
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f26, %f241;
	setp.gt.ftz.f32	%p7, %f26, 0f3D25AEE6;
	@%p7 bra 	BB7_11;

	mov.f32 	%f83, 0f414EB852;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f245, %f26, %f83;
	bra.uni 	BB7_14;

BB7_11:
	add.ftz.f32 	%f84, %f26, 0f3D6147AE;
	mov.f32 	%f85, 0f3F870A3D;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f28, %f84, %f85;
	setp.ltu.ftz.f32	%p8, %f28, 0f00000000;
	@%p8 bra 	BB7_13;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f86, %f28;
	mul.ftz.f32 	%f87, %f86, 0f4019999A;
	ex2.approx.ftz.f32 	%f245, %f87;
	bra.uni 	BB7_14;

BB7_13:
	neg.ftz.f32 	%f88, %f28;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f89, %f88;
	mul.ftz.f32 	%f90, %f89, 0f4019999A;
	ex2.approx.ftz.f32 	%f91, %f90;
	neg.ftz.f32 	%f245, %f91;

BB7_14:
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f32, %f242;
	setp.gt.ftz.f32	%p9, %f32, 0f3D25AEE6;
	@%p9 bra 	BB7_16;

	mov.f32 	%f92, 0f414EB852;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f246, %f32, %f92;
	bra.uni 	BB7_19;

BB7_16:
	add.ftz.f32 	%f93, %f32, 0f3D6147AE;
	mov.f32 	%f94, 0f3F870A3D;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f34, %f93, %f94;
	setp.ltu.ftz.f32	%p10, %f34, 0f00000000;
	@%p10 bra 	BB7_18;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f95, %f34;
	mul.ftz.f32 	%f96, %f95, 0f4019999A;
	ex2.approx.ftz.f32 	%f246, %f96;
	bra.uni 	BB7_19;

BB7_18:
	neg.ftz.f32 	%f97, %f34;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f98, %f97;
	mul.ftz.f32 	%f99, %f98, 0f4019999A;
	ex2.approx.ftz.f32 	%f100, %f99;
	neg.ftz.f32 	%f246, %f100;

BB7_19:
	ld.const.f32 	%f101, [inParams+40];
	ld.const.f32 	%f102, [inParams+44];
	mul.ftz.f32 	%f103, %f245, %f102;
	fma.rn.ftz.f32 	%f104, %f246, %f101, %f103;
	ld.const.f32 	%f105, [inParams+48];
	fma.rn.ftz.f32 	%f106, %f244, %f105, %f104;
	ld.const.f32 	%f107, [inParams+52];
	ld.const.f32 	%f108, [inParams+56];
	mul.ftz.f32 	%f109, %f245, %f108;
	fma.rn.ftz.f32 	%f110, %f246, %f107, %f109;
	ld.const.f32 	%f111, [inParams+60];
	fma.rn.ftz.f32 	%f112, %f244, %f111, %f110;
	ld.const.f32 	%f113, [inParams+64];
	ld.const.f32 	%f114, [inParams+68];
	mul.ftz.f32 	%f115, %f245, %f114;
	fma.rn.ftz.f32 	%f116, %f246, %f113, %f115;
	ld.const.f32 	%f117, [inParams+72];
	fma.rn.ftz.f32 	%f118, %f244, %f117, %f116;
	mov.f32 	%f119, 0f02081CEA;
	.loc 2 2770 10
	max.ftz.f32 	%f120, %f118, %f119;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f121, %f106, %f120;
	div.approx.ftz.f32 	%f122, %f112, %f120;
	sub.ftz.f32 	%f123, %f121, %f16;
	sub.ftz.f32 	%f124, %f122, %f17;
	sub.ftz.f32 	%f125, %f120, %f18;
	mul.ftz.f32 	%f126, %f124, %f124;
	fma.rn.ftz.f32 	%f127, %f123, %f123, %f126;
	.loc 2 2770 10
	max.ftz.f32 	%f128, %f127, %f119;
	.loc 2 2775 10
	rsqrt.approx.ftz.f32 	%f129, %f128;
	mul.ftz.f32 	%f130, %f124, %f17;
	fma.rn.ftz.f32 	%f131, %f123, %f16, %f130;
	mul.ftz.f32 	%f132, %f19, %f129;
	mul.ftz.f32 	%f133, %f131, %f132;
	setp.gt.ftz.f32	%p11, %f133, 0f00000000;
	ld.const.f32 	%f134, [inParams+8];
	mul.ftz.f32 	%f135, %f133, %f134;
	add.ftz.f32 	%f136, %f133, 0f3F800000;
	mov.f32 	%f137, 0f3F800000;
	mul.ftz.f32 	%f138, %f136, %f134;
	selp.f32	%f139, %f135, 0f00000000, %p11;
	selp.f32	%f140, %f134, %f138, %p11;
	sub.ftz.f32 	%f141, %f137, %f139;
	sub.ftz.f32 	%f142, %f137, %f140;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f143, %f137, %f129;
	mul.ftz.f32 	%f144, %f143, %f19;
	mul.ftz.f32 	%f145, %f141, %f144;
	mul.ftz.f32 	%f146, %f142, %f144;
	ld.const.f32 	%f147, [inParams];
	mul.ftz.f32 	%f148, %f146, %f147;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f149, %f148;
	.loc 2 2770 10
	max.ftz.f32 	%f150, %f149, %f119;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f151, %f137, %f150;
	add.ftz.f32 	%f152, %f151, 0fBF800000;
	ld.const.f32 	%f153, [inParams+4];
	fma.rn.ftz.f32 	%f154, %f153, %f152, %f152;
	fma.rn.ftz.f32 	%f155, %f123, %f154, %f121;
	fma.rn.ftz.f32 	%f156, %f124, %f154, %f122;
	ld.const.f32 	%f157, [inParams+12];
	mul.ftz.f32 	%f158, %f146, %f157;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f159, %f158;
	mul.ftz.f32 	%f160, %f155, %f159;
	mul.ftz.f32 	%f161, %f156, %f159;
	ld.const.f32 	%f162, [inParams+16];
	mul.ftz.f32 	%f163, %f145, %f162;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f164, %f163;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f165, %f125, %f18;
	setp.lt.ftz.f32	%p12, %f165, 0f00000000;
	ld.const.f32 	%f166, [inParams+24];
	ld.const.f32 	%f167, [inParams+20];
	selp.f32	%f168, %f167, %f166, %p12;
	.loc 2 2820 3
	mul.ftz.f32 	%f169, %f165, %f168;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f170, %f169;
	add.ftz.f32 	%f171, %f164, %f170;
	mul.ftz.f32 	%f172, %f164, %f170;
	sub.ftz.f32 	%f173, %f171, %f172;
	.loc 2 2770 10
	max.ftz.f32 	%f174, %f173, %f119;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f175, %f137, %f174;
	add.ftz.f32 	%f176, %f175, 0fBF800000;
	ld.const.f32 	%f177, [inParams+28];
	mul.ftz.f32 	%f178, %f176, %f177;
	fma.rn.ftz.f32 	%f38, %f125, %f178, %f120;
	ld.const.f32 	%f179, [inParams+32];
	mul.ftz.f32 	%f180, %f173, %f179;
	ld.const.f32 	%f181, [inParams+36];
	sub.ftz.f32 	%f182, %f180, %f181;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f39, %f182;
	mul.ftz.f32 	%f40, %f160, %f38;
	mul.ftz.f32 	%f41, %f161, %f38;
	ld.const.f32 	%f183, [inParams+100];
	ld.const.f32 	%f184, [inParams+104];
	mul.ftz.f32 	%f185, %f41, %f184;
	fma.rn.ftz.f32 	%f186, %f40, %f183, %f185;
	ld.const.f32 	%f187, [inParams+108];
	fma.rn.ftz.f32 	%f188, %f38, %f187, %f186;
	ld.const.f32 	%f189, [inParams+112];
	add.ftz.f32 	%f190, %f188, %f189;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f42, %f190;
	setp.lt.ftz.f32	%p13, %f42, 0f3B4D2E1C;
	@%p13 bra 	BB7_23;

	setp.ltu.ftz.f32	%p14, %f42, 0f00000000;
	@%p14 bra 	BB7_22;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f191, %f42;
	mul.ftz.f32 	%f192, %f191, 0f3ED55476;
	ex2.approx.ftz.f32 	%f43, %f192;
	fma.rn.ftz.f32 	%f247, %f43, 0f3F870A3D, 0fBD6147AE;
	bra.uni 	BB7_24;

BB7_22:
	neg.ftz.f32 	%f193, %f42;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f194, %f193;
	mul.ftz.f32 	%f195, %f194, 0f3ED55476;
	ex2.approx.ftz.f32 	%f196, %f195;
	neg.ftz.f32 	%f44, %f196;
	fma.rn.ftz.f32 	%f247, %f44, 0f3F870A3D, 0fBD6147AE;
	bra.uni 	BB7_24;

BB7_23:
	mul.ftz.f32 	%f247, %f42, 0f414EB852;

BB7_24:
	ld.const.f32 	%f197, [inParams+88];
	ld.const.f32 	%f198, [inParams+92];
	mul.ftz.f32 	%f199, %f41, %f198;
	fma.rn.ftz.f32 	%f200, %f40, %f197, %f199;
	ld.const.f32 	%f201, [inParams+96];
	fma.rn.ftz.f32 	%f202, %f38, %f201, %f200;
	ld.const.f32 	%f203, [inParams+116];
	add.ftz.f32 	%f204, %f202, %f203;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f49, %f204;
	setp.lt.ftz.f32	%p15, %f49, 0f3B4D2E1C;
	@%p15 bra 	BB7_28;

	setp.ltu.ftz.f32	%p16, %f49, 0f00000000;
	@%p16 bra 	BB7_27;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f205, %f49;
	mul.ftz.f32 	%f206, %f205, 0f3ED55476;
	ex2.approx.ftz.f32 	%f50, %f206;
	fma.rn.ftz.f32 	%f248, %f50, 0f3F870A3D, 0fBD6147AE;
	bra.uni 	BB7_29;

BB7_27:
	neg.ftz.f32 	%f207, %f49;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f208, %f207;
	mul.ftz.f32 	%f209, %f208, 0f3ED55476;
	ex2.approx.ftz.f32 	%f210, %f209;
	neg.ftz.f32 	%f51, %f210;
	fma.rn.ftz.f32 	%f248, %f51, 0f3F870A3D, 0fBD6147AE;
	bra.uni 	BB7_29;

BB7_28:
	mul.ftz.f32 	%f248, %f49, 0f414EB852;

BB7_29:
	ld.const.f32 	%f211, [inParams+76];
	ld.const.f32 	%f212, [inParams+80];
	mul.ftz.f32 	%f213, %f41, %f212;
	fma.rn.ftz.f32 	%f214, %f40, %f211, %f213;
	ld.const.f32 	%f215, [inParams+84];
	fma.rn.ftz.f32 	%f216, %f38, %f215, %f214;
	ld.const.f32 	%f217, [inParams+120];
	add.ftz.f32 	%f218, %f216, %f217;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f56, %f218;
	setp.lt.ftz.f32	%p17, %f56, 0f3B4D2E1C;
	@%p17 bra 	BB7_33;

	setp.ltu.ftz.f32	%p18, %f56, 0f00000000;
	@%p18 bra 	BB7_32;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f219, %f56;
	mul.ftz.f32 	%f220, %f219, 0f3ED55476;
	ex2.approx.ftz.f32 	%f57, %f220;
	fma.rn.ftz.f32 	%f249, %f57, 0f3F870A3D, 0fBD6147AE;
	bra.uni 	BB7_34;

BB7_32:
	neg.ftz.f32 	%f221, %f56;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f222, %f221;
	mul.ftz.f32 	%f223, %f222, 0f3ED55476;
	ex2.approx.ftz.f32 	%f224, %f223;
	neg.ftz.f32 	%f58, %f224;
	fma.rn.ftz.f32 	%f249, %f58, 0f3F870A3D, 0fBD6147AE;
	bra.uni 	BB7_34;

BB7_33:
	mul.ftz.f32 	%f249, %f56, 0f414EB852;

BB7_34:
	mul.ftz.f32 	%f250, %f243, %f39;
	.loc 1 100 1
	setp.eq.s32	%p19, %r7, 0;
	@%p19 bra 	BB7_36;

	.loc 1 100 1
	ld.const.f32 	%f225, [inParams+140];
	ld.const.f32 	%f226, [inParams+144];
	fma.rn.ftz.f32 	%f227, %f250, %f225, %f226;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f250, %f227;

BB7_36:
	.loc 1 100 1
	mad.lo.s32 	%r4, %r2, %r6, %r1;
	.loc 1 100 1
	@%p4 bra 	BB7_38;

	cvta.to.global.u64 	%rd8, %rd2;
	mul.wide.s32 	%rd9, %r4, 16;
	add.s64 	%rd10, %rd8, %rd9;
	.loc 1 100 1
	st.global.v4.f32 	[%rd10], {%f247, %f248, %f249, %f250};
	bra.uni 	BB7_39;

BB7_38:
	cvta.to.global.u64 	%rd11, %rd2;
	mul.wide.s32 	%rd12, %r4, 8;
	add.s64 	%rd13, %rd11, %rd12;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f247;
	mov.b16 	%rs9, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f248;
	mov.b16 	%rs10, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f249;
	mov.b16 	%rs11, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f250;
	mov.b16 	%rs12, %temp;
}
	.loc 1 100 242
	st.global.v4.u16 	[%rd13], {%rs9, %rs10, %rs11, %rs12};

BB7_39:
	.loc 1 100 2
	ret;
}

.visible .entry cuda_kernel_showAlpha(
	.param .u64 cuda_kernel_showAlpha_param_0,
	.param .u64 cuda_kernel_showAlpha_param_1,
	.param .u32 cuda_kernel_showAlpha_param_2,
	.param .u32 cuda_kernel_showAlpha_param_3,
	.param .u32 cuda_kernel_showAlpha_param_4,
	.param .u32 cuda_kernel_showAlpha_param_5,
	.param .u32 cuda_kernel_showAlpha_param_6
)
{
	.reg .pred 	%p<6>;
	.reg .s16 	%rs<11>;
	.reg .s32 	%r<16>;
	.reg .f32 	%f<24>;
	.reg .s64 	%rd<13>;


	ld.param.u64 	%rd3, [cuda_kernel_showAlpha_param_0];
	ld.param.u64 	%rd4, [cuda_kernel_showAlpha_param_1];
	ld.param.u32 	%r8, [cuda_kernel_showAlpha_param_2];
	ld.param.u32 	%r9, [cuda_kernel_showAlpha_param_3];
	ld.param.u32 	%r5, [cuda_kernel_showAlpha_param_4];
	ld.param.u32 	%r6, [cuda_kernel_showAlpha_param_5];
	ld.param.u32 	%r7, [cuda_kernel_showAlpha_param_6];
	cvta.to.global.u64 	%rd1, %rd4;
	cvta.to.global.u64 	%rd2, %rd3;
	.loc 1 100 1
	mov.u32 	%r10, %ntid.x;
	mov.u32 	%r11, %ctaid.x;
	mov.u32 	%r12, %tid.x;
	mad.lo.s32 	%r1, %r10, %r11, %r12;
	mov.u32 	%r13, %ntid.y;
	mov.u32 	%r14, %ctaid.y;
	mov.u32 	%r15, %tid.y;
	mad.lo.s32 	%r2, %r13, %r14, %r15;
	.loc 1 100 1
	setp.ge.s32	%p1, %r2, %r9;
	setp.ge.s32	%p2, %r1, %r8;
	or.pred  	%p3, %p2, %p1;
	.loc 1 100 1
	@%p3 bra 	BB8_7;

	.loc 1 100 1
	mad.lo.s32 	%r3, %r2, %r5, %r1;
	setp.eq.s32	%p4, %r7, 0;
	@%p4 bra 	BB8_3;

	mul.wide.s32 	%rd5, %r3, 16;
	add.s64 	%rd6, %rd2, %rd5;
	ld.global.v4.f32 	{%f18, %f19, %f20, %f21}, [%rd6];
	mov.f32 	%f23, %f21;
	mov.f32 	%f3, %f20;
	mov.f32 	%f2, %f19;
	mov.f32 	%f1, %f18;
	bra.uni 	BB8_4;

BB8_3:
	mul.wide.s32 	%rd7, %r3, 8;
	add.s64 	%rd8, %rd2, %rd7;
	.loc 1 100 1
	ld.global.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd8];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f23, %temp;
	}

BB8_4:
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f14, %f23;
	mov.f32 	%f17, 0f3F800000;
	.loc 1 100 1
	mad.lo.s32 	%r4, %r2, %r6, %r1;
	.loc 1 100 1
	@%p4 bra 	BB8_6;

	mul.wide.s32 	%rd9, %r4, 16;
	add.s64 	%rd10, %rd1, %rd9;
	.loc 1 100 1
	st.global.v4.f32 	[%rd10], {%f14, %f14, %f14, %f17};
	bra.uni 	BB8_7;

BB8_6:
	mul.wide.s32 	%rd11, %r4, 8;
	add.s64 	%rd12, %rd1, %rd11;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f14;
	mov.b16 	%rs9, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f17;
	mov.b16 	%rs10, %temp;
}
	.loc 1 100 242
	st.global.v4.u16 	[%rd12], {%rs9, %rs9, %rs9, %rs10};

BB8_7:
	.loc 1 100 2
	ret;
}

.visible .entry cuda_kernel_showColor(
	.param .u64 cuda_kernel_showColor_param_0,
	.param .u64 cuda_kernel_showColor_param_1,
	.param .u32 cuda_kernel_showColor_param_2,
	.param .u32 cuda_kernel_showColor_param_3,
	.param .u32 cuda_kernel_showColor_param_4,
	.param .u32 cuda_kernel_showColor_param_5,
	.param .u32 cuda_kernel_showColor_param_6
)
{
	.reg .pred 	%p<6>;
	.reg .s16 	%rs<13>;
	.reg .s32 	%r<16>;
	.reg .f32 	%f<30>;
	.reg .s64 	%rd<13>;


	ld.param.u64 	%rd3, [cuda_kernel_showColor_param_0];
	ld.param.u64 	%rd4, [cuda_kernel_showColor_param_1];
	ld.param.u32 	%r8, [cuda_kernel_showColor_param_2];
	ld.param.u32 	%r9, [cuda_kernel_showColor_param_3];
	ld.param.u32 	%r5, [cuda_kernel_showColor_param_4];
	ld.param.u32 	%r6, [cuda_kernel_showColor_param_5];
	ld.param.u32 	%r7, [cuda_kernel_showColor_param_6];
	cvta.to.global.u64 	%rd1, %rd4;
	cvta.to.global.u64 	%rd2, %rd3;
	.loc 1 100 1
	mov.u32 	%r10, %ntid.x;
	mov.u32 	%r11, %ctaid.x;
	mov.u32 	%r12, %tid.x;
	mad.lo.s32 	%r1, %r10, %r11, %r12;
	mov.u32 	%r13, %ntid.y;
	mov.u32 	%r14, %ctaid.y;
	mov.u32 	%r15, %tid.y;
	mad.lo.s32 	%r2, %r13, %r14, %r15;
	.loc 1 100 1
	setp.ge.s32	%p1, %r2, %r9;
	setp.ge.s32	%p2, %r1, %r8;
	or.pred  	%p3, %p2, %p1;
	.loc 1 100 1
	@%p3 bra 	BB9_7;

	.loc 1 100 1
	mad.lo.s32 	%r3, %r2, %r5, %r1;
	setp.eq.s32	%p4, %r7, 0;
	@%p4 bra 	BB9_3;

	mul.wide.s32 	%rd5, %r3, 16;
	add.s64 	%rd6, %rd2, %rd5;
	ld.global.v4.f32 	{%f20, %f21, %f22, %f23}, [%rd6];
	mov.f32 	%f29, %f23;
	mov.f32 	%f28, %f22;
	mov.f32 	%f27, %f21;
	mov.f32 	%f26, %f20;
	bra.uni 	BB9_4;

BB9_3:
	mul.wide.s32 	%rd7, %r3, 8;
	add.s64 	%rd8, %rd2, %rd7;
	.loc 1 100 1
	ld.global.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd8];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f26, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f27, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f28, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f29, %temp;
	}

BB9_4:
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f24, %f29;
	.loc 1 100 1
	mul.ftz.f32 	%f16, %f26, %f24;
	mul.ftz.f32 	%f17, %f27, %f24;
	mul.ftz.f32 	%f18, %f28, %f24;
	mov.f32 	%f19, 0f3F800000;
	.loc 1 100 1
	mad.lo.s32 	%r4, %r2, %r6, %r1;
	.loc 1 100 1
	@%p4 bra 	BB9_6;

	mul.wide.s32 	%rd9, %r4, 16;
	add.s64 	%rd10, %rd1, %rd9;
	.loc 1 100 1
	st.global.v4.f32 	[%rd10], {%f16, %f17, %f18, %f19};
	bra.uni 	BB9_7;

BB9_6:
	mul.wide.s32 	%rd11, %r4, 8;
	add.s64 	%rd12, %rd1, %rd11;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f16;
	mov.b16 	%rs9, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f17;
	mov.b16 	%rs10, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f18;
	mov.b16 	%rs11, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f19;
	mov.b16 	%rs12, %temp;
}
	.loc 1 100 242
	st.global.v4.u16 	[%rd12], {%rs9, %rs10, %rs11, %rs12};

BB9_7:
	.loc 1 100 2
	ret;
}


