//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Wed Jul 10 12:41:20 2013 (1373485280)
// Cuda compilation tools, release 5.5, V5.5.0
//

.version 3.2
.target sm_30
.address_size 64

	.file	1 "D:/singlebarrel/releases/2014.03/shared/adobe/MediaCore/GPUFoundation/Src/ImageProcessing/Memory.cu", 1399785311, 2754
	.file	2 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\mediacore\\external\\3rdparty\\nvidia\\cuda\\win\\include\\device_functions.h", 1399785281, 191626
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};

.visible .entry CopyMemory2DKernel(
	.param .u64 CopyMemory2DKernel_param_0,
	.param .u32 CopyMemory2DKernel_param_1,
	.param .u32 CopyMemory2DKernel_param_2,
	.param .u64 CopyMemory2DKernel_param_3,
	.param .u32 CopyMemory2DKernel_param_4,
	.param .u32 CopyMemory2DKernel_param_5,
	.param .u32 CopyMemory2DKernel_param_6,
	.param .u32 CopyMemory2DKernel_param_7,
	.param .u32 CopyMemory2DKernel_param_8
)
{
	.reg .pred 	%p<6>;
	.reg .s16 	%rs<13>;
	.reg .s32 	%r<20>;
	.reg .f32 	%f<25>;
	.reg .s64 	%rd<17>;


	ld.param.u64 	%rd5, [CopyMemory2DKernel_param_0];
	ld.param.u32 	%r5, [CopyMemory2DKernel_param_1];
	ld.param.u32 	%r6, [CopyMemory2DKernel_param_2];
	ld.param.u64 	%rd6, [CopyMemory2DKernel_param_3];
	ld.param.u32 	%r7, [CopyMemory2DKernel_param_4];
	ld.param.u32 	%r8, [CopyMemory2DKernel_param_5];
	ld.param.u32 	%r9, [CopyMemory2DKernel_param_6];
	ld.param.u32 	%r10, [CopyMemory2DKernel_param_7];
	ld.param.u32 	%r11, [CopyMemory2DKernel_param_8];
	cvta.to.global.u64 	%rd1, %rd6;
	cvta.to.global.u64 	%rd2, %rd5;
	.loc 1 30 1
	mov.u32 	%r12, %ntid.x;
	mov.u32 	%r13, %ctaid.x;
	mov.u32 	%r14, %tid.x;
	mad.lo.s32 	%r1, %r12, %r13, %r14;
	mov.u32 	%r15, %ntid.y;
	mov.u32 	%r16, %ctaid.y;
	mov.u32 	%r17, %tid.y;
	mad.lo.s32 	%r2, %r15, %r16, %r17;
	mul.wide.s32 	%rd7, %r6, 16;
	add.s64 	%rd3, %rd2, %rd7;
	mul.wide.s32 	%rd8, %r8, 16;
	add.s64 	%rd4, %rd1, %rd8;
	.loc 1 30 1
	setp.lt.s32	%p1, %r1, %r10;
	setp.lt.s32	%p2, %r2, %r11;
	and.pred  	%p3, %p1, %p2;
	.loc 1 30 1
	@!%p3 bra 	BB0_7;
	bra.uni 	BB0_1;

BB0_1:
	.loc 1 30 1
	mad.lo.s32 	%r3, %r2, %r5, %r1;
	setp.eq.s32	%p4, %r9, 0;
	@%p4 bra 	BB0_3;

	add.s32 	%r18, %r3, %r6;
	mul.wide.s32 	%rd9, %r18, 16;
	add.s64 	%rd10, %rd2, %rd9;
	ld.global.v4.f32 	{%f17, %f18, %f19, %f20}, [%rd10];
	mov.f32 	%f24, %f20;
	mov.f32 	%f23, %f19;
	mov.f32 	%f22, %f18;
	mov.f32 	%f21, %f17;
	bra.uni 	BB0_4;

BB0_3:
	mul.wide.s32 	%rd11, %r3, 8;
	add.s64 	%rd12, %rd3, %rd11;
	.loc 1 30 1
	ld.global.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd12];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f21, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f22, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f23, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f24, %temp;
	}

BB0_4:
	.loc 1 30 1
	mad.lo.s32 	%r4, %r2, %r7, %r1;
	.loc 1 30 1
	@%p4 bra 	BB0_6;

	add.s32 	%r19, %r4, %r8;
	mul.wide.s32 	%rd13, %r19, 16;
	add.s64 	%rd14, %rd1, %rd13;
	.loc 1 30 1
	st.global.v4.f32 	[%rd14], {%f21, %f22, %f23, %f24};
	bra.uni 	BB0_7;

BB0_6:
	mul.wide.s32 	%rd15, %r4, 8;
	add.s64 	%rd16, %rd4, %rd15;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f21;
	mov.b16 	%rs9, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f22;
	mov.b16 	%rs10, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f23;
	mov.b16 	%rs11, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f24;
	mov.b16 	%rs12, %temp;
}
	.loc 1 30 230
	st.global.v4.u16 	[%rd16], {%rs9, %rs10, %rs11, %rs12};

BB0_7:
	.loc 1 30 2
	ret;
}

.visible .entry CopyRectKernel(
	.param .u64 CopyRectKernel_param_0,
	.param .u32 CopyRectKernel_param_1,
	.param .u64 CopyRectKernel_param_2,
	.param .u32 CopyRectKernel_param_3,
	.param .u32 CopyRectKernel_param_4,
	.param .u32 CopyRectKernel_param_5,
	.param .u32 CopyRectKernel_param_6,
	.param .u32 CopyRectKernel_param_7,
	.param .u32 CopyRectKernel_param_8,
	.param .u32 CopyRectKernel_param_9,
	.param .u32 CopyRectKernel_param_10
)
{
	.reg .pred 	%p<9>;
	.reg .s16 	%rs<13>;
	.reg .s32 	%r<26>;
	.reg .f32 	%f<25>;
	.reg .s64 	%rd<13>;


	ld.param.u64 	%rd3, [CopyRectKernel_param_0];
	ld.param.u32 	%r7, [CopyRectKernel_param_1];
	ld.param.u64 	%rd4, [CopyRectKernel_param_2];
	ld.param.u32 	%r8, [CopyRectKernel_param_3];
	ld.param.u32 	%r9, [CopyRectKernel_param_4];
	ld.param.u32 	%r10, [CopyRectKernel_param_5];
	ld.param.u32 	%r11, [CopyRectKernel_param_6];
	ld.param.u32 	%r14, [CopyRectKernel_param_7];
	ld.param.u32 	%r12, [CopyRectKernel_param_8];
	ld.param.u32 	%r15, [CopyRectKernel_param_9];
	ld.param.u32 	%r13, [CopyRectKernel_param_10];
	cvta.to.global.u64 	%rd1, %rd4;
	cvta.to.global.u64 	%rd2, %rd3;
	.loc 1 30 1
	mov.u32 	%r16, %ntid.x;
	mov.u32 	%r17, %ctaid.x;
	mov.u32 	%r18, %tid.x;
	mad.lo.s32 	%r1, %r16, %r17, %r18;
	add.s32 	%r2, %r1, %r14;
	mov.u32 	%r19, %ntid.y;
	mov.u32 	%r20, %ctaid.y;
	mov.u32 	%r21, %tid.y;
	mad.lo.s32 	%r3, %r19, %r20, %r21;
	add.s32 	%r4, %r3, %r12;
	.loc 1 30 1
	setp.gt.s32	%p1, %r1, -1;
	add.s32 	%r22, %r15, %r14;
	setp.lt.s32	%p2, %r2, %r22;
	and.pred  	%p3, %p1, %p2;
	setp.gt.s32	%p4, %r3, -1;
	and.pred  	%p5, %p3, %p4;
	.loc 1 30 1
	@!%p5 bra 	BB1_8;
	bra.uni 	BB1_1;

BB1_1:
	add.s32 	%r23, %r13, %r12;
	setp.ge.s32	%p6, %r4, %r23;
	@%p6 bra 	BB1_8;

	.loc 1 30 1
	add.s32 	%r24, %r3, %r11;
	add.s32 	%r25, %r1, %r10;
	.loc 1 30 1
	mad.lo.s32 	%r5, %r24, %r7, %r25;
	setp.eq.s32	%p7, %r9, 0;
	@%p7 bra 	BB1_4;

	mul.wide.s32 	%rd5, %r5, 16;
	add.s64 	%rd6, %rd2, %rd5;
	ld.global.v4.f32 	{%f17, %f18, %f19, %f20}, [%rd6];
	mov.f32 	%f24, %f20;
	mov.f32 	%f23, %f19;
	mov.f32 	%f22, %f18;
	mov.f32 	%f21, %f17;
	bra.uni 	BB1_5;

BB1_4:
	mul.wide.s32 	%rd7, %r5, 8;
	add.s64 	%rd8, %rd2, %rd7;
	.loc 1 30 1
	ld.global.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd8];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f21, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f22, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f23, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f24, %temp;
	}

BB1_5:
	.loc 1 30 1
	mad.lo.s32 	%r6, %r4, %r8, %r2;
	.loc 1 30 1
	@%p7 bra 	BB1_7;

	mul.wide.s32 	%rd9, %r6, 16;
	add.s64 	%rd10, %rd1, %rd9;
	.loc 1 30 1
	st.global.v4.f32 	[%rd10], {%f21, %f22, %f23, %f24};
	bra.uni 	BB1_8;

BB1_7:
	mul.wide.s32 	%rd11, %r6, 8;
	add.s64 	%rd12, %rd1, %rd11;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f21;
	mov.b16 	%rs9, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f22;
	mov.b16 	%rs10, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f23;
	mov.b16 	%rs11, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f24;
	mov.b16 	%rs12, %temp;
}
	.loc 1 30 231
	st.global.v4.u16 	[%rd12], {%rs9, %rs10, %rs11, %rs12};

BB1_8:
	.loc 1 30 2
	ret;
}


