//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Wed Jul 10 12:41:20 2013 (1373485280)
// Cuda compilation tools, release 5.5, V5.5.0
//

.version 3.2
.target sm_30
.address_size 64

	.file	1 "D:/singlebarrel/releases/2014.03/shared/adobe/Iridas/IRIDASLIB/GPU/IRIDASStereoColorMatch.cu", 1399785249, 4282
	.file	2 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\iridas\\iridaslib\\gpu\\IrGPGPUShaders.h", 1399785249, 44561
	.file	3 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\mediacore\\external\\3rdparty\\nvidia\\cuda\\win\\include\\device_functions.h", 1399785281, 191626
.global .texref texture0_RECT;
// ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local has been demoted
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};

.visible .func  (.param .b32 func_retval0) _Z5POWs_ff(
	.param .b32 _Z5POWs_ff_param_0,
	.param .b32 _Z5POWs_ff_param_1
)
{
	.reg .pred 	%p<5>;
	.reg .f32 	%f<10>;


	ld.param.f32 	%f3, [_Z5POWs_ff_param_0];
	ld.param.f32 	%f4, [_Z5POWs_ff_param_1];
	.loc 2 978 1
	setp.eq.ftz.f32	%p1, %f3, 0f00000000;
	setp.eq.ftz.f32	%p2, %f4, 0f00000000;
	and.pred  	%p3, %p1, %p2;
	.loc 2 978 1
	@!%p3 bra 	BB0_2;
	bra.uni 	BB0_1;

BB0_1:
	mov.f32 	%f9, 0f7FFFFFFF;
	bra.uni 	BB0_5;

BB0_2:
	.loc 2 978 1
	setp.geu.ftz.f32	%p4, %f4, 0f00000000;
	@%p4 bra 	BB0_4;

	mov.f32 	%f9, 0f3F800000;
	bra.uni 	BB0_5;

BB0_4:
	.loc 3 3600 10
	lg2.approx.ftz.f32 	%f5, %f3;
	mul.ftz.f32 	%f6, %f5, %f4;
	ex2.approx.ftz.f32 	%f9, %f6;

BB0_5:
	st.param.f32	[func_retval0+0], %f9;
	.loc 2 978 38
	ret;
}

.visible .entry ShaderKernel_IRIDASAutoColorMatch(
	.param .u64 ShaderKernel_IRIDASAutoColorMatch_param_0,
	.param .u32 ShaderKernel_IRIDASAutoColorMatch_param_1,
	.param .u32 ShaderKernel_IRIDASAutoColorMatch_param_2,
	.param .u32 ShaderKernel_IRIDASAutoColorMatch_param_3,
	.param .u32 ShaderKernel_IRIDASAutoColorMatch_param_4,
	.param .u64 ShaderKernel_IRIDASAutoColorMatch_param_5,
	.param .u64 ShaderKernel_IRIDASAutoColorMatch_param_6,
	.param .u64 ShaderKernel_IRIDASAutoColorMatch_param_7
)
{
	.reg .pred 	%p<10>;
	.reg .s16 	%rs<5>;
	.reg .s32 	%r<15>;
	.reg .f32 	%f<190>;
	.reg .s64 	%rd<17>;
	// demoted variable
	.shared .align 16 .b8 ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local[96];

	ld.param.u64 	%rd5, [ShaderKernel_IRIDASAutoColorMatch_param_0];
	ld.param.u32 	%r4, [ShaderKernel_IRIDASAutoColorMatch_param_1];
	ld.param.u32 	%r5, [ShaderKernel_IRIDASAutoColorMatch_param_2];
	ld.param.u32 	%r6, [ShaderKernel_IRIDASAutoColorMatch_param_3];
	ld.param.u32 	%r7, [ShaderKernel_IRIDASAutoColorMatch_param_4];
	ld.param.u64 	%rd6, [ShaderKernel_IRIDASAutoColorMatch_param_5];
	ld.param.u64 	%rd7, [ShaderKernel_IRIDASAutoColorMatch_param_7];
	cvta.to.global.u64 	%rd1, %rd5;
	cvta.to.global.u64 	%rd2, %rd7;
	cvta.to.global.u64 	%rd3, %rd6;
	.loc 1 40 1
	mov.u32 	%r8, %ntid.x;
	mov.u32 	%r9, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r8, %r9, %r1;
	mov.u32 	%r10, %ntid.y;
	mov.u32 	%r11, %ctaid.y;
	mov.u32 	%r12, %tid.y;
	mad.lo.s32 	%r3, %r10, %r11, %r12;
	.loc 1 40 1
	setp.lt.s32	%p1, %r2, %r6;
	setp.lt.s32	%p2, %r3, %r7;
	and.pred  	%p3, %p1, %p2;
	.loc 1 40 1
	@!%p3 bra 	BB1_15;
	bra.uni 	BB1_1;

BB1_1:
	.loc 1 40 1
	cvt.rn.f32.s32	%f32, %r2;
	add.ftz.f32 	%f1, %f32, 0f3F000000;
	cvt.rn.f32.s32	%f33, %r3;
	add.ftz.f32 	%f2, %f33, 0f3F000000;
	.loc 1 40 1
	setp.gt.u32	%p4, %r1, 5;
	@%p4 bra 	BB1_3;

	.loc 1 40 1
	mul.wide.u32 	%rd8, %r1, 16;
	mov.u64 	%rd9, ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local;
	add.s64 	%rd10, %rd9, %rd8;
	add.s64 	%rd11, %rd3, %rd8;
	ld.global.v4.f32 	{%f34, %f35, %f36, %f37}, [%rd11];
	st.shared.v4.f32 	[%rd10], {%f34, %f35, %f36, %f37};

BB1_3:
	.loc 1 40 1
	bar.sync 	0;
	.loc 1 40 109
	// inline asm
	tex.2d.v4.f32.f32 {%f42, %f43, %f44, %f45}, [texture0_RECT, {%f1, %f2}];
	// inline asm
	.loc 3 2820 10
	cvt.ftz.sat.f32.f32	%f48, %f44;
	cvt.ftz.sat.f32.f32	%f49, %f43;
	cvt.ftz.sat.f32.f32	%f50, %f42;
	.loc 1 40 1
	mul.ftz.f32 	%f51, %f49, 0f3F140B78;
	fma.rn.ftz.f32 	%f52, %f48, 0f3EC31F8A, %f51;
	fma.rn.ftz.f32 	%f53, %f50, 0f3D24A8C1, %f52;
	mul.ftz.f32 	%f54, %f49, 0f3F397247;
	fma.rn.ftz.f32 	%f55, %f48, 0f3E496BBA, %f54;
	fma.rn.ftz.f32 	%f56, %f50, 0f3DA02752, %f55;
	mul.ftz.f32 	%f57, %f49, 0f3E03E426;
	fma.rn.ftz.f32 	%f58, %f48, 0f3CC56D5D, %f57;
	fma.rn.ftz.f32 	%f59, %f50, 0f3F582A99, %f58;
	.loc 1 40 1
	add.ftz.f32 	%f60, %f53, 0f3F800000;
	add.ftz.f32 	%f61, %f56, 0f3F800000;
	add.ftz.f32 	%f62, %f59, 0f3F800000;
	.loc 3 3559 10
	lg2.approx.ftz.f32 	%f63, %f60;
	lg2.approx.ftz.f32 	%f64, %f61;
	lg2.approx.ftz.f32 	%f65, %f62;
	.loc 1 40 1
	mul.ftz.f32 	%f66, %f63, 0f3E9A209B;
	mul.ftz.f32 	%f67, %f64, 0f3E9A209B;
	mul.ftz.f32 	%f68, %f65, 0f3E9A209B;
	.loc 1 40 1
	add.ftz.f32 	%f69, %f66, %f67;
	add.ftz.f32 	%f70, %f69, %f68;
	fma.rn.ftz.f32 	%f71, %f68, 0fC0000000, %f69;
	sub.ftz.f32 	%f72, %f66, %f67;
	.loc 1 40 1
	mul.ftz.f32 	%f4, %f70, 0f3F13CD3A;
	mul.ftz.f32 	%f5, %f71, 0f3ED105EC;
	mul.ftz.f32 	%f6, %f72, 0f3F3504F3;
	.loc 1 40 1
	ld.global.u32 	%r13, [%rd2];
	setp.eq.s32	%p5, %r13, 0;
	@%p5 bra 	BB1_5;

	.loc 1 40 1
	fma.rn.ftz.f32 	%f73, %f4, 0fC0000000, 0f3F800000;
	.loc 3 2820 10
	cvt.ftz.sat.f32.f32	%f74, %f73;
	.loc 1 40 1
	fma.rn.ftz.f32 	%f75, %f4, 0f00000000, 0f3F800000;
	.loc 3 2820 10
	cvt.ftz.sat.f32.f32	%f76, %f75;
	.loc 1 40 1
	fma.rn.ftz.f32 	%f77, %f4, 0f40000000, 0fBF800000;
	.loc 3 2820 10
	cvt.ftz.sat.f32.f32	%f78, %f77;
	.loc 1 40 1
	fma.rn.ftz.f32 	%f79, %f74, 0fBF800000, %f76;
	fma.rn.ftz.f32 	%f80, %f78, 0fBF800000, %f79;
	.loc 3 2820 10
	cvt.ftz.sat.f32.f32	%f81, %f80;
	.loc 1 40 1
	ld.shared.v4.f32 	{%f82, %f83, %f84, %f85}, [ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local+48];
	ld.shared.v4.f32 	{%f87, %f88, %f89, %f90}, [ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local];
	.loc 1 40 1
	fma.rn.ftz.f32 	%f92, %f4, %f87, %f82;
	fma.rn.ftz.f32 	%f95, %f5, %f88, %f83;
	fma.rn.ftz.f32 	%f98, %f6, %f89, %f84;
	.loc 1 40 1
	mul.ftz.f32 	%f99, %f74, %f92;
	mul.ftz.f32 	%f100, %f74, %f95;
	mul.ftz.f32 	%f101, %f74, %f98;
	.loc 1 40 1
	ld.shared.v4.f32 	{%f102, %f103, %f104, %f105}, [ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local+64];
	ld.shared.v4.f32 	{%f107, %f108, %f109, %f110}, [ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local+16];
	.loc 1 40 1
	fma.rn.ftz.f32 	%f112, %f4, %f107, %f102;
	fma.rn.ftz.f32 	%f115, %f5, %f108, %f103;
	fma.rn.ftz.f32 	%f118, %f6, %f109, %f104;
	.loc 1 40 1
	fma.rn.ftz.f32 	%f119, %f81, %f112, %f99;
	fma.rn.ftz.f32 	%f120, %f81, %f115, %f100;
	fma.rn.ftz.f32 	%f121, %f81, %f118, %f101;
	.loc 1 40 1
	ld.shared.v4.f32 	{%f122, %f123, %f124, %f125}, [ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local+80];
	ld.shared.v4.f32 	{%f127, %f128, %f129, %f130}, [ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local+32];
	.loc 1 40 1
	fma.rn.ftz.f32 	%f132, %f4, %f127, %f122;
	fma.rn.ftz.f32 	%f135, %f5, %f128, %f123;
	fma.rn.ftz.f32 	%f138, %f6, %f129, %f124;
	.loc 1 40 1
	fma.rn.ftz.f32 	%f182, %f78, %f132, %f119;
	fma.rn.ftz.f32 	%f183, %f78, %f135, %f120;
	fma.rn.ftz.f32 	%f184, %f78, %f138, %f121;
	bra.uni 	BB1_6;

BB1_5:
	.loc 1 40 1
	ld.shared.v4.f32 	{%f139, %f140, %f141, %f142}, [ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local+48];
	ld.shared.v4.f32 	{%f144, %f145, %f146, %f147}, [ShaderKernel_IRIDASAutoColorMatch$__cuda_local_var_170278_498_non_const_p_local];
	.loc 1 40 1
	fma.rn.ftz.f32 	%f182, %f4, %f144, %f139;
	fma.rn.ftz.f32 	%f183, %f5, %f145, %f140;
	fma.rn.ftz.f32 	%f184, %f6, %f146, %f141;

BB1_6:
	.loc 1 40 1
	mul.ftz.f32 	%f154, %f183, 0f3ED105EC;
	.loc 1 40 1
	fma.rn.ftz.f32 	%f155, %f182, 0f3F13CD3A, %f154;
	.loc 1 40 1
	mul.ftz.f32 	%f156, %f184, 0f3F3504F3;
	.loc 1 40 1
	add.ftz.f32 	%f16, %f155, %f156;
	fma.rn.ftz.f32 	%f17, %f156, 0fBF800000, %f155;
	mul.ftz.f32 	%f157, %f154, 0fC0000000;
	fma.rn.ftz.f32 	%f158, %f182, 0f3F13CD3A, %f157;
	mov.f32 	%f153, 0f00000000;
	.loc 1 40 1
	fma.rn.ftz.f32 	%f18, %f156, 0f00000000, %f158;
	.loc 2 978 1
	setp.lt.ftz.f32	%p6, %f16, 0f00000000;
	mov.f32 	%f189, %f153;
	@%p6 bra 	BB1_8;

	mov.f32 	%f159, 0f41200000;
	.loc 3 3600 10
	lg2.approx.ftz.f32 	%f160, %f159;
	mul.ftz.f32 	%f161, %f16, %f160;
	ex2.approx.ftz.f32 	%f162, %f161;
	.loc 2 978 38
	add.ftz.f32 	%f19, %f162, 0fBF800000;
	mov.f32 	%f189, %f19;

BB1_8:
	.loc 2 978 1
	mov.f32 	%f20, %f189;
	setp.lt.ftz.f32	%p7, %f17, 0f00000000;
	mov.f32 	%f188, %f153;
	@%p7 bra 	BB1_10;

	mov.f32 	%f164, 0f41200000;
	.loc 3 3600 10
	lg2.approx.ftz.f32 	%f165, %f164;
	mul.ftz.f32 	%f166, %f17, %f165;
	ex2.approx.ftz.f32 	%f167, %f166;
	.loc 2 978 38
	add.ftz.f32 	%f188, %f167, 0fBF800000;

BB1_10:
	.loc 2 978 1
	setp.lt.ftz.f32	%p8, %f18, 0f00000000;
	mov.f32 	%f187, %f153;
	@%p8 bra 	BB1_12;

	mov.f32 	%f169, 0f41200000;
	.loc 3 3600 10
	lg2.approx.ftz.f32 	%f170, %f169;
	mul.ftz.f32 	%f171, %f18, %f170;
	ex2.approx.ftz.f32 	%f172, %f171;
	.loc 2 978 38
	add.ftz.f32 	%f187, %f172, 0fBF800000;

BB1_12:
	.loc 1 40 1
	mul.ftz.f32 	%f173, %f188, 0fC0659653;
	fma.rn.ftz.f32 	%f174, %f20, 0f408EF909, %f173;
	fma.rn.ftz.f32 	%f175, %f187, 0f3DF4538F, %f174;
	.loc 3 2820 10
	cvt.ftz.sat.f32.f32	%f30, %f175;
	.loc 1 40 1
	mul.ftz.f32 	%f176, %f188, 0f401860AA;
	fma.rn.ftz.f32 	%f177, %f20, 0fBF9BFB16, %f176;
	fma.rn.ftz.f32 	%f178, %f187, 0fBE264C30, %f177;
	.loc 3 2820 10
	cvt.ftz.sat.f32.f32	%f29, %f178;
	.loc 1 40 1
	mul.ftz.f32 	%f179, %f188, 0fBE79C0EC;
	fma.rn.ftz.f32 	%f180, %f20, 0f3D4B923A, %f179;
	fma.rn.ftz.f32 	%f181, %f187, 0f3F9A2D0E, %f180;
	.loc 3 2820 10
	cvt.ftz.sat.f32.f32	%f28, %f181;
	.loc 1 40 1
	mad.lo.s32 	%r14, %r3, %r4, %r2;
	.loc 1 40 1
	cvt.s64.s32	%rd4, %r14;
	.loc 1 40 1
	setp.eq.s32	%p9, %r5, 0;
	@%p9 bra 	BB1_14;

	.loc 1 40 1
	shl.b64 	%rd13, %rd4, 4;
	add.s64 	%rd14, %rd1, %rd13;
	st.global.v4.f32 	[%rd14], {%f28, %f29, %f30, %f45};
	bra.uni 	BB1_15;

BB1_14:
	.loc 1 40 1
	shl.b64 	%rd15, %rd4, 3;
	add.s64 	%rd16, %rd1, %rd15;
	.loc 3 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f28;
	mov.b16 	%rs1, %temp;
}
	.loc 3 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f29;
	mov.b16 	%rs2, %temp;
}
	.loc 3 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f30;
	mov.b16 	%rs3, %temp;
}
	.loc 3 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f45;
	mov.b16 	%rs4, %temp;
}
	.loc 1 40 231
	st.global.v4.u16 	[%rd16], {%rs1, %rs2, %rs3, %rs4};

BB1_15:
	.loc 1 40 2
	ret;
}


