//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Wed Jul 10 12:41:20 2013 (1373485280)
// Cuda compilation tools, release 5.5, V5.5.0
//

.version 3.2
.target sm_30
.address_size 64

	.file	1 "D:/singlebarrel/releases/2014.03/shared/adobe/Iridas/IRIDASLIB/GPU/IRIDASSimplePrimary.cu", 1399785249, 3721
	.file	2 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\iridas\\iridaslib\\gpu\\IrGPGPUShaders.h", 1399785249, 44561
	.file	3 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\mediacore\\external\\3rdparty\\nvidia\\cuda\\win\\include\\device_functions.h", 1399785281, 191626
.global .texref texture0_RECT;
// ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local has been demoted
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};

.visible .func  (.param .b32 func_retval0) _Z5POWs_ff(
	.param .b32 _Z5POWs_ff_param_0,
	.param .b32 _Z5POWs_ff_param_1
)
{
	.reg .pred 	%p<5>;
	.reg .f32 	%f<10>;


	ld.param.f32 	%f3, [_Z5POWs_ff_param_0];
	ld.param.f32 	%f4, [_Z5POWs_ff_param_1];
	.loc 2 978 1
	setp.eq.ftz.f32	%p1, %f3, 0f00000000;
	setp.eq.ftz.f32	%p2, %f4, 0f00000000;
	and.pred  	%p3, %p1, %p2;
	.loc 2 978 1
	@!%p3 bra 	BB0_2;
	bra.uni 	BB0_1;

BB0_1:
	mov.f32 	%f9, 0f7FFFFFFF;
	bra.uni 	BB0_5;

BB0_2:
	.loc 2 978 1
	setp.geu.ftz.f32	%p4, %f4, 0f00000000;
	@%p4 bra 	BB0_4;

	mov.f32 	%f9, 0f3F800000;
	bra.uni 	BB0_5;

BB0_4:
	.loc 3 3600 10
	lg2.approx.ftz.f32 	%f5, %f3;
	mul.ftz.f32 	%f6, %f5, %f4;
	ex2.approx.ftz.f32 	%f9, %f6;

BB0_5:
	st.param.f32	[func_retval0+0], %f9;
	.loc 2 978 38
	ret;
}

.visible .entry ShaderKernel_IRIDASSimplePrimary(
	.param .u64 ShaderKernel_IRIDASSimplePrimary_param_0,
	.param .u32 ShaderKernel_IRIDASSimplePrimary_param_1,
	.param .u32 ShaderKernel_IRIDASSimplePrimary_param_2,
	.param .u32 ShaderKernel_IRIDASSimplePrimary_param_3,
	.param .u32 ShaderKernel_IRIDASSimplePrimary_param_4,
	.param .u64 ShaderKernel_IRIDASSimplePrimary_param_5,
	.param .u64 ShaderKernel_IRIDASSimplePrimary_param_6,
	.param .u64 ShaderKernel_IRIDASSimplePrimary_param_7
)
{
	.reg .pred 	%p<24>;
	.reg .s16 	%rs<5>;
	.reg .s32 	%r<17>;
	.reg .f32 	%f<158>;
	.reg .s64 	%rd<20>;
	// demoted variable
	.shared .align 16 .b8 ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local[128];

	ld.param.u64 	%rd5, [ShaderKernel_IRIDASSimplePrimary_param_0];
	ld.param.u32 	%r4, [ShaderKernel_IRIDASSimplePrimary_param_1];
	ld.param.u32 	%r5, [ShaderKernel_IRIDASSimplePrimary_param_2];
	ld.param.u32 	%r6, [ShaderKernel_IRIDASSimplePrimary_param_3];
	ld.param.u32 	%r7, [ShaderKernel_IRIDASSimplePrimary_param_4];
	ld.param.u64 	%rd7, [ShaderKernel_IRIDASSimplePrimary_param_5];
	ld.param.u64 	%rd6, [ShaderKernel_IRIDASSimplePrimary_param_7];
	cvta.to.global.u64 	%rd1, %rd6;
	cvta.to.global.u64 	%rd2, %rd7;
	.loc 1 47 1
	mov.u32 	%r8, %ntid.x;
	mov.u32 	%r9, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r8, %r9, %r1;
	mov.u32 	%r10, %ntid.y;
	mov.u32 	%r11, %ctaid.y;
	mov.u32 	%r12, %tid.y;
	mad.lo.s32 	%r3, %r10, %r11, %r12;
	.loc 1 47 1
	setp.lt.s32	%p1, %r2, %r6;
	setp.lt.s32	%p2, %r3, %r7;
	and.pred  	%p3, %p1, %p2;
	.loc 1 47 1
	@!%p3 bra 	BB1_27;
	bra.uni 	BB1_1;

BB1_1:
	.loc 1 47 1
	cvt.rn.f32.s32	%f50, %r2;
	add.ftz.f32 	%f1, %f50, 0f3F000000;
	cvt.rn.f32.s32	%f51, %r3;
	add.ftz.f32 	%f2, %f51, 0f3F000000;
	.loc 1 47 1
	setp.gt.u32	%p4, %r1, 7;
	@%p4 bra 	BB1_3;

	.loc 1 47 1
	mul.wide.u32 	%rd8, %r1, 16;
	mov.u64 	%rd9, ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local;
	add.s64 	%rd10, %rd9, %rd8;
	add.s64 	%rd11, %rd2, %rd8;
	ld.global.v4.f32 	{%f52, %f53, %f54, %f55}, [%rd11];
	st.shared.v4.f32 	[%rd10], {%f52, %f53, %f54, %f55};

BB1_3:
	.loc 1 47 1
	bar.sync 	0;
	.loc 1 47 105
	// inline asm
	tex.2d.v4.f32.f32 {%f60, %f61, %f62, %f63}, [texture0_RECT, {%f1, %f2}];
	// inline asm
	.loc 1 47 1
	ld.global.u32 	%r13, [%rd1+4];
	setp.eq.s32	%p5, %r13, 0;
	.loc 1 47 105
	mov.f32 	%f146, %f62;
	mov.f32 	%f147, %f61;
	mov.f32 	%f148, %f60;
	.loc 1 47 1
	@%p5 bra 	BB1_5;

	.loc 1 47 1
	ld.shared.v4.f32 	{%f66, %f67, %f68, %f69}, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+64];
	.loc 1 47 1
	mul.ftz.f32 	%f71, %f61, %f67;
	fma.rn.ftz.f32 	%f73, %f62, %f66, %f71;
	fma.rn.ftz.f32 	%f75, %f60, %f68, %f73;
	.loc 1 47 1
	sub.ftz.f32 	%f76, %f62, %f75;
	sub.ftz.f32 	%f77, %f61, %f75;
	sub.ftz.f32 	%f78, %f60, %f75;
	.loc 1 47 1
	ld.shared.v4.f32 	{%f79, %f80, %f81, %f82}, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+80];
	.loc 1 47 1
	fma.rn.ftz.f32 	%f146, %f76, %f79, %f75;
	fma.rn.ftz.f32 	%f147, %f77, %f80, %f75;
	fma.rn.ftz.f32 	%f148, %f78, %f81, %f75;

BB1_5:
	.loc 1 47 1
	ld.shared.v4.f32 	{%f86, %f87, %f88, %f89}, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+16];
	.loc 1 47 1
	ld.shared.v4.f32 	{%f91, %f92, %f93, %f94}, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local];
	.loc 1 47 1
	fma.rn.ftz.f32 	%f152, %f146, %f91, %f86;
	fma.rn.ftz.f32 	%f153, %f147, %f92, %f87;
	fma.rn.ftz.f32 	%f154, %f148, %f93, %f88;
	.loc 1 47 1
	ld.global.u32 	%r14, [%rd1];
	setp.eq.s32	%p6, %r14, 0;
	@%p6 bra 	BB1_22;

	.loc 1 47 1
	setp.lt.ftz.f32	%p7, %f152, 0f00000000;
	selp.f32	%f16, 0fBF800000, 0f3F800000, %p7;
	setp.lt.ftz.f32	%p8, %f153, 0f00000000;
	selp.f32	%f17, 0fBF800000, 0f3F800000, %p8;
	setp.lt.ftz.f32	%p9, %f154, 0f00000000;
	selp.f32	%f18, 0fBF800000, 0f3F800000, %p9;
	.loc 3 2750 10
	abs.ftz.f32 	%f19, %f153;
	abs.ftz.f32 	%f20, %f154;
	abs.ftz.f32 	%f21, %f152;
	.loc 2 978 1
	setp.eq.ftz.f32	%p10, %f21, 0f00000000;
	.loc 1 47 1
	ld.shared.f32 	%f22, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+112];
	.loc 2 978 1
	setp.eq.ftz.f32	%p11, %f22, 0f00000000;
	and.pred  	%p12, %p10, %p11;
	.loc 2 978 1
	@!%p12 bra 	BB1_8;
	bra.uni 	BB1_7;

BB1_7:
	mov.f32 	%f149, 0f7FFFFFFF;
	bra.uni 	BB1_11;

BB1_8:
	.loc 2 978 1
	setp.geu.ftz.f32	%p13, %f22, 0f00000000;
	@%p13 bra 	BB1_10;

	mov.f32 	%f149, 0f3F800000;
	bra.uni 	BB1_11;

BB1_10:
	.loc 3 3600 10
	lg2.approx.ftz.f32 	%f100, %f21;
	mul.ftz.f32 	%f101, %f22, %f100;
	ex2.approx.ftz.f32 	%f149, %f101;

BB1_11:
	.loc 1 47 1
	ld.shared.f32 	%f25, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+116];
	.loc 2 978 1
	setp.eq.ftz.f32	%p14, %f25, 0f00000000;
	setp.eq.ftz.f32	%p15, %f19, 0f00000000;
	and.pred  	%p16, %p15, %p14;
	.loc 2 978 1
	@!%p16 bra 	BB1_13;
	bra.uni 	BB1_12;

BB1_12:
	mov.f32 	%f150, 0f7FFFFFFF;
	bra.uni 	BB1_16;

BB1_13:
	.loc 2 978 1
	setp.geu.ftz.f32	%p17, %f25, 0f00000000;
	@%p17 bra 	BB1_15;

	mov.f32 	%f150, 0f3F800000;
	bra.uni 	BB1_16;

BB1_15:
	.loc 3 3600 10
	lg2.approx.ftz.f32 	%f104, %f19;
	mul.ftz.f32 	%f105, %f25, %f104;
	ex2.approx.ftz.f32 	%f150, %f105;

BB1_16:
	.loc 1 47 1
	ld.shared.f32 	%f28, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+120];
	.loc 2 978 1
	setp.eq.ftz.f32	%p18, %f28, 0f00000000;
	setp.eq.ftz.f32	%p19, %f20, 0f00000000;
	and.pred  	%p20, %p19, %p18;
	.loc 2 978 1
	@!%p20 bra 	BB1_18;
	bra.uni 	BB1_17;

BB1_17:
	mov.f32 	%f151, 0f7FFFFFFF;
	bra.uni 	BB1_21;

BB1_18:
	.loc 2 978 1
	setp.geu.ftz.f32	%p21, %f28, 0f00000000;
	@%p21 bra 	BB1_20;

	mov.f32 	%f151, 0f3F800000;
	bra.uni 	BB1_21;

BB1_20:
	.loc 3 3600 10
	lg2.approx.ftz.f32 	%f108, %f20;
	mul.ftz.f32 	%f109, %f28, %f108;
	ex2.approx.ftz.f32 	%f151, %f109;

BB1_21:
	.loc 1 47 1
	mul.ftz.f32 	%f152, %f149, %f16;
	mul.ftz.f32 	%f153, %f150, %f17;
	mul.ftz.f32 	%f154, %f151, %f18;

BB1_22:
	.loc 1 47 1
	ld.shared.v4.f32 	{%f112, %f113, %f114, %f115}, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+48];
	.loc 1 47 1
	ld.shared.v4.f32 	{%f117, %f118, %f119, %f120}, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+32];
	.loc 1 47 1
	fma.rn.ftz.f32 	%f155, %f152, %f117, %f112;
	fma.rn.ftz.f32 	%f156, %f153, %f118, %f113;
	fma.rn.ftz.f32 	%f157, %f154, %f119, %f114;
	.loc 1 47 1
	ld.global.u32 	%r15, [%rd1+8];
	setp.eq.s32	%p22, %r15, 0;
	@%p22 bra 	BB1_24;

	.loc 1 47 1
	ld.shared.v4.f32 	{%f126, %f127, %f128, %f129}, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+64];
	.loc 1 47 1
	mul.ftz.f32 	%f131, %f156, %f127;
	fma.rn.ftz.f32 	%f133, %f155, %f126, %f131;
	fma.rn.ftz.f32 	%f135, %f157, %f128, %f133;
	.loc 1 47 1
	sub.ftz.f32 	%f136, %f155, %f135;
	sub.ftz.f32 	%f137, %f156, %f135;
	sub.ftz.f32 	%f138, %f157, %f135;
	.loc 1 47 1
	ld.shared.v4.f32 	{%f139, %f140, %f141, %f142}, [ShaderKernel_IRIDASSimplePrimary$__cuda_local_var_170285_497_non_const_p_local+96];
	.loc 1 47 1
	fma.rn.ftz.f32 	%f155, %f136, %f139, %f135;
	fma.rn.ftz.f32 	%f156, %f137, %f140, %f135;
	fma.rn.ftz.f32 	%f157, %f138, %f141, %f135;

BB1_24:
	.loc 1 47 1
	mad.lo.s32 	%r16, %r3, %r4, %r2;
	.loc 1 47 1
	cvt.s64.s32	%rd4, %r16;
	.loc 1 47 1
	setp.eq.s32	%p23, %r5, 0;
	@%p23 bra 	BB1_26;

	cvta.to.global.u64 	%rd14, %rd5;
	.loc 1 47 1
	shl.b64 	%rd15, %rd4, 4;
	add.s64 	%rd16, %rd14, %rd15;
	st.global.v4.f32 	[%rd16], {%f157, %f156, %f155, %f63};
	bra.uni 	BB1_27;

BB1_26:
	cvta.to.global.u64 	%rd17, %rd5;
	.loc 1 47 1
	shl.b64 	%rd18, %rd4, 3;
	add.s64 	%rd19, %rd17, %rd18;
	.loc 3 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f157;
	mov.b16 	%rs1, %temp;
}
	.loc 3 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f156;
	mov.b16 	%rs2, %temp;
}
	.loc 3 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f155;
	mov.b16 	%rs3, %temp;
}
	.loc 3 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f63;
	mov.b16 	%rs4, %temp;
}
	.loc 1 47 231
	st.global.v4.u16 	[%rd19], {%rs1, %rs2, %rs3, %rs4};

BB1_27:
	.loc 1 47 2
	ret;
}


