//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Wed Jul 10 12:41:20 2013 (1373485280)
// Cuda compilation tools, release 5.5, V5.5.0
//

.version 3.2
.target sm_30
.address_size 64

	.file	1 "D:/singlebarrel/releases/2014.03/shared/adobe/Iridas/IRIDASLIB/GPU/GaussianBlurRange.cu", 1399785249, 6209
	.file	2 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\mediacore\\external\\3rdparty\\nvidia\\cuda\\win\\include\\device_functions.h", 1399785281, 191626
.global .texref texture0_RECT;
.global .texref texture1_RECT;
// ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local has been demoted
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};

.visible .entry ShaderKernel_GaussianBlurRange(
	.param .u64 ShaderKernel_GaussianBlurRange_param_0,
	.param .u32 ShaderKernel_GaussianBlurRange_param_1,
	.param .u32 ShaderKernel_GaussianBlurRange_param_2,
	.param .u32 ShaderKernel_GaussianBlurRange_param_3,
	.param .u32 ShaderKernel_GaussianBlurRange_param_4,
	.param .u64 ShaderKernel_GaussianBlurRange_param_5,
	.param .u64 ShaderKernel_GaussianBlurRange_param_6,
	.param .u64 ShaderKernel_GaussianBlurRange_param_7
)
{
	.reg .pred 	%p<14>;
	.reg .s16 	%rs<5>;
	.reg .s32 	%r<14>;
	.reg .f32 	%f<347>;
	.reg .s64 	%rd<50>;
	// demoted variable
	.shared .align 16 .b8 ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local[192];

	ld.param.u64 	%rd4, [ShaderKernel_GaussianBlurRange_param_0];
	ld.param.u32 	%r4, [ShaderKernel_GaussianBlurRange_param_1];
	ld.param.u32 	%r5, [ShaderKernel_GaussianBlurRange_param_2];
	ld.param.u32 	%r6, [ShaderKernel_GaussianBlurRange_param_3];
	ld.param.u32 	%r7, [ShaderKernel_GaussianBlurRange_param_4];
	ld.param.u64 	%rd5, [ShaderKernel_GaussianBlurRange_param_5];
	cvta.to.global.u64 	%rd1, %rd4;
	cvta.to.global.u64 	%rd2, %rd5;
	.loc 1 61 1
	mov.u32 	%r8, %ntid.x;
	mov.u32 	%r9, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r8, %r9, %r1;
	mov.u32 	%r10, %ntid.y;
	mov.u32 	%r11, %ctaid.y;
	mov.u32 	%r12, %tid.y;
	mad.lo.s32 	%r3, %r10, %r11, %r12;
	.loc 1 61 1
	setp.lt.s32	%p1, %r2, %r6;
	setp.lt.s32	%p2, %r3, %r7;
	and.pred  	%p3, %p1, %p2;
	.loc 1 61 1
	@!%p3 bra 	BB0_6;
	bra.uni 	BB0_1;

BB0_1:
	.loc 1 61 1
	cvt.rn.f32.s32	%f11, %r2;
	add.ftz.f32 	%f1, %f11, 0f3F000000;
	cvt.rn.f32.s32	%f12, %r3;
	add.ftz.f32 	%f2, %f12, 0f3F000000;
	.loc 1 61 1
	setp.gt.u32	%p4, %r1, 11;
	@%p4 bra 	BB0_3;

	.loc 1 61 1
	mul.wide.u32 	%rd6, %r1, 16;
	mov.u64 	%rd7, ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local;
	add.s64 	%rd8, %rd7, %rd6;
	add.s64 	%rd9, %rd2, %rd6;
	ld.global.v4.f32 	{%f13, %f14, %f15, %f16}, [%rd9];
	st.shared.v4.f32 	[%rd8], {%f13, %f14, %f15, %f16};

BB0_3:
	.loc 1 61 1
	bar.sync 	0;
	.loc 1 61 111
	// inline asm
	tex.2d.v4.f32.f32 {%f21, %f22, %f23, %f24}, [texture1_RECT, {%f1, %f2}];
	// inline asm
	.loc 1 61 1
	ld.shared.v4.f32 	{%f129, %f130, %f131, %f132}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+128];
	.loc 1 61 1
	mul.ftz.f32 	%f134, %f23, %f129;
	mul.ftz.f32 	%f136, %f22, %f130;
	mul.ftz.f32 	%f138, %f21, %f131;
	.loc 1 61 1
	add.ftz.f32 	%f92, %f2, 0f3F800000;
	mov.f32 	%f139, 0f3F800000;
	.loc 1 61 1
	add.ftz.f32 	%f55, %f1, 0fBF800000;
	.loc 1 61 111
	// inline asm
	tex.2d.v4.f32.f32 {%f27, %f28, %f29, %f30}, [texture1_RECT, {%f55, %f92}];
	// inline asm
	.loc 1 61 1
	ld.shared.v4.f32 	{%f140, %f141, %f142, %f143}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+160];
	.loc 1 61 1
	fma.rn.ftz.f32 	%f145, %f29, %f140, %f134;
	fma.rn.ftz.f32 	%f147, %f28, %f141, %f136;
	fma.rn.ftz.f32 	%f149, %f27, %f142, %f138;
	.loc 1 61 1
	add.ftz.f32 	%f61, %f1, 0f3F800000;
	.loc 1 61 111
	// inline asm
	tex.2d.v4.f32.f32 {%f33, %f34, %f35, %f36}, [texture1_RECT, {%f61, %f92}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f150, %f35, %f140, %f145;
	fma.rn.ftz.f32 	%f151, %f34, %f141, %f147;
	fma.rn.ftz.f32 	%f152, %f33, %f142, %f149;
	.loc 1 61 1
	add.ftz.f32 	%f86, %f2, 0fBF800000;
	.loc 1 61 113
	// inline asm
	tex.2d.v4.f32.f32 {%f39, %f40, %f41, %f42}, [texture1_RECT, {%f55, %f86}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f153, %f41, %f140, %f150;
	fma.rn.ftz.f32 	%f154, %f40, %f141, %f151;
	fma.rn.ftz.f32 	%f155, %f39, %f142, %f152;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f45, %f46, %f47, %f48}, [texture1_RECT, {%f61, %f86}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f156, %f47, %f140, %f153;
	fma.rn.ftz.f32 	%f157, %f46, %f141, %f154;
	fma.rn.ftz.f32 	%f158, %f45, %f142, %f155;
	.loc 1 61 1
	add.ftz.f32 	%f62, %f2, 0f00000000;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f51, %f52, %f53, %f54}, [texture1_RECT, {%f55, %f62}];
	// inline asm
	.loc 1 61 1
	ld.shared.v4.f32 	{%f159, %f160, %f161, %f162}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+144];
	.loc 1 61 1
	fma.rn.ftz.f32 	%f164, %f53, %f159, %f156;
	fma.rn.ftz.f32 	%f166, %f52, %f160, %f157;
	fma.rn.ftz.f32 	%f168, %f51, %f161, %f158;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f57, %f58, %f59, %f60}, [texture1_RECT, {%f61, %f62}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f169, %f59, %f159, %f164;
	fma.rn.ftz.f32 	%f170, %f58, %f160, %f166;
	fma.rn.ftz.f32 	%f171, %f57, %f161, %f168;
	.loc 1 61 1
	add.ftz.f32 	%f127, %f1, 0f00000000;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f63, %f64, %f65, %f66}, [texture1_RECT, {%f127, %f92}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f172, %f65, %f159, %f169;
	fma.rn.ftz.f32 	%f173, %f64, %f160, %f170;
	fma.rn.ftz.f32 	%f174, %f63, %f161, %f171;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f69, %f70, %f71, %f72}, [texture1_RECT, {%f127, %f86}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f175, %f71, %f159, %f172;
	fma.rn.ftz.f32 	%f176, %f70, %f160, %f173;
	fma.rn.ftz.f32 	%f177, %f69, %f161, %f174;
	.loc 1 61 1
	ld.shared.v4.f32 	{%f178, %f179, %f180, %f181}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+176];
	.loc 1 61 1
	mul.ftz.f32 	%f183, %f175, %f178;
	mul.ftz.f32 	%f185, %f176, %f179;
	mul.ftz.f32 	%f187, %f177, %f180;
	.loc 1 61 1
	setp.gt.ftz.f32	%p5, %f183, %f185;
	selp.f32	%f188, %f183, %f185, %p5;
	setp.gt.ftz.f32	%p6, %f188, %f187;
	selp.f32	%f189, %f188, %f187, %p6;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f190, %f189;
	.loc 1 61 1
	selp.f32	%f191, %f185, %f183, %p5;
	setp.gt.ftz.f32	%p7, %f191, %f187;
	selp.f32	%f192, %f187, %f191, %p7;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f193, %f192;
	.loc 1 61 1
	sub.ftz.f32 	%f194, %f190, %f193;
	setp.gt.ftz.f32	%p8, %f194, 0f2EDBE6FF;
	selp.f32	%f195, %f194, 0f2EDBE6FF, %p8;
	add.ftz.f32 	%f196, %f190, %f193;
	.loc 2 2910 10
	div.rn.ftz.f32 	%f197, %f139, %f195;
	div.rn.ftz.f32 	%f198, %f139, %f196;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f199, %f183;
	cvt.ftz.sat.f32.f32	%f200, %f185;
	cvt.ftz.sat.f32.f32	%f201, %f187;
	.loc 1 61 1
	sub.ftz.f32 	%f202, %f185, %f201;
	sub.ftz.f32 	%f203, %f187, %f199;
	sub.ftz.f32 	%f204, %f183, %f200;
	.loc 1 61 1
	mul.ftz.f32 	%f205, %f197, %f202;
	mul.ftz.f32 	%f206, %f197, %f203;
	mul.ftz.f32 	%f207, %f197, %f204;
	.loc 1 61 1
	fma.rn.ftz.f32 	%f208, %f205, 0f3E2AAAAB, 0f00000000;
	fma.rn.ftz.f32 	%f209, %f206, 0f3E2AAAAB, 0f3EAAAAAB;
	fma.rn.ftz.f32 	%f210, %f207, 0f3E2AAAAB, 0f3F2AAAAB;
	mov.f32 	%f211, 0f40000004;
	.loc 1 61 1
	sub.ftz.f32 	%f212, %f211, %f196;
	.loc 2 2910 10
	div.rn.ftz.f32 	%f213, %f139, %f212;
	.loc 1 61 1
	mul.ftz.f32 	%f214, %f196, 0f3F000000;
	mov.f32 	%f215, 0f3F000000;
	.loc 1 61 1
	sub.ftz.f32 	%f216, %f215, %f214;
	setp.lt.ftz.f32	%p9, %f216, 0f00000000;
	selp.f32	%f217, %f213, %f198, %p9;
	mul.ftz.f32 	%f218, %f217, %f195;
	.loc 1 61 1
	sub.ftz.f32 	%f219, %f183, %f190;
	sub.ftz.f32 	%f220, %f185, %f190;
	.loc 1 61 1
	setp.lt.ftz.f32	%p10, %f219, 0f00000000;
	selp.f32	%f221, %f210, %f208, %p10;
	setp.lt.ftz.f32	%p11, %f220, 0f00000000;
	selp.f32	%f222, %f221, %f209, %p11;
	.loc 2 2740 10
	cvt.rmi.ftz.f32.f32	%f223, %f222;
	.loc 1 61 120
	sub.ftz.f32 	%f224, %f222, %f223;
	.loc 1 61 1
	ld.shared.v4.f32 	{%f225, %f226, %f227, %f228}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+80];
	.loc 1 61 1
	sub.ftz.f32 	%f230, %f224, %f225;
	sub.ftz.f32 	%f232, %f214, %f226;
	sub.ftz.f32 	%f234, %f218, %f227;
	.loc 2 2750 10
	abs.ftz.f32 	%f235, %f230;
	abs.ftz.f32 	%f236, %f232;
	abs.ftz.f32 	%f237, %f234;
	.loc 1 61 1
	add.ftz.f32 	%f238, %f235, 0fBF800000;
	.loc 2 2750 10
	abs.ftz.f32 	%f239, %f238;
	.loc 1 61 1
	setp.gt.ftz.f32	%p12, %f239, %f235;
	selp.f32	%f240, %f235, %f239, %p12;
	.loc 1 61 1
	ld.shared.v4.f32 	{%f241, %f242, %f243, %f244}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+96];
	.loc 1 61 1
	sub.ftz.f32 	%f246, %f241, %f240;
	sub.ftz.f32 	%f248, %f242, %f236;
	sub.ftz.f32 	%f250, %f243, %f237;
	.loc 1 61 1
	ld.shared.v4.f32 	{%f251, %f252, %f253, %f254}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+112];
	.loc 1 61 1
	mul.ftz.f32 	%f256, %f246, %f251;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f257, %f256;
	.loc 1 61 1
	mul.ftz.f32 	%f259, %f248, %f252;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f260, %f259;
	.loc 1 61 1
	mul.ftz.f32 	%f262, %f250, %f253;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f263, %f262;
	.loc 1 61 1
	mul.ftz.f32 	%f264, %f257, %f260;
	mul.ftz.f32 	%f265, %f264, %f263;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f75, %f76, %f77, %f78}, [texture0_RECT, {%f1, %f2}];
	// inline asm
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f81, %f82, %f83, %f84}, [texture0_RECT, {%f127, %f86}];
	// inline asm
	.loc 1 61 1
	ld.shared.v4.f32 	{%f266, %f267, %f268, %f269}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local];
	.loc 1 61 1
	fma.rn.ftz.f32 	%f271, %f83, %f266, %f77;
	fma.rn.ftz.f32 	%f273, %f82, %f267, %f76;
	fma.rn.ftz.f32 	%f275, %f81, %f268, %f75;
	fma.rn.ftz.f32 	%f277, %f84, %f269, %f78;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f87, %f88, %f89, %f90}, [texture0_RECT, {%f127, %f92}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f278, %f89, %f266, %f271;
	fma.rn.ftz.f32 	%f279, %f88, %f267, %f273;
	fma.rn.ftz.f32 	%f280, %f87, %f268, %f275;
	fma.rn.ftz.f32 	%f281, %f90, %f269, %f277;
	.loc 1 61 1
	add.ftz.f32 	%f98, %f2, 0fC0000000;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f93, %f94, %f95, %f96}, [texture0_RECT, {%f127, %f98}];
	// inline asm
	.loc 1 61 1
	ld.shared.v4.f32 	{%f282, %f283, %f284, %f285}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+16];
	.loc 1 61 1
	fma.rn.ftz.f32 	%f287, %f95, %f282, %f278;
	fma.rn.ftz.f32 	%f289, %f94, %f283, %f279;
	fma.rn.ftz.f32 	%f291, %f93, %f284, %f280;
	fma.rn.ftz.f32 	%f293, %f96, %f285, %f281;
	.loc 1 61 1
	add.ftz.f32 	%f104, %f2, 0f40000000;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f99, %f100, %f101, %f102}, [texture0_RECT, {%f127, %f104}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f294, %f101, %f282, %f287;
	fma.rn.ftz.f32 	%f295, %f100, %f283, %f289;
	fma.rn.ftz.f32 	%f296, %f99, %f284, %f291;
	fma.rn.ftz.f32 	%f297, %f102, %f285, %f293;
	.loc 1 61 1
	add.ftz.f32 	%f110, %f2, 0fC0400000;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f105, %f106, %f107, %f108}, [texture0_RECT, {%f127, %f110}];
	// inline asm
	.loc 1 61 1
	ld.shared.v4.f32 	{%f298, %f299, %f300, %f301}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+32];
	.loc 1 61 1
	fma.rn.ftz.f32 	%f303, %f107, %f298, %f294;
	fma.rn.ftz.f32 	%f305, %f106, %f299, %f295;
	fma.rn.ftz.f32 	%f307, %f105, %f300, %f296;
	fma.rn.ftz.f32 	%f309, %f108, %f301, %f297;
	.loc 1 61 1
	add.ftz.f32 	%f116, %f2, 0f40400000;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f111, %f112, %f113, %f114}, [texture0_RECT, {%f127, %f116}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f310, %f113, %f298, %f303;
	fma.rn.ftz.f32 	%f311, %f112, %f299, %f305;
	fma.rn.ftz.f32 	%f312, %f111, %f300, %f307;
	fma.rn.ftz.f32 	%f313, %f114, %f301, %f309;
	.loc 1 61 1
	add.ftz.f32 	%f122, %f2, 0fC0800000;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f117, %f118, %f119, %f120}, [texture0_RECT, {%f127, %f122}];
	// inline asm
	.loc 1 61 1
	ld.shared.v4.f32 	{%f314, %f315, %f316, %f317}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+48];
	.loc 1 61 1
	fma.rn.ftz.f32 	%f319, %f119, %f314, %f310;
	fma.rn.ftz.f32 	%f321, %f118, %f315, %f311;
	fma.rn.ftz.f32 	%f323, %f117, %f316, %f312;
	fma.rn.ftz.f32 	%f325, %f120, %f317, %f313;
	.loc 1 61 1
	add.ftz.f32 	%f128, %f2, 0f40800000;
	.loc 1 61 119
	// inline asm
	tex.2d.v4.f32.f32 {%f123, %f124, %f125, %f126}, [texture0_RECT, {%f127, %f128}];
	// inline asm
	.loc 1 61 1
	fma.rn.ftz.f32 	%f326, %f125, %f314, %f319;
	fma.rn.ftz.f32 	%f327, %f124, %f315, %f321;
	fma.rn.ftz.f32 	%f328, %f123, %f316, %f323;
	fma.rn.ftz.f32 	%f329, %f126, %f317, %f325;
	.loc 1 61 1
	ld.shared.v4.f32 	{%f330, %f331, %f332, %f333}, [ShaderKernel_GaussianBlurRange$__cuda_local_var_170299_642_non_const_p_local+64];
	.loc 1 61 1
	mul.ftz.f32 	%f335, %f326, %f330;
	mul.ftz.f32 	%f337, %f327, %f331;
	mul.ftz.f32 	%f339, %f328, %f332;
	mul.ftz.f32 	%f341, %f329, %f333;
	.loc 1 61 1
	sub.ftz.f32 	%f342, %f139, %f265;
	mul.ftz.f32 	%f343, %f342, %f23;
	fma.rn.ftz.f32 	%f3, %f265, %f335, %f343;
	mul.ftz.f32 	%f344, %f342, %f22;
	fma.rn.ftz.f32 	%f4, %f265, %f337, %f344;
	mul.ftz.f32 	%f345, %f342, %f21;
	fma.rn.ftz.f32 	%f5, %f265, %f339, %f345;
	mul.ftz.f32 	%f346, %f342, %f24;
	fma.rn.ftz.f32 	%f6, %f265, %f341, %f346;
	.loc 1 61 1
	mad.lo.s32 	%r13, %r3, %r4, %r2;
	.loc 1 61 1
	cvt.s64.s32	%rd3, %r13;
	.loc 1 61 1
	setp.eq.s32	%p13, %r5, 0;
	@%p13 bra 	BB0_5;

	.loc 1 61 1
	shl.b64 	%rd46, %rd3, 4;
	add.s64 	%rd47, %rd1, %rd46;
	st.global.v4.f32 	[%rd47], {%f5, %f4, %f3, %f6};
	bra.uni 	BB0_6;

BB0_5:
	.loc 1 61 1
	shl.b64 	%rd48, %rd3, 3;
	add.s64 	%rd49, %rd1, %rd48;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f5;
	mov.b16 	%rs1, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f4;
	mov.b16 	%rs2, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f3;
	mov.b16 	%rs3, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f6;
	mov.b16 	%rs4, %temp;
}
	.loc 1 61 241
	st.global.v4.u16 	[%rd49], {%rs1, %rs2, %rs3, %rs4};

BB0_6:
	.loc 1 61 2
	ret;
}


