//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Wed Jul 10 12:41:20 2013 (1373485280)
// Cuda compilation tools, release 5.5, V5.5.0
//

.version 3.2
.target sm_30
.address_size 64

	.file	1 "D:/singlebarrel/releases/2014.03/shared/adobe/Iridas/IRIDASLIB/GPU/fxSobelOperator.cu", 1399785249, 3202
	.file	2 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\mediacore\\external\\3rdparty\\nvidia\\cuda\\win\\include\\device_functions.h", 1399785281, 191626
.global .texref texture0_RECT;
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};

.visible .entry ShaderKernel_fxSobelOperator(
	.param .u64 ShaderKernel_fxSobelOperator_param_0,
	.param .u32 ShaderKernel_fxSobelOperator_param_1,
	.param .u32 ShaderKernel_fxSobelOperator_param_2,
	.param .u32 ShaderKernel_fxSobelOperator_param_3,
	.param .u32 ShaderKernel_fxSobelOperator_param_4,
	.param .u64 ShaderKernel_fxSobelOperator_param_5,
	.param .u64 ShaderKernel_fxSobelOperator_param_6
)
{
	.reg .pred 	%p<5>;
	.reg .s16 	%rs<5>;
	.reg .s32 	%r<14>;
	.reg .f32 	%f<102>;
	.reg .s64 	%rd<25>;


	ld.param.u64 	%rd2, [ShaderKernel_fxSobelOperator_param_0];
	ld.param.u32 	%r4, [ShaderKernel_fxSobelOperator_param_1];
	ld.param.u32 	%r5, [ShaderKernel_fxSobelOperator_param_2];
	ld.param.u32 	%r6, [ShaderKernel_fxSobelOperator_param_3];
	ld.param.u32 	%r7, [ShaderKernel_fxSobelOperator_param_4];
	cvta.to.global.u64 	%rd1, %rd2;
	.loc 1 24 1
	mov.u32 	%r8, %ntid.x;
	mov.u32 	%r9, %ctaid.x;
	mov.u32 	%r10, %tid.x;
	mad.lo.s32 	%r1, %r8, %r9, %r10;
	mov.u32 	%r11, %ntid.y;
	mov.u32 	%r12, %ctaid.y;
	mov.u32 	%r13, %tid.y;
	mad.lo.s32 	%r2, %r11, %r12, %r13;
	.loc 1 24 1
	setp.lt.s32	%p1, %r1, %r6;
	setp.lt.s32	%p2, %r2, %r7;
	and.pred  	%p3, %p1, %p2;
	.loc 1 24 1
	@!%p3 bra 	BB0_4;
	bra.uni 	BB0_1;

BB0_1:
	.loc 1 24 1
	cvt.rn.f32.s32	%f63, %r1;
	add.ftz.f32 	%f61, %f63, 0f3F000000;
	cvt.rn.f32.s32	%f64, %r2;
	add.ftz.f32 	%f62, %f64, 0f3F000000;
	.loc 1 24 1
	add.ftz.f32 	%f43, %f61, 0f00000000;
	add.ftz.f32 	%f32, %f62, 0fBF800000;
	add.ftz.f32 	%f37, %f61, 0fBF800000;
	.loc 1 24 1
	add.ftz.f32 	%f56, %f62, 0f00000000;
	add.ftz.f32 	%f50, %f62, 0f3F800000;
	mov.f32 	%f65, 0f3F800000;
	.loc 1 24 1
	add.ftz.f32 	%f55, %f61, 0f3F800000;
	.loc 1 24 111
	// inline asm
	tex.2d.v4.f32.f32 {%f9, %f10, %f11, %f12}, [texture0_RECT, {%f37, %f50}];
	// inline asm
	.loc 1 24 111
	// inline asm
	tex.2d.v4.f32.f32 {%f15, %f16, %f17, %f18}, [texture0_RECT, {%f55, %f32}];
	// inline asm
	.loc 1 24 1
	sub.ftz.f32 	%f66, %f17, %f11;
	sub.ftz.f32 	%f67, %f16, %f10;
	sub.ftz.f32 	%f68, %f15, %f9;
	.loc 1 24 111
	// inline asm
	tex.2d.v4.f32.f32 {%f21, %f22, %f23, %f24}, [texture0_RECT, {%f37, %f32}];
	// inline asm
	.loc 1 24 1
	sub.ftz.f32 	%f69, %f66, %f23;
	sub.ftz.f32 	%f70, %f67, %f22;
	sub.ftz.f32 	%f71, %f68, %f21;
	.loc 1 24 1
	add.ftz.f32 	%f72, %f23, %f66;
	add.ftz.f32 	%f73, %f22, %f67;
	add.ftz.f32 	%f74, %f21, %f68;
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f27, %f28, %f29, %f30}, [texture0_RECT, {%f43, %f32}];
	// inline asm
	.loc 1 24 1
	fma.rn.ftz.f32 	%f75, %f29, 0f40000000, %f72;
	fma.rn.ftz.f32 	%f76, %f28, 0f40000000, %f73;
	fma.rn.ftz.f32 	%f77, %f27, 0f40000000, %f74;
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f33, %f34, %f35, %f36}, [texture0_RECT, {%f37, %f56}];
	// inline asm
	.loc 1 24 1
	fma.rn.ftz.f32 	%f78, %f35, 0fC0000000, %f69;
	fma.rn.ftz.f32 	%f79, %f34, 0fC0000000, %f70;
	fma.rn.ftz.f32 	%f80, %f33, 0fC0000000, %f71;
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f39, %f40, %f41, %f42}, [texture0_RECT, {%f43, %f50}];
	// inline asm
	.loc 1 24 1
	fma.rn.ftz.f32 	%f81, %f41, 0fC0000000, %f75;
	fma.rn.ftz.f32 	%f82, %f40, 0fC0000000, %f76;
	fma.rn.ftz.f32 	%f83, %f39, 0fC0000000, %f77;
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f45, %f46, %f47, %f48}, [texture0_RECT, {%f55, %f50}];
	// inline asm
	.loc 1 24 1
	add.ftz.f32 	%f84, %f47, %f78;
	add.ftz.f32 	%f85, %f46, %f79;
	add.ftz.f32 	%f86, %f45, %f80;
	.loc 1 24 1
	sub.ftz.f32 	%f87, %f81, %f47;
	sub.ftz.f32 	%f88, %f82, %f46;
	sub.ftz.f32 	%f89, %f83, %f45;
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f51, %f52, %f53, %f54}, [texture0_RECT, {%f55, %f56}];
	// inline asm
	.loc 1 24 1
	fma.rn.ftz.f32 	%f90, %f53, 0f40000000, %f84;
	fma.rn.ftz.f32 	%f91, %f52, 0f40000000, %f85;
	fma.rn.ftz.f32 	%f92, %f51, 0f40000000, %f86;
	.loc 1 24 1
	mul.ftz.f32 	%f93, %f90, %f90;
	mul.ftz.f32 	%f94, %f91, %f91;
	mul.ftz.f32 	%f95, %f92, %f92;
	.loc 1 24 1
	fma.rn.ftz.f32 	%f96, %f87, %f87, %f93;
	fma.rn.ftz.f32 	%f97, %f88, %f88, %f94;
	fma.rn.ftz.f32 	%f98, %f89, %f89, %f95;
	.loc 2 2775 10
	rsqrt.approx.ftz.f32 	%f99, %f96;
	.loc 2 2910 10
	div.rn.ftz.f32 	%f7, %f65, %f99;
	.loc 2 2775 10
	rsqrt.approx.ftz.f32 	%f100, %f97;
	.loc 2 2910 10
	div.rn.ftz.f32 	%f6, %f65, %f100;
	.loc 2 2775 10
	rsqrt.approx.ftz.f32 	%f101, %f98;
	.loc 2 2910 10
	div.rn.ftz.f32 	%f5, %f65, %f101;
	// inline asm
	tex.2d.v4.f32.f32 {%f57, %f58, %f59, %f60}, [texture0_RECT, {%f61, %f62}];
	// inline asm
	.loc 1 24 1
	mad.lo.s32 	%r3, %r2, %r4, %r1;
	.loc 1 24 1
	setp.eq.s32	%p4, %r5, 0;
	@%p4 bra 	BB0_3;

	mul.wide.s32 	%rd21, %r3, 16;
	add.s64 	%rd22, %rd1, %rd21;
	.loc 1 24 1
	st.global.v4.f32 	[%rd22], {%f5, %f6, %f7, %f60};
	bra.uni 	BB0_4;

BB0_3:
	mul.wide.s32 	%rd23, %r3, 8;
	add.s64 	%rd24, %rd1, %rd23;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f5;
	mov.b16 	%rs1, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f6;
	mov.b16 	%rs2, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f7;
	mov.b16 	%rs3, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f60;
	mov.b16 	%rs4, %temp;
}
	.loc 1 24 241
	st.global.v4.u16 	[%rd24], {%rs1, %rs2, %rs3, %rs4};

BB0_4:
	.loc 1 24 2
	ret;
}


