//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Wed Jul 10 12:41:20 2013 (1373485280)
// Cuda compilation tools, release 5.5, V5.5.0
//

.version 3.2
.target sm_30
.address_size 64

	.file	1 "D:/singlebarrel/releases/2014.03/shared/adobe/Iridas/IRIDASLIB/GPU/fxCrayonDrawing.cu", 1399785249, 3380
	.file	2 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\mediacore\\external\\3rdparty\\nvidia\\cuda\\win\\include\\device_functions.h", 1399785281, 191626
.global .texref texture0_RECT;
// ShaderKernel_fxCrayonDrawing$__cuda_local_var_170266_475_non_const_p_local has been demoted
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};

.visible .entry ShaderKernel_fxCrayonDrawing(
	.param .u64 ShaderKernel_fxCrayonDrawing_param_0,
	.param .u32 ShaderKernel_fxCrayonDrawing_param_1,
	.param .u32 ShaderKernel_fxCrayonDrawing_param_2,
	.param .u32 ShaderKernel_fxCrayonDrawing_param_3,
	.param .u32 ShaderKernel_fxCrayonDrawing_param_4,
	.param .u64 ShaderKernel_fxCrayonDrawing_param_5,
	.param .u64 ShaderKernel_fxCrayonDrawing_param_6
)
{
	.reg .pred 	%p<7>;
	.reg .s16 	%rs<3>;
	.reg .s32 	%r<14>;
	.reg .f32 	%f<121>;
	.reg .s64 	%rd<28>;
	// demoted variable
	.shared .align 16 .b8 ShaderKernel_fxCrayonDrawing$__cuda_local_var_170266_475_non_const_p_local[16];

	ld.param.u64 	%rd4, [ShaderKernel_fxCrayonDrawing_param_0];
	ld.param.u32 	%r4, [ShaderKernel_fxCrayonDrawing_param_1];
	ld.param.u32 	%r5, [ShaderKernel_fxCrayonDrawing_param_2];
	ld.param.u32 	%r6, [ShaderKernel_fxCrayonDrawing_param_3];
	ld.param.u32 	%r7, [ShaderKernel_fxCrayonDrawing_param_4];
	ld.param.u64 	%rd5, [ShaderKernel_fxCrayonDrawing_param_5];
	cvta.to.global.u64 	%rd1, %rd4;
	cvta.to.global.u64 	%rd2, %rd5;
	.loc 1 28 1
	mov.u32 	%r8, %ntid.x;
	mov.u32 	%r9, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r8, %r9, %r1;
	mov.u32 	%r10, %ntid.y;
	mov.u32 	%r11, %ctaid.y;
	mov.u32 	%r12, %tid.y;
	mad.lo.s32 	%r3, %r10, %r11, %r12;
	.loc 1 28 1
	setp.lt.s32	%p1, %r2, %r6;
	setp.lt.s32	%p2, %r3, %r7;
	and.pred  	%p3, %p1, %p2;
	.loc 1 28 1
	@!%p3 bra 	BB0_6;
	bra.uni 	BB0_1;

BB0_1:
	.loc 1 28 1
	cvt.rn.f32.s32	%f9, %r2;
	add.ftz.f32 	%f1, %f9, 0f3F000000;
	cvt.rn.f32.s32	%f10, %r3;
	add.ftz.f32 	%f2, %f10, 0f3F000000;
	.loc 1 28 1
	setp.ne.s32	%p4, %r1, 0;
	@%p4 bra 	BB0_3;

	.loc 1 28 1
	ld.global.v4.f32 	{%f11, %f12, %f13, %f14}, [%rd2];
	st.shared.v4.f32 	[ShaderKernel_fxCrayonDrawing$__cuda_local_var_170266_475_non_const_p_local], {%f11, %f12, %f13, %f14};

BB0_3:
	.loc 1 28 1
	bar.sync 	0;
	.loc 1 28 1
	add.ftz.f32 	%f60, %f2, 0f3F800000;
	mov.f32 	%f73, 0f3F800000;
	.loc 1 28 1
	add.ftz.f32 	%f47, %f1, 0fBF800000;
	.loc 1 28 111
	// inline asm
	tex.2d.v4.f32.f32 {%f19, %f20, %f21, %f22}, [texture0_RECT, {%f47, %f60}];
	// inline asm
	.loc 1 28 1
	add.ftz.f32 	%f65, %f1, 0f3F800000;
	.loc 1 28 1
	add.ftz.f32 	%f42, %f2, 0fBF800000;
	.loc 1 28 111
	// inline asm
	tex.2d.v4.f32.f32 {%f25, %f26, %f27, %f28}, [texture0_RECT, {%f65, %f42}];
	// inline asm
	.loc 1 28 1
	sub.ftz.f32 	%f74, %f27, %f21;
	sub.ftz.f32 	%f75, %f26, %f20;
	sub.ftz.f32 	%f76, %f25, %f19;
	.loc 1 28 111
	// inline asm
	tex.2d.v4.f32.f32 {%f31, %f32, %f33, %f34}, [texture0_RECT, {%f47, %f42}];
	// inline asm
	.loc 1 28 1
	sub.ftz.f32 	%f77, %f74, %f33;
	sub.ftz.f32 	%f78, %f75, %f32;
	sub.ftz.f32 	%f79, %f76, %f31;
	.loc 1 28 1
	add.ftz.f32 	%f80, %f33, %f74;
	add.ftz.f32 	%f81, %f32, %f75;
	add.ftz.f32 	%f82, %f31, %f76;
	.loc 1 28 1
	add.ftz.f32 	%f53, %f1, 0f00000000;
	.loc 1 28 119
	// inline asm
	tex.2d.v4.f32.f32 {%f37, %f38, %f39, %f40}, [texture0_RECT, {%f53, %f42}];
	// inline asm
	.loc 1 28 1
	fma.rn.ftz.f32 	%f83, %f39, 0f40000000, %f80;
	fma.rn.ftz.f32 	%f84, %f38, 0f40000000, %f81;
	fma.rn.ftz.f32 	%f85, %f37, 0f40000000, %f82;
	.loc 1 28 1
	add.ftz.f32 	%f66, %f2, 0f00000000;
	.loc 1 28 119
	// inline asm
	tex.2d.v4.f32.f32 {%f43, %f44, %f45, %f46}, [texture0_RECT, {%f47, %f66}];
	// inline asm
	.loc 1 28 1
	fma.rn.ftz.f32 	%f86, %f45, 0fC0000000, %f77;
	fma.rn.ftz.f32 	%f87, %f44, 0fC0000000, %f78;
	fma.rn.ftz.f32 	%f88, %f43, 0fC0000000, %f79;
	.loc 1 28 119
	// inline asm
	tex.2d.v4.f32.f32 {%f49, %f50, %f51, %f52}, [texture0_RECT, {%f53, %f60}];
	// inline asm
	.loc 1 28 1
	fma.rn.ftz.f32 	%f89, %f51, 0fC0000000, %f83;
	fma.rn.ftz.f32 	%f90, %f50, 0fC0000000, %f84;
	fma.rn.ftz.f32 	%f91, %f49, 0fC0000000, %f85;
	.loc 1 28 119
	// inline asm
	tex.2d.v4.f32.f32 {%f55, %f56, %f57, %f58}, [texture0_RECT, {%f65, %f60}];
	// inline asm
	.loc 1 28 1
	add.ftz.f32 	%f92, %f57, %f86;
	add.ftz.f32 	%f93, %f56, %f87;
	add.ftz.f32 	%f94, %f55, %f88;
	.loc 1 28 1
	sub.ftz.f32 	%f95, %f89, %f57;
	sub.ftz.f32 	%f96, %f90, %f56;
	sub.ftz.f32 	%f97, %f91, %f55;
	.loc 1 28 119
	// inline asm
	tex.2d.v4.f32.f32 {%f61, %f62, %f63, %f64}, [texture0_RECT, {%f65, %f66}];
	// inline asm
	.loc 1 28 1
	fma.rn.ftz.f32 	%f98, %f63, 0f40000000, %f92;
	fma.rn.ftz.f32 	%f99, %f62, 0f40000000, %f93;
	fma.rn.ftz.f32 	%f100, %f61, 0f40000000, %f94;
	.loc 1 28 1
	mul.ftz.f32 	%f101, %f98, %f98;
	mul.ftz.f32 	%f102, %f99, %f99;
	mul.ftz.f32 	%f103, %f100, %f100;
	.loc 1 28 1
	fma.rn.ftz.f32 	%f104, %f95, %f95, %f101;
	fma.rn.ftz.f32 	%f105, %f96, %f96, %f102;
	fma.rn.ftz.f32 	%f106, %f97, %f97, %f103;
	.loc 1 28 1
	ld.shared.v4.f32 	{%f107, %f108, %f109, %f110}, [ShaderKernel_fxCrayonDrawing$__cuda_local_var_170266_475_non_const_p_local];
	.loc 1 28 1
	mul.ftz.f32 	%f112, %f105, %f108;
	fma.rn.ftz.f32 	%f114, %f104, %f107, %f112;
	fma.rn.ftz.f32 	%f116, %f106, %f109, %f114;
	.loc 1 28 1
	setp.gt.ftz.f32	%p5, %f116, 0f322BCC77;
	selp.f32	%f117, %f116, 0f322BCC77, %p5;
	.loc 2 2775 10
	rsqrt.approx.ftz.f32 	%f118, %f117;
	.loc 1 28 1
	mul.ftz.f32 	%f119, %f118, %f117;
	.loc 2 2820 10
	cvt.ftz.sat.f32.f32	%f120, %f119;
	.loc 1 28 1
	sub.ftz.f32 	%f5, %f73, %f120;
	// inline asm
	tex.2d.v4.f32.f32 {%f67, %f68, %f69, %f70}, [texture0_RECT, {%f1, %f2}];
	// inline asm
	.loc 1 28 1
	mad.lo.s32 	%r13, %r3, %r4, %r2;
	.loc 1 28 1
	cvt.s64.s32	%rd3, %r13;
	.loc 1 28 1
	setp.eq.s32	%p6, %r5, 0;
	@%p6 bra 	BB0_5;

	.loc 1 28 1
	shl.b64 	%rd24, %rd3, 4;
	add.s64 	%rd25, %rd1, %rd24;
	st.global.v4.f32 	[%rd25], {%f5, %f5, %f5, %f70};
	bra.uni 	BB0_6;

BB0_5:
	.loc 1 28 1
	shl.b64 	%rd26, %rd3, 3;
	add.s64 	%rd27, %rd1, %rd26;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f5;
	mov.b16 	%rs1, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f70;
	mov.b16 	%rs2, %temp;
}
	.loc 1 28 241
	st.global.v4.u16 	[%rd27], {%rs1, %rs1, %rs1, %rs2};

BB0_6:
	.loc 1 28 2
	ret;
}


