//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Wed Jul 10 12:41:20 2013 (1373485280)
// Cuda compilation tools, release 5.5, V5.5.0
//

.version 3.2
.target sm_30
.address_size 64

	.file	1 "D:/singlebarrel/releases/2014.03/shared/adobe/Iridas/IRIDASLIB/GPU/fxAntiAliasH.cu", 1399785249, 3977
	.file	2 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\mediacore\\external\\3rdparty\\nvidia\\cuda\\win\\include\\device_functions.h", 1399785281, 191626
.global .texref texture0_RECT;
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};

.visible .entry ShaderKernel_fxAntiAliasH(
	.param .u64 ShaderKernel_fxAntiAliasH_param_0,
	.param .u32 ShaderKernel_fxAntiAliasH_param_1,
	.param .u32 ShaderKernel_fxAntiAliasH_param_2,
	.param .u32 ShaderKernel_fxAntiAliasH_param_3,
	.param .u32 ShaderKernel_fxAntiAliasH_param_4,
	.param .u64 ShaderKernel_fxAntiAliasH_param_5,
	.param .u64 ShaderKernel_fxAntiAliasH_param_6
)
{
	.reg .pred 	%p<10>;
	.reg .s16 	%rs<2>;
	.reg .s32 	%r<14>;
	.reg .f32 	%f<158>;
	.reg .s64 	%rd<25>;


	ld.param.u64 	%rd2, [ShaderKernel_fxAntiAliasH_param_0];
	ld.param.u32 	%r4, [ShaderKernel_fxAntiAliasH_param_1];
	ld.param.u32 	%r5, [ShaderKernel_fxAntiAliasH_param_2];
	ld.param.u32 	%r6, [ShaderKernel_fxAntiAliasH_param_3];
	ld.param.u32 	%r7, [ShaderKernel_fxAntiAliasH_param_4];
	cvta.to.global.u64 	%rd1, %rd2;
	.loc 1 24 1
	mov.u32 	%r8, %ntid.x;
	mov.u32 	%r9, %ctaid.x;
	mov.u32 	%r10, %tid.x;
	mad.lo.s32 	%r1, %r8, %r9, %r10;
	mov.u32 	%r11, %ntid.y;
	mov.u32 	%r12, %ctaid.y;
	mov.u32 	%r13, %tid.y;
	mad.lo.s32 	%r2, %r11, %r12, %r13;
	.loc 1 24 1
	setp.lt.s32	%p1, %r1, %r6;
	setp.lt.s32	%p2, %r2, %r7;
	and.pred  	%p3, %p1, %p2;
	.loc 1 24 1
	@!%p3 bra 	BB0_4;
	bra.uni 	BB0_1;

BB0_1:
	.loc 1 24 1
	cvt.rn.f32.s32	%f60, %r1;
	add.ftz.f32 	%f34, %f60, 0f3F000000;
	cvt.rn.f32.s32	%f61, %r2;
	add.ftz.f32 	%f35, %f61, 0f3F000000;
	.loc 1 24 1
	add.ftz.f32 	%f46, %f34, 0fBF800000;
	add.ftz.f32 	%f23, %f35, 0f3F800000;
	add.ftz.f32 	%f52, %f34, 0f00000000;
	.loc 1 24 1
	add.ftz.f32 	%f58, %f34, 0f3F800000;
	add.ftz.f32 	%f41, %f35, 0f00000000;
	.loc 1 24 1
	add.ftz.f32 	%f59, %f35, 0fBF800000;
	.loc 1 24 111
	// inline asm
	tex.2d.v4.f32.f32 {%f6, %f7, %f8, %f9}, [texture0_RECT, {%f46, %f23}];
	// inline asm
	.loc 1 24 111
	// inline asm
	tex.2d.v4.f32.f32 {%f12, %f13, %f14, %f15}, [texture0_RECT, {%f52, %f23}];
	// inline asm
	.loc 1 24 111
	// inline asm
	tex.2d.v4.f32.f32 {%f18, %f19, %f20, %f21}, [texture0_RECT, {%f58, %f23}];
	// inline asm
	.loc 1 24 113
	// inline asm
	tex.2d.v4.f32.f32 {%f24, %f25, %f26, %f27}, [texture0_RECT, {%f46, %f41}];
	// inline asm
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f30, %f31, %f32, %f33}, [texture0_RECT, {%f34, %f35}];
	// inline asm
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f36, %f37, %f38, %f39}, [texture0_RECT, {%f58, %f41}];
	// inline asm
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f42, %f43, %f44, %f45}, [texture0_RECT, {%f46, %f59}];
	// inline asm
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f48, %f49, %f50, %f51}, [texture0_RECT, {%f52, %f59}];
	// inline asm
	.loc 1 24 119
	// inline asm
	tex.2d.v4.f32.f32 {%f54, %f55, %f56, %f57}, [texture0_RECT, {%f58, %f59}];
	// inline asm
	.loc 1 24 1
	sub.ftz.f32 	%f62, %f8, %f14;
	sub.ftz.f32 	%f63, %f7, %f13;
	sub.ftz.f32 	%f64, %f6, %f12;
	.loc 1 24 1
	sub.ftz.f32 	%f65, %f8, %f20;
	sub.ftz.f32 	%f66, %f7, %f19;
	sub.ftz.f32 	%f67, %f6, %f18;
	.loc 2 2750 10
	abs.ftz.f32 	%f68, %f62;
	abs.ftz.f32 	%f69, %f63;
	abs.ftz.f32 	%f70, %f64;
	.loc 2 2750 10
	abs.ftz.f32 	%f71, %f65;
	abs.ftz.f32 	%f72, %f66;
	abs.ftz.f32 	%f73, %f67;
	.loc 1 24 1
	add.ftz.f32 	%f74, %f71, %f68;
	add.ftz.f32 	%f75, %f72, %f69;
	add.ftz.f32 	%f76, %f73, %f70;
	.loc 1 24 1
	add.ftz.f32 	%f77, %f74, %f75;
	add.ftz.f32 	%f78, %f77, %f76;
	.loc 1 24 1
	sub.ftz.f32 	%f79, %f26, %f32;
	sub.ftz.f32 	%f80, %f25, %f31;
	sub.ftz.f32 	%f81, %f24, %f30;
	.loc 1 24 1
	sub.ftz.f32 	%f82, %f26, %f38;
	sub.ftz.f32 	%f83, %f25, %f37;
	sub.ftz.f32 	%f84, %f24, %f36;
	.loc 2 2750 10
	abs.ftz.f32 	%f85, %f79;
	abs.ftz.f32 	%f86, %f80;
	abs.ftz.f32 	%f87, %f81;
	.loc 2 2750 10
	abs.ftz.f32 	%f88, %f82;
	abs.ftz.f32 	%f89, %f83;
	abs.ftz.f32 	%f90, %f84;
	.loc 1 24 1
	add.ftz.f32 	%f91, %f88, %f85;
	add.ftz.f32 	%f92, %f89, %f86;
	add.ftz.f32 	%f93, %f90, %f87;
	.loc 1 24 1
	add.ftz.f32 	%f94, %f91, %f92;
	add.ftz.f32 	%f95, %f94, %f93;
	.loc 1 24 1
	sub.ftz.f32 	%f96, %f44, %f50;
	sub.ftz.f32 	%f97, %f43, %f49;
	sub.ftz.f32 	%f98, %f42, %f48;
	.loc 1 24 1
	sub.ftz.f32 	%f99, %f44, %f56;
	sub.ftz.f32 	%f100, %f43, %f55;
	sub.ftz.f32 	%f101, %f42, %f54;
	.loc 2 2750 10
	abs.ftz.f32 	%f102, %f96;
	abs.ftz.f32 	%f103, %f97;
	abs.ftz.f32 	%f104, %f98;
	.loc 2 2750 10
	abs.ftz.f32 	%f105, %f99;
	abs.ftz.f32 	%f106, %f100;
	abs.ftz.f32 	%f107, %f101;
	.loc 1 24 1
	add.ftz.f32 	%f108, %f105, %f102;
	add.ftz.f32 	%f109, %f106, %f103;
	add.ftz.f32 	%f110, %f107, %f104;
	.loc 1 24 1
	add.ftz.f32 	%f111, %f108, %f109;
	add.ftz.f32 	%f112, %f111, %f110;
	.loc 1 24 1
	add.ftz.f32 	%f113, %f8, %f14;
	add.ftz.f32 	%f114, %f7, %f13;
	add.ftz.f32 	%f115, %f6, %f12;
	.loc 1 24 1
	add.ftz.f32 	%f116, %f113, %f78;
	add.ftz.f32 	%f117, %f114, %f95;
	add.ftz.f32 	%f118, %f115, %f112;
	.loc 1 24 1
	add.ftz.f32 	%f119, %f26, %f32;
	add.ftz.f32 	%f120, %f25, %f31;
	add.ftz.f32 	%f121, %f24, %f30;
	.loc 1 24 1
	add.ftz.f32 	%f122, %f119, %f38;
	add.ftz.f32 	%f123, %f120, %f37;
	add.ftz.f32 	%f124, %f121, %f36;
	.loc 1 24 1
	add.ftz.f32 	%f125, %f44, %f50;
	add.ftz.f32 	%f126, %f43, %f49;
	add.ftz.f32 	%f127, %f42, %f48;
	.loc 1 24 1
	add.ftz.f32 	%f128, %f125, %f56;
	add.ftz.f32 	%f129, %f126, %f55;
	add.ftz.f32 	%f130, %f127, %f54;
	.loc 1 24 1
	sub.ftz.f32 	%f131, %f122, %f116;
	sub.ftz.f32 	%f132, %f123, %f117;
	sub.ftz.f32 	%f133, %f124, %f118;
	.loc 2 2750 10
	abs.ftz.f32 	%f134, %f131;
	abs.ftz.f32 	%f135, %f132;
	abs.ftz.f32 	%f136, %f133;
	.loc 1 24 1
	mul.ftz.f32 	%f137, %f135, 0f3EAAAAAB;
	fma.rn.ftz.f32 	%f138, %f134, 0f3EAAAAAB, %f137;
	fma.rn.ftz.f32 	%f139, %f136, 0f3EAAAAAB, %f138;
	.loc 1 24 1
	sub.ftz.f32 	%f140, %f122, %f128;
	sub.ftz.f32 	%f141, %f123, %f129;
	sub.ftz.f32 	%f142, %f124, %f130;
	.loc 2 2750 10
	abs.ftz.f32 	%f143, %f140;
	abs.ftz.f32 	%f144, %f141;
	abs.ftz.f32 	%f145, %f142;
	.loc 1 24 1
	mul.ftz.f32 	%f146, %f144, 0f3EAAAAAB;
	fma.rn.ftz.f32 	%f147, %f143, 0f3EAAAAAB, %f146;
	fma.rn.ftz.f32 	%f148, %f145, 0f3EAAAAAB, %f147;
	.loc 1 24 1
	setp.lt.ftz.f32	%p4, %f78, 0f3EB33333;
	selp.f32	%f149, 0f3F800000, 0f00000000, %p4;
	setp.lt.ftz.f32	%p5, %f95, 0f3EB33333;
	selp.f32	%f150, 0f3F800000, 0f00000000, %p5;
	setp.lt.ftz.f32	%p6, %f112, 0f3EB33333;
	selp.f32	%f151, 0f3F800000, 0f00000000, %p6;
	.loc 1 24 1
	setp.ltu.ftz.f32	%p7, %f139, 0f3D851EB8;
	selp.f32	%f152, 0f00000000, 0f3F800000, %p7;
	setp.ltu.ftz.f32	%p8, %f148, 0f3D851EB8;
	selp.f32	%f153, 0f00000000, 0f3F800000, %p8;
	.loc 1 24 1
	mul.ftz.f32 	%f154, %f152, %f149;
	mul.ftz.f32 	%f155, %f153, %f150;
	mul.ftz.f32 	%f156, %f152, %f151;
	.loc 1 24 1
	mul.ftz.f32 	%f157, %f154, %f155;
	.loc 1 24 1
	mul.ftz.f32 	%f2, %f157, %f156;
	.loc 1 24 1
	mad.lo.s32 	%r3, %r2, %r4, %r1;
	.loc 1 24 1
	setp.eq.s32	%p9, %r5, 0;
	@%p9 bra 	BB0_3;

	mul.wide.s32 	%rd21, %r3, 16;
	add.s64 	%rd22, %rd1, %rd21;
	.loc 1 24 1
	st.global.v4.f32 	[%rd22], {%f2, %f2, %f2, %f2};
	bra.uni 	BB0_4;

BB0_3:
	mul.wide.s32 	%rd23, %r3, 8;
	add.s64 	%rd24, %rd1, %rd23;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f2;
	mov.b16 	%rs1, %temp;
}
	.loc 1 24 241
	st.global.v4.u16 	[%rd24], {%rs1, %rs1, %rs1, %rs1};

BB0_4:
	.loc 1 24 2
	ret;
}


