//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Wed Jul 10 12:41:20 2013 (1373485280)
// Cuda compilation tools, release 5.5, V5.5.0
//

.version 3.2
.target sm_30
.address_size 64

	.file	1 "D:/singlebarrel/releases/2014.03/shared/adobe/MediaCore/GPUFoundation/Src/ImageProcessing/CrossDissolve.cu", 1399785310, 4364
	.file	2 "d:\\singlebarrel\\releases\\2014.03\\shared\\adobe\\mediacore\\external\\3rdparty\\nvidia\\cuda\\win\\include\\device_functions.h", 1399785281, 191626
.global .align 1 .b8 $str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};

.visible .entry CrossDissolveKernel(
	.param .u64 CrossDissolveKernel_param_0,
	.param .u32 CrossDissolveKernel_param_1,
	.param .u64 CrossDissolveKernel_param_2,
	.param .u32 CrossDissolveKernel_param_3,
	.param .u64 CrossDissolveKernel_param_4,
	.param .u32 CrossDissolveKernel_param_5,
	.param .u32 CrossDissolveKernel_param_6,
	.param .u32 CrossDissolveKernel_param_7,
	.param .u32 CrossDissolveKernel_param_8,
	.param .f32 CrossDissolveKernel_param_9,
	.param .u32 CrossDissolveKernel_param_10
)
{
	.reg .pred 	%p<21>;
	.reg .s16 	%rs<21>;
	.reg .s32 	%r<27>;
	.reg .f32 	%f<220>;
	.reg .s64 	%rd<20>;


	ld.param.u64 	%rd4, [CrossDissolveKernel_param_0];
	ld.param.u32 	%r6, [CrossDissolveKernel_param_1];
	ld.param.u64 	%rd5, [CrossDissolveKernel_param_2];
	ld.param.u32 	%r7, [CrossDissolveKernel_param_3];
	ld.param.u64 	%rd3, [CrossDissolveKernel_param_4];
	ld.param.u32 	%r8, [CrossDissolveKernel_param_5];
	ld.param.u32 	%r9, [CrossDissolveKernel_param_6];
	ld.param.u32 	%r11, [CrossDissolveKernel_param_7];
	ld.param.u32 	%r12, [CrossDissolveKernel_param_8];
	ld.param.f32 	%f85, [CrossDissolveKernel_param_9];
	ld.param.u32 	%r10, [CrossDissolveKernel_param_10];
	cvta.to.global.u64 	%rd1, %rd5;
	cvta.to.global.u64 	%rd2, %rd4;
	.loc 1 29 1
	mov.u32 	%r13, %ntid.x;
	mov.u32 	%r14, %ctaid.x;
	mov.u32 	%r15, %tid.x;
	mad.lo.s32 	%r1, %r13, %r14, %r15;
	mov.u32 	%r16, %ntid.y;
	mov.u32 	%r17, %ctaid.y;
	mov.u32 	%r18, %tid.y;
	mad.lo.s32 	%r2, %r16, %r17, %r18;
	.loc 1 29 1
	setp.lt.s32	%p1, %r1, %r11;
	setp.lt.s32	%p2, %r2, %r12;
	and.pred  	%p3, %p1, %p2;
	.loc 1 29 1
	@!%p3 bra 	BB0_46;
	bra.uni 	BB0_1;

BB0_1:
	.loc 1 29 1
	mad.lo.s32 	%r3, %r2, %r6, %r1;
	setp.eq.s32	%p4, %r9, 0;
	@%p4 bra 	BB0_3;

	mul.wide.s32 	%rd6, %r3, 16;
	add.s64 	%rd7, %rd2, %rd6;
	ld.global.v4.f32 	{%f86, %f87, %f88, %f89}, [%rd7];
	mov.f32 	%f172, %f89;
	mov.f32 	%f171, %f88;
	mov.f32 	%f170, %f87;
	mov.f32 	%f169, %f86;
	bra.uni 	BB0_4;

BB0_3:
	mul.wide.s32 	%rd8, %r3, 8;
	add.s64 	%rd9, %rd2, %rd8;
	.loc 1 29 1
	ld.global.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd9];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f169, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f170, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f171, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f172, %temp;
	}

BB0_4:
	.loc 1 29 1
	mad.lo.s32 	%r4, %r2, %r7, %r1;
	mov.f32 	%f190, %f169;
	mov.f32 	%f206, %f170;
	mov.f32 	%f217, %f171;
	mov.f32 	%f177, %f172;
	.loc 1 29 1
	@%p4 bra 	BB0_6;

	mul.wide.s32 	%rd10, %r4, 16;
	add.s64 	%rd11, %rd1, %rd10;
	ld.global.v4.f32 	{%f90, %f91, %f92, %f93}, [%rd11];
	mov.f32 	%f176, %f93;
	mov.f32 	%f175, %f92;
	mov.f32 	%f174, %f91;
	mov.f32 	%f173, %f90;
	bra.uni 	BB0_7;

BB0_6:
	mul.wide.s32 	%rd12, %r4, 8;
	add.s64 	%rd13, %rd1, %rd12;
	.loc 1 29 1
	ld.global.v4.u16 	{%rs9, %rs10, %rs11, %rs12}, [%rd13];
	.loc 2 3518 10
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs9;
	cvt.f32.f16 	%f173, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs10;
	cvt.f32.f16 	%f174, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs11;
	cvt.f32.f16 	%f175, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs12;
	cvt.f32.f16 	%f176, %temp;
	}

BB0_7:
	.loc 1 29 1
	setp.eq.s32	%p6, %r10, 0;
	mov.f32 	%f192, %f173;
	mov.f32 	%f208, %f174;
	mov.f32 	%f219, %f175;
	.loc 1 29 1
	@%p6 bra 	BB0_26;

	.loc 1 29 1
	setp.ltu.ftz.f32	%p7, %f169, 0f00000000;
	@%p7 bra 	BB0_10;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f94, %f169;
	mul.ftz.f32 	%f95, %f94, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f191, %f95;
	bra.uni 	BB0_11;

BB0_10:
	.loc 1 29 144
	neg.ftz.f32 	%f96, %f169;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f97, %f96;
	mul.ftz.f32 	%f98, %f97, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f99, %f98;
	.loc 1 29 181
	neg.ftz.f32 	%f191, %f99;

BB0_11:
	mov.f32 	%f190, %f191;
	.loc 1 29 1
	setp.ltu.ftz.f32	%p8, %f170, 0f00000000;
	@%p8 bra 	BB0_13;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f100, %f170;
	mul.ftz.f32 	%f101, %f100, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f207, %f101;
	bra.uni 	BB0_14;

BB0_13:
	.loc 1 29 144
	neg.ftz.f32 	%f102, %f170;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f103, %f102;
	mul.ftz.f32 	%f104, %f103, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f105, %f104;
	.loc 1 29 181
	neg.ftz.f32 	%f207, %f105;

BB0_14:
	mov.f32 	%f206, %f207;
	.loc 1 29 1
	setp.ltu.ftz.f32	%p9, %f171, 0f00000000;
	@%p9 bra 	BB0_16;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f106, %f171;
	mul.ftz.f32 	%f107, %f106, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f218, %f107;
	bra.uni 	BB0_17;

BB0_16:
	.loc 1 29 144
	neg.ftz.f32 	%f108, %f171;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f109, %f108;
	mul.ftz.f32 	%f110, %f109, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f111, %f110;
	.loc 1 29 181
	neg.ftz.f32 	%f218, %f111;

BB0_17:
	mov.f32 	%f217, %f218;
	.loc 1 29 1
	setp.ltu.ftz.f32	%p10, %f173, 0f00000000;
	@%p10 bra 	BB0_19;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f112, %f173;
	mul.ftz.f32 	%f113, %f112, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f193, %f113;
	bra.uni 	BB0_20;

BB0_19:
	.loc 1 29 144
	neg.ftz.f32 	%f114, %f173;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f115, %f114;
	mul.ftz.f32 	%f116, %f115, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f117, %f116;
	.loc 1 29 181
	neg.ftz.f32 	%f193, %f117;

BB0_20:
	mov.f32 	%f192, %f193;
	.loc 1 29 1
	setp.ltu.ftz.f32	%p11, %f174, 0f00000000;
	@%p11 bra 	BB0_22;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f118, %f174;
	mul.ftz.f32 	%f119, %f118, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f209, %f119;
	bra.uni 	BB0_23;

BB0_22:
	.loc 1 29 144
	neg.ftz.f32 	%f120, %f174;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f121, %f120;
	mul.ftz.f32 	%f122, %f121, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f123, %f122;
	.loc 1 29 181
	neg.ftz.f32 	%f209, %f123;

BB0_23:
	mov.f32 	%f208, %f209;
	.loc 1 29 1
	setp.ltu.ftz.f32	%p12, %f175, 0f00000000;
	@%p12 bra 	BB0_25;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f124, %f175;
	mul.ftz.f32 	%f125, %f124, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f219, %f125;
	bra.uni 	BB0_26;

BB0_25:
	.loc 1 29 144
	neg.ftz.f32 	%f126, %f175;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f127, %f126;
	mul.ftz.f32 	%f128, %f127, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f129, %f128;
	.loc 1 29 181
	neg.ftz.f32 	%f219, %f129;

BB0_26:
	.loc 1 29 1
	mov.f32 	%f55, %f219;
	mov.f32 	%f52, %f217;
	mov.f32 	%f54, %f208;
	mov.f32 	%f51, %f206;
	mov.f32 	%f53, %f192;
	mov.f32 	%f50, %f190;
	add.ftz.f32 	%f130, %f172, 0fB70637BD;
	setp.gtu.ftz.f32	%p13, %f130, 0f00000000;
	@%p13 bra 	BB0_28;

	mov.f32 	%f131, 0f3F800000;
	.loc 1 29 1
	sub.ftz.f32 	%f132, %f131, %f85;
	mul.ftz.f32 	%f177, %f176, %f132;
	mov.f32 	%f189, %f53;
	mov.f32 	%f205, %f54;
	mov.f32 	%f216, %f55;
	bra.uni 	BB0_33;

BB0_28:
	.loc 1 29 1
	add.ftz.f32 	%f133, %f176, 0fB70637BD;
	setp.gtu.ftz.f32	%p14, %f133, 0f00000000;
	@%p14 bra 	BB0_30;

	.loc 1 29 1
	mul.ftz.f32 	%f177, %f172, %f85;
	mov.f32 	%f189, %f50;
	mov.f32 	%f205, %f51;
	mov.f32 	%f216, %f52;
	bra.uni 	BB0_33;

BB0_30:
	.loc 1 29 1
	sub.ftz.f32 	%f134, %f172, %f176;
	.loc 2 2750 10
	abs.ftz.f32 	%f135, %f134;
	.loc 1 29 159
	setp.lt.ftz.f32	%p15, %f135, 0f370637BD;
	mov.f32 	%f136, 0f3F800000;
	.loc 1 29 1
	sub.ftz.f32 	%f58, %f136, %f85;
	.loc 1 29 159
	@%p15 bra 	BB0_32;

	.loc 1 29 1
	mul.ftz.f32 	%f137, %f172, %f85;
	mul.ftz.f32 	%f140, %f176, %f58;
	add.ftz.f32 	%f177, %f137, %f140;
	.loc 2 3606 10
	div.approx.ftz.f32 	%f141, %f136, %f177;
	.loc 1 29 1
	mul.ftz.f32 	%f142, %f53, %f140;
	fma.rn.ftz.f32 	%f143, %f50, %f137, %f142;
	mul.ftz.f32 	%f189, %f143, %f141;
	mul.ftz.f32 	%f144, %f54, %f140;
	fma.rn.ftz.f32 	%f145, %f51, %f137, %f144;
	mul.ftz.f32 	%f205, %f145, %f141;
	mul.ftz.f32 	%f146, %f55, %f140;
	fma.rn.ftz.f32 	%f147, %f52, %f137, %f146;
	mul.ftz.f32 	%f216, %f147, %f141;
	bra.uni 	BB0_33;

BB0_32:
	.loc 1 29 1
	mul.ftz.f32 	%f148, %f53, %f58;
	fma.rn.ftz.f32 	%f189, %f50, %f85, %f148;
	mul.ftz.f32 	%f149, %f54, %f58;
	fma.rn.ftz.f32 	%f205, %f51, %f85, %f149;
	mul.ftz.f32 	%f150, %f55, %f58;
	fma.rn.ftz.f32 	%f216, %f52, %f85, %f150;

BB0_33:
	.loc 1 29 1
	mov.f32 	%f215, %f216;
	mov.f32 	%f203, %f205;
	mov.f32 	%f187, %f189;
	@%p6 bra 	BB0_43;

	.loc 1 29 1
	setp.ltu.ftz.f32	%p17, %f187, 0f00000000;
	@%p17 bra 	BB0_36;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f151, %f187;
	mul.ftz.f32 	%f152, %f151, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f188, %f152;
	bra.uni 	BB0_37;

BB0_36:
	.loc 1 29 144
	neg.ftz.f32 	%f153, %f187;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f154, %f153;
	mul.ftz.f32 	%f155, %f154, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f156, %f155;
	.loc 1 29 182
	neg.ftz.f32 	%f188, %f156;

BB0_37:
	mov.f32 	%f187, %f188;
	.loc 1 29 1
	setp.ltu.ftz.f32	%p18, %f203, 0f00000000;
	@%p18 bra 	BB0_39;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f157, %f203;
	mul.ftz.f32 	%f158, %f157, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f204, %f158;
	bra.uni 	BB0_40;

BB0_39:
	.loc 1 29 144
	neg.ftz.f32 	%f159, %f203;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f160, %f159;
	mul.ftz.f32 	%f161, %f160, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f162, %f161;
	.loc 1 29 182
	neg.ftz.f32 	%f204, %f162;

BB0_40:
	mov.f32 	%f203, %f204;
	.loc 1 29 1
	setp.ltu.ftz.f32	%p19, %f215, 0f00000000;
	@%p19 bra 	BB0_42;

	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f163, %f215;
	mul.ftz.f32 	%f164, %f163, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f215, %f164;
	bra.uni 	BB0_43;

BB0_42:
	.loc 1 29 144
	neg.ftz.f32 	%f165, %f215;
	.loc 2 3600 10
	lg2.approx.ftz.f32 	%f166, %f165;
	mul.ftz.f32 	%f167, %f166, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f168, %f167;
	.loc 1 29 182
	neg.ftz.f32 	%f215, %f168;

BB0_43:
	.loc 1 29 1
	mad.lo.s32 	%r5, %r2, %r8, %r1;
	.loc 1 29 1
	@%p4 bra 	BB0_45;

	cvta.to.global.u64 	%rd14, %rd3;
	mul.wide.s32 	%rd15, %r5, 16;
	add.s64 	%rd16, %rd14, %rd15;
	.loc 1 29 1
	st.global.v4.f32 	[%rd16], {%f187, %f203, %f215, %f177};
	bra.uni 	BB0_46;

BB0_45:
	cvta.to.global.u64 	%rd17, %rd3;
	mul.wide.s32 	%rd18, %r5, 8;
	add.s64 	%rd19, %rd17, %rd18;
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f187;
	mov.b16 	%rs17, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f203;
	mov.b16 	%rs18, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f215;
	mov.b16 	%rs19, %temp;
}
	.loc 2 3513 10
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f177;
	mov.b16 	%rs20, %temp;
}
	.loc 1 29 231
	st.global.v4.u16 	[%rd19], {%rs17, %rs18, %rs19, %rs20};

BB0_46:
	.loc 1 29 2
	ret;
}


