
Setting up for sample.
================================================================================

Writing to the DAC.
--------------------------------------------------------------------------------
1. Set DAC CS by writing D3 LOW to RDWR3.
2. Set the bit to write by writing D5 to RDWR3.
3. Clock in the bit by toggling D4 HIGH/LOW to RDWR3.
4. Repeat steps 2 and 3 until all 12 bits are clocked in.
5. Reset DAC CS by writing D3 HIGH to RDWR3.

ADC Clock setup.
--------------------------------------------------------------------------------
1. Select sample clock rate by writing D0, D1 and D2 to ADCCTLRDWR.
2. Select CLK1 phase by writing D5 to ADCCTLRDWR.
   For dual channel set to LOW (0 deg phase shift).
   For single channel set to HIGH (180 deg phase shift).

ADC Level setup.
--------------------------------------------------------------------------------
1. Select level divisor by writing D0 and D1 to RDWR0.
2. Select level magnifyer by writing D2 and D3 to RDWR0.
3. Set the level shifter by clocking in the value (0-255) to DACA.

ADC CHA trigger setup.
--------------------------------------------------------------------------------
1. Reset adress counter by toggling D7 LOW/HIGH to ADCCTLRDWR (ADCMR).
2. Select the trigger level by clocking in the value (0-255) to DACB.
3. Select the trigger edge by writing D0 to RDWR3. LOW=Rising edge.
4. Remove trigger FF set signal by writing D1 HIGH to RDWR3.
5. Reset trigger FF by toggling D2 LOW/HIGH to RDWR3.
6. Init sampling by writing D6 HIGH to ADCCTLRDWR (ADC/MCU).
   The sampling starts when conditions are met.

Manual trigger setup.
--------------------------------------------------------------------------------
1. Reset adress counter by toggling D7 LOW/HIGH to ADCCTLRDWR (ADCMR).
2. Remove trigger FF reset signal by writing D2 HIGH to RDWR3.
3. Set trigger FF by writing D2 LOW to RDWR3.
4. Start sampling by writing D6 HIGH to ADCCTLRDWR (ADC/MCU).

Logic analyser trigger setup.
--------------------------------------------------------------------------------
1. Reset adress counter by toggling D7 LOW/HIGH to ADCCTLRDWR (ADCMR).
2. Remove trigger FF reset signal by writing D2 HIGH to RDWR3.
3. Set trigger FF by writing D2 LOW to RDWR3.
4. Poll RDWR1 or RDWR3 until conditions are met.
5. Start sampling by writing D6 HIGH to ADCCTLRDWR (ADC/MCU).

Reading the sampled data.
================================================================================

Selecting RAM to read.
--------------------------------------------------------------------------------
1. Select RAM by setting D3 and D4 in ADCCTLRDWR to RDWR0, RDWR1, RDWR2 or RDWR3.

Read the selected RAM.
--------------------------------------------------------------------------------
1. Reset adress counter by toggling D7 LOW/HIGH to ADCCTLRDWR (ADCMR).
2. Read the data by a read from ADCRDWR. The adress counter is auto incremented.
3. Send the byte to USB.
4. Repeat steps 2 and 3 until 32K are read.

Frequency counter.
================================================================================
1. Reset adress counter by toggling D7 LOW/HIGH to ADCCTLRDWR (ADCMR).
2. Set FRQCNT by writing D& HIGH to RDWR3.
3. Cont LOW to HIGH transitions on DI3 by incrementing DPTR.
4. Repeat step 3 until 1 second is elapsed.
5. Save DPTR. It will be the higher 16 bits of the frequency.
6. Reset FRQCNT by writing D& LOW to RDWR3.
7. Read RDWR0 and increment DPTR to keep track of number of reads
8. Repeat step 6 until adress counter rolls over. A rollower is detected when
   D0 of ADCCTLRDWR goes from HIGH to LOW.
9. Negate DPTR and it will be the lower 16 bits of the frequency.
