//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Fri Jul 25 04:36:16 2014 (1406288176)
// Cuda compilation tools, release 6.5, V6.5.13
//

.version 4.1
.target sm_30
.address_size 64

.const .align 4 .b8 kRGB32f_To_601YPbPr[36] = {135, 22, 153, 62, 162, 69, 22, 63, 213, 120, 233, 61, 33, 201, 44, 190, 111, 155, 169, 190, 0, 0, 0, 63, 0, 0, 0, 63, 70, 94, 214, 190, 232, 134, 166, 189};
.const .align 4 .b8 k601YPbPr_To_RGB32f[36] = {0, 0, 128, 63, 0, 0, 0, 0, 188, 116, 179, 63, 0, 0, 128, 63, 152, 50, 176, 190, 158, 209, 54, 191, 0, 0, 128, 63, 229, 208, 226, 63, 0, 0, 0, 0};
.const .align 4 .b8 kRGB32f_To_601YCbCr[36] = {70, 246, 130, 66, 145, 141, 0, 67, 94, 186, 199, 65, 33, 48, 23, 194, 240, 103, 148, 194, 0, 0, 224, 66, 0, 0, 224, 66, 111, 146, 187, 194, 70, 182, 145, 193};
.const .align 4 .b8 k601YCbCr_To_RGB32f[36] = {37, 160, 149, 59, 0, 0, 0, 0, 182, 23, 205, 59, 37, 160, 149, 59, 40, 15, 201, 186, 156, 239, 80, 187, 37, 160, 149, 59, 236, 155, 1, 60, 0, 0, 0, 0};
.const .align 4 .b8 kRGB8u_To_601YCbCr[36] = {219, 121, 131, 62, 152, 14, 1, 63, 18, 131, 200, 61, 174, 199, 23, 190, 238, 252, 148, 190, 197, 224, 224, 62, 197, 224, 224, 62, 217, 78, 188, 190, 174, 71, 146, 189};
.const .align 4 .b8 k601YCbCr_To_RGB8u[36] = {127, 10, 149, 63, 0, 0, 0, 0, 160, 74, 204, 63, 127, 10, 149, 63, 254, 148, 200, 190, 184, 30, 80, 191, 127, 10, 149, 63, 78, 26, 1, 64, 0, 0, 0, 0};
.const .align 4 .b8 kRGB8u_To_601YCbCrFullRange[36] = {135, 22, 153, 62, 162, 69, 22, 63, 213, 120, 233, 61, 166, 27, 44, 190, 39, 241, 168, 190, 250, 254, 254, 62, 250, 254, 254, 62, 43, 135, 213, 190, 59, 223, 165, 189};
.const .align 4 .b8 k601YCbCrFullRange_To_RGB8u[36] = {0, 0, 128, 63, 0, 0, 0, 0, 72, 193, 178, 63, 0, 0, 128, 63, 143, 130, 175, 190, 225, 26, 54, 191, 0, 0, 128, 63, 20, 238, 225, 63, 0, 0, 0, 0};
.const .align 4 .b8 kRGB32f_To_601YCbCrFullRange[36] = {113, 125, 152, 66, 92, 175, 21, 67, 92, 143, 232, 65, 158, 111, 43, 194, 49, 72, 168, 194, 0, 0, 254, 66, 0, 0, 254, 66, 170, 177, 212, 194, 88, 57, 165, 193};
.const .align 4 .b8 k601YCbCrFullRange_To_RGB32f[36] = {129, 128, 128, 59, 0, 0, 0, 0, 188, 116, 179, 59, 129, 128, 128, 59, 194, 50, 176, 186, 179, 209, 54, 187, 129, 128, 128, 59, 229, 208, 226, 59, 0, 0, 0, 0};
.const .align 4 .b8 kRGB32f_To_709YPbPr[36] = {208, 179, 89, 62, 89, 23, 55, 63, 152, 221, 147, 61, 186, 164, 234, 189, 210, 86, 197, 190, 0, 0, 0, 63, 0, 0, 0, 63, 190, 134, 232, 190, 16, 202, 59, 189};
.const .align 4 .b8 k709YPbPr_To_RGB32f[36] = {0, 0, 128, 63, 0, 0, 0, 0, 12, 147, 201, 63, 0, 0, 128, 63, 221, 209, 63, 190, 243, 173, 239, 190, 0, 0, 128, 63, 77, 132, 237, 63, 0, 0, 0, 0};
.const .align 4 .b8 kRGB32f_To_709YCbCr[36] = {106, 60, 58, 66, 6, 161, 28, 67, 244, 253, 124, 65, 223, 79, 205, 193, 8, 172, 172, 194, 0, 0, 224, 66, 0, 0, 224, 66, 195, 117, 203, 194, 236, 81, 36, 193};
.const .align 4 .b8 k709YCbCr_To_RGB32f[36] = {37, 160, 149, 59, 0, 0, 0, 0, 239, 94, 230, 59, 37, 160, 149, 59, 33, 57, 91, 186, 178, 245, 8, 187, 37, 160, 149, 59, 82, 185, 7, 60, 0, 0, 0, 0};
.const .align 4 .b8 k709YCbCrFullRange_To_RGB32f[36] = {131, 128, 128, 59, 0, 0, 0, 0, 28, 147, 201, 59, 131, 128, 128, 59, 61, 210, 63, 186, 248, 173, 239, 186, 131, 128, 128, 59, 82, 132, 237, 59, 0, 0, 0, 0};
.const .align 4 .b8 kRGB8u_To_709YCbCr[36] = {207, 247, 58, 62, 53, 62, 29, 63, 231, 251, 125, 61, 184, 30, 206, 189, 23, 89, 173, 190, 197, 224, 224, 62, 197, 224, 224, 62, 12, 66, 204, 190, 195, 245, 36, 189};
.const .align 4 .b8 k709YCbCr_To_RGB8u[36] = {127, 10, 149, 63, 0, 0, 0, 0, 147, 120, 229, 63, 127, 10, 149, 63, 53, 94, 90, 190, 205, 108, 8, 191, 127, 10, 149, 63, 154, 49, 7, 64, 0, 0, 0, 0};
.const .align 4 .b8 k709YCbCr_To_601YCbCr[36] = {0, 0, 128, 63, 23, 100, 203, 61, 1, 77, 68, 62, 0, 0, 0, 0, 18, 103, 125, 63, 10, 158, 226, 189, 0, 0, 0, 0, 61, 98, 148, 189, 249, 191, 123, 63};
.const .align 4 .b8 k601YCbCr_To_709YCbCr[36] = {0, 0, 128, 63, 122, 165, 236, 189, 179, 237, 84, 190, 0, 0, 0, 0, 204, 98, 130, 63, 216, 188, 234, 61, 0, 0, 0, 0, 74, 179, 153, 61, 234, 61, 131, 63};
.const .align 4 .b8 kYCbCrOffset[12] = {0, 0, 128, 65, 0, 0, 0, 67, 0, 0, 0, 67};
.const .align 4 .b8 kYCbCrFullRangeOffset[12] = {0, 0, 0, 0, 0, 0, 0, 67, 0, 0, 0, 67};
// HorizontalRecursiveGaussianGray_kernel$__cuda_local_var_180336_363_non_const_smem has been demoted

.visible .func  (.param .b32 func_retval0) _Z9ReadFloatPKfi17DevicePixelFormat(
	.param .b64 _Z9ReadFloatPKfi17DevicePixelFormat_param_0,
	.param .b32 _Z9ReadFloatPKfi17DevicePixelFormat_param_1,
	.param .b32 _Z9ReadFloatPKfi17DevicePixelFormat_param_2
)
{
	.reg .pred 	%p<2>;
	.reg .s16 	%rs<2>;
	.reg .s32 	%r<2>;
	.reg .f32 	%f<7>;
	.reg .s64 	%rd<7>;


	ld.param.u64 	%rd2, [_Z9ReadFloatPKfi17DevicePixelFormat_param_0];
	ld.param.u32 	%r1, [_Z9ReadFloatPKfi17DevicePixelFormat_param_2];
	setp.eq.s32	%p1, %r1, 0;
	ld.param.s32 	%rd1, [_Z9ReadFloatPKfi17DevicePixelFormat_param_1];
	@%p1 bra 	BB0_2;

	shl.b64 	%rd3, %rd1, 2;
	add.s64 	%rd4, %rd2, %rd3;
	ld.f32 	%f4, [%rd4];
	cvt.ftz.sat.f32.f32	%f6, %f4;
	bra.uni 	BB0_3;

BB0_2:
	shl.b64 	%rd5, %rd1, 1;
	add.s64 	%rd6, %rd2, %rd5;
	ld.u16 	%rs1, [%rd6];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f5, %temp;
	}
	cvt.ftz.sat.f32.f32	%f6, %f5;

BB0_3:
	st.param.f32	[func_retval0+0], %f6;
	ret;
}

.visible .entry VerticalRecursiveGaussianGray_kernel(
	.param .u64 VerticalRecursiveGaussianGray_kernel_param_0,
	.param .u64 VerticalRecursiveGaussianGray_kernel_param_1,
	.param .u32 VerticalRecursiveGaussianGray_kernel_param_2,
	.param .u32 VerticalRecursiveGaussianGray_kernel_param_3,
	.param .u32 VerticalRecursiveGaussianGray_kernel_param_4,
	.param .u32 VerticalRecursiveGaussianGray_kernel_param_5,
	.param .f32 VerticalRecursiveGaussianGray_kernel_param_6,
	.param .f32 VerticalRecursiveGaussianGray_kernel_param_7,
	.param .f32 VerticalRecursiveGaussianGray_kernel_param_8,
	.param .f32 VerticalRecursiveGaussianGray_kernel_param_9,
	.param .f32 VerticalRecursiveGaussianGray_kernel_param_10,
	.param .f32 VerticalRecursiveGaussianGray_kernel_param_11,
	.param .f32 VerticalRecursiveGaussianGray_kernel_param_12,
	.param .f32 VerticalRecursiveGaussianGray_kernel_param_13,
	.param .f32 VerticalRecursiveGaussianGray_kernel_param_14
)
{
	.reg .pred 	%p<13>;
	.reg .s16 	%rs<8>;
	.reg .s32 	%r<25>;
	.reg .f32 	%f<77>;
	.reg .s64 	%rd<49>;


	ld.param.u64 	%rd21, [VerticalRecursiveGaussianGray_kernel_param_0];
	ld.param.u64 	%rd22, [VerticalRecursiveGaussianGray_kernel_param_1];
	ld.param.u32 	%r18, [VerticalRecursiveGaussianGray_kernel_param_2];
	ld.param.u32 	%r15, [VerticalRecursiveGaussianGray_kernel_param_3];
	ld.param.u32 	%r16, [VerticalRecursiveGaussianGray_kernel_param_4];
	ld.param.u32 	%r17, [VerticalRecursiveGaussianGray_kernel_param_5];
	ld.param.f32 	%f31, [VerticalRecursiveGaussianGray_kernel_param_6];
	ld.param.f32 	%f32, [VerticalRecursiveGaussianGray_kernel_param_7];
	ld.param.f32 	%f33, [VerticalRecursiveGaussianGray_kernel_param_8];
	ld.param.f32 	%f34, [VerticalRecursiveGaussianGray_kernel_param_9];
	ld.param.f32 	%f35, [VerticalRecursiveGaussianGray_kernel_param_10];
	ld.param.f32 	%f36, [VerticalRecursiveGaussianGray_kernel_param_11];
	ld.param.f32 	%f37, [VerticalRecursiveGaussianGray_kernel_param_12];
	ld.param.f32 	%f38, [VerticalRecursiveGaussianGray_kernel_param_13];
	ld.param.f32 	%f39, [VerticalRecursiveGaussianGray_kernel_param_14];
	cvta.to.global.u64 	%rd1, %rd22;
	mov.u32 	%r1, %ntid.x;
	mov.u32 	%r2, %ctaid.x;
	mov.u32 	%r3, %tid.x;
	mad.lo.s32 	%r24, %r1, %r2, %r3;
	setp.gt.s32	%p1, %r24, %r18;
	@%p1 bra 	BB1_29;

	cvta.to.global.u64 	%rd2, %rd21;
	setp.eq.s32	%p2, %r17, 0;
	cvt.s64.s32	%rd3, %r24;
	@%p2 bra 	BB1_3;

	shl.b64 	%rd23, %rd3, 2;
	add.s64 	%rd24, %rd1, %rd23;
	ld.global.f32 	%f40, [%rd24];
	cvt.ftz.sat.f32.f32	%f57, %f40;
	bra.uni 	BB1_4;

BB1_3:
	shl.b64 	%rd25, %rd3, 1;
	add.s64 	%rd26, %rd1, %rd25;
	ld.global.u16 	%rs1, [%rd26];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f41, %temp;
	}
	cvt.ftz.sat.f32.f32	%f57, %f41;

BB1_4:
	mul.ftz.f32 	%f63, %f57, %f39;
	setp.gt.s32	%p3, %r15, 0;
	@%p3 bra 	BB1_6;

	mov.u32 	%r23, 0;
	bra.uni 	BB1_14;

BB1_6:
	mul.ftz.f32 	%f61, %f63, 0f3F000000;
	mad.lo.s32 	%r21, %r1, %r2, %r3;
	mul.wide.s32 	%rd27, %r21, 2;
	add.s64 	%rd48, %rd2, %rd27;
	mul.wide.s32 	%rd28, %r21, 4;
	add.s64 	%rd47, %rd2, %rd28;
	add.s64 	%rd46, %rd1, %rd28;
	add.s64 	%rd45, %rd1, %rd27;
	mov.u32 	%r23, 0;
	mov.f32 	%f60, %f61;

BB1_7:
	mov.f32 	%f8, %f63;
	mov.f32 	%f6, %f60;
	mov.f32 	%f60, %f61;
	@%p2 bra 	BB1_9;

	ld.global.f32 	%f42, [%rd46];
	cvt.ftz.sat.f32.f32	%f64, %f42;
	bra.uni 	BB1_10;

BB1_9:
	ld.global.u16 	%rs2, [%rd45];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f43, %temp;
	}
	cvt.ftz.sat.f32.f32	%f64, %f43;

BB1_10:
	mov.f32 	%f63, %f64;
	mul.ftz.f32 	%f44, %f8, %f32;
	fma.rn.ftz.f32 	%f45, %f63, %f31, %f44;
	fma.rn.ftz.f32 	%f46, %f60, %f33, %f45;
	fma.rn.ftz.f32 	%f61, %f6, %f34, %f46;
	cvt.ftz.sat.f32.f32	%f13, %f61;
	@%p2 bra 	BB1_12;

	st.global.f32 	[%rd47], %f13;
	bra.uni 	BB1_13;

BB1_12:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f13;
	mov.b16 	%rs3, %temp;
}
	st.global.u16 	[%rd48], %rs3;

BB1_13:
	add.s32 	%r24, %r24, %r16;
	mul.wide.s32 	%rd29, %r16, 2;
	add.s64 	%rd48, %rd48, %rd29;
	mul.wide.s32 	%rd30, %r16, 4;
	add.s64 	%rd47, %rd47, %rd30;
	add.s64 	%rd46, %rd46, %rd30;
	add.s64 	%rd45, %rd45, %rd29;
	add.s32 	%r23, %r23, 1;
	setp.lt.s32	%p6, %r23, %r15;
	@%p6 bra 	BB1_7;

BB1_14:
	sub.s32 	%r22, %r24, %r16;
	cvt.s64.s32	%rd16, %r22;
	@%p2 bra 	BB1_16;

	shl.b64 	%rd32, %rd16, 2;
	add.s64 	%rd33, %rd1, %rd32;
	ld.global.f32 	%f47, [%rd33];
	cvt.ftz.sat.f32.f32	%f65, %f47;
	bra.uni 	BB1_17;

BB1_16:
	shl.b64 	%rd35, %rd16, 1;
	add.s64 	%rd36, %rd1, %rd35;
	ld.global.u16 	%rs4, [%rd36];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f48, %temp;
	}
	cvt.ftz.sat.f32.f32	%f65, %f48;

BB1_17:
	mul.ftz.f32 	%f74, %f65, %f39;
	setp.lt.s32	%p8, %r23, 1;
	@%p8 bra 	BB1_29;

	mul.ftz.f32 	%f69, %f74, 0f3F000000;
	mov.f32 	%f68, %f69;
	mov.f32 	%f73, %f74;

BB1_19:
	mov.f32 	%f21, %f73;
	mov.f32 	%f73, %f74;
	mov.f32 	%f19, %f68;
	mov.f32 	%f68, %f69;
	mul.ftz.f32 	%f49, %f21, %f36;
	fma.rn.ftz.f32 	%f50, %f73, %f35, %f49;
	fma.rn.ftz.f32 	%f51, %f68, %f37, %f50;
	fma.rn.ftz.f32 	%f69, %f19, %f38, %f51;
	sub.s32 	%r24, %r24, %r16;
	cvt.s64.s32	%rd18, %r24;
	@%p2 bra 	BB1_21;

	shl.b64 	%rd38, %rd18, 2;
	add.s64 	%rd39, %rd1, %rd38;
	ld.global.f32 	%f52, [%rd39];
	cvt.ftz.sat.f32.f32	%f75, %f52;
	bra.uni 	BB1_22;

BB1_21:
	shl.b64 	%rd41, %rd18, 1;
	add.s64 	%rd42, %rd1, %rd41;
	ld.global.u16 	%rs5, [%rd42];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs5;
	cvt.f32.f16 	%f53, %temp;
	}
	cvt.ftz.sat.f32.f32	%f75, %f53;

BB1_22:
	mov.f32 	%f74, %f75;
	shl.b64 	%rd43, %rd18, 2;
	add.s64 	%rd19, %rd2, %rd43;
	shl.b64 	%rd44, %rd18, 1;
	add.s64 	%rd20, %rd2, %rd44;
	@%p2 bra 	BB1_24;

	ld.global.f32 	%f54, [%rd19];
	cvt.ftz.sat.f32.f32	%f76, %f54;
	bra.uni 	BB1_25;

BB1_24:
	ld.global.u16 	%rs6, [%rd20];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs6;
	cvt.f32.f16 	%f55, %temp;
	}
	cvt.ftz.sat.f32.f32	%f76, %f55;

BB1_25:
	add.ftz.f32 	%f56, %f69, %f76;
	cvt.ftz.sat.f32.f32	%f30, %f56;
	@%p2 bra 	BB1_27;

	st.global.f32 	[%rd19], %f30;
	bra.uni 	BB1_28;

BB1_27:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f30;
	mov.b16 	%rs7, %temp;
}
	st.global.u16 	[%rd20], %rs7;

BB1_28:
	add.s32 	%r23, %r23, -1;
	setp.gt.s32	%p12, %r23, 0;
	@%p12 bra 	BB1_19;

BB1_29:
	ret;
}

.visible .entry HorizontalRecursiveGaussianGray_kernel(
	.param .u64 HorizontalRecursiveGaussianGray_kernel_param_0,
	.param .u64 HorizontalRecursiveGaussianGray_kernel_param_1,
	.param .u32 HorizontalRecursiveGaussianGray_kernel_param_2,
	.param .u32 HorizontalRecursiveGaussianGray_kernel_param_3,
	.param .u32 HorizontalRecursiveGaussianGray_kernel_param_4,
	.param .u32 HorizontalRecursiveGaussianGray_kernel_param_5,
	.param .f32 HorizontalRecursiveGaussianGray_kernel_param_6,
	.param .f32 HorizontalRecursiveGaussianGray_kernel_param_7,
	.param .f32 HorizontalRecursiveGaussianGray_kernel_param_8,
	.param .f32 HorizontalRecursiveGaussianGray_kernel_param_9,
	.param .f32 HorizontalRecursiveGaussianGray_kernel_param_10,
	.param .f32 HorizontalRecursiveGaussianGray_kernel_param_11,
	.param .f32 HorizontalRecursiveGaussianGray_kernel_param_12,
	.param .f32 HorizontalRecursiveGaussianGray_kernel_param_13,
	.param .f32 HorizontalRecursiveGaussianGray_kernel_param_14
)
{
	.reg .pred 	%p<85>;
	.reg .s16 	%rs<23>;
	.reg .s32 	%r<193>;
	.reg .f32 	%f<272>;
	.reg .s64 	%rd<117>;
	// demoted variable
	.shared .align 4 .b8 HorizontalRecursiveGaussianGray_kernel$__cuda_local_var_180336_363_non_const_smem[4224];

	ld.param.u64 	%rd59, [HorizontalRecursiveGaussianGray_kernel_param_0];
	ld.param.u64 	%rd60, [HorizontalRecursiveGaussianGray_kernel_param_1];
	ld.param.u32 	%r28, [HorizontalRecursiveGaussianGray_kernel_param_2];
	ld.param.u32 	%r29, [HorizontalRecursiveGaussianGray_kernel_param_3];
	ld.param.u32 	%r30, [HorizontalRecursiveGaussianGray_kernel_param_4];
	ld.param.u32 	%r31, [HorizontalRecursiveGaussianGray_kernel_param_5];
	ld.param.f32 	%f85, [HorizontalRecursiveGaussianGray_kernel_param_6];
	ld.param.f32 	%f86, [HorizontalRecursiveGaussianGray_kernel_param_7];
	ld.param.f32 	%f87, [HorizontalRecursiveGaussianGray_kernel_param_8];
	ld.param.f32 	%f88, [HorizontalRecursiveGaussianGray_kernel_param_9];
	ld.param.f32 	%f89, [HorizontalRecursiveGaussianGray_kernel_param_10];
	ld.param.f32 	%f90, [HorizontalRecursiveGaussianGray_kernel_param_11];
	ld.param.f32 	%f91, [HorizontalRecursiveGaussianGray_kernel_param_12];
	ld.param.f32 	%f92, [HorizontalRecursiveGaussianGray_kernel_param_13];
	ld.param.f32 	%f93, [HorizontalRecursiveGaussianGray_kernel_param_14];
	cvta.to.global.u64 	%rd1, %rd60;
	mov.u32 	%r32, %ctaid.y;
	shl.b32 	%r33, %r32, 5;
	mov.u32 	%r1, %tid.y;
	add.s32 	%r34, %r33, %r1;
	setp.eq.s32	%p7, %r1, 0;
	mov.u32 	%r2, %tid.x;
	add.s32 	%r3, %r34, %r2;
	setp.lt.s32	%p8, %r3, %r29;
	and.pred  	%p9, %p7, %p8;
	setp.gt.ftz.f32	%p10, %f93, 0f00000000;
	and.pred  	%p11, %p9, %p10;
	@%p11 bra 	BB2_2;

	mov.f32 	%f230, 0f00000000;
	bra.uni 	BB2_6;

BB2_2:
	mul.lo.s32 	%r35, %r3, %r30;
	cvt.s64.s32	%rd2, %r35;
	setp.eq.s32	%p12, %r31, 0;
	@%p12 bra 	BB2_4;

	shl.b64 	%rd61, %rd2, 2;
	add.s64 	%rd62, %rd1, %rd61;
	ld.global.f32 	%f95, [%rd62];
	cvt.ftz.sat.f32.f32	%f210, %f95;
	bra.uni 	BB2_5;

BB2_4:
	shl.b64 	%rd63, %rd2, 1;
	add.s64 	%rd64, %rd1, %rd63;
	ld.global.u16 	%rs1, [%rd64];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f96, %temp;
	}
	cvt.ftz.sat.f32.f32	%f210, %f96;

BB2_5:
	mul.ftz.f32 	%f230, %f210, %f93;

BB2_6:
	mad.lo.s32 	%r36, %r1, 33, %r2;
	mul.wide.s32 	%rd65, %r36, 4;
	mov.u64 	%rd66, HorizontalRecursiveGaussianGray_kernel$__cuda_local_var_180336_363_non_const_smem;
	add.s64 	%rd3, %rd66, %rd65;
	setp.gt.s32	%p13, %r28, 0;
	@%p13 bra 	BB2_8;

	mov.u32 	%r191, 0;
	bra.uni 	BB2_57;

BB2_8:
	mul.ftz.f32 	%f228, %f230, 0f3F000000;
	mov.u32 	%r191, 0;
	mov.u32 	%r188, %r191;
	mov.f32 	%f229, %f228;

BB2_9:
	mov.f32 	%f227, %f229;
	mov.f32 	%f225, %f228;
	add.s32 	%r43, %r1, %r33;
	mad.lo.s32 	%r45, %r43, %r30, %r2;
	shl.b32 	%r46, %r188, 5;
	add.s32 	%r6, %r45, %r46;
	cvt.s64.s32	%rd4, %r6;
	mul.wide.s32 	%rd68, %r6, 4;
	add.s64 	%rd5, %rd1, %rd68;
	mul.wide.s32 	%rd6, %r6, 2;
	add.s64 	%rd7, %rd1, %rd6;
	setp.ge.s32	%p14, %r43, %r29;
	@%p14 bra 	BB2_16;

	add.s32 	%r48, %r191, %r2;
	setp.lt.s32	%p15, %r48, %r28;
	@%p15 bra 	BB2_12;

	mov.u32 	%r49, 0;
	st.shared.u32 	[%rd3], %r49;
	bra.uni 	BB2_16;

BB2_12:
	setp.eq.s32	%p16, %r31, 0;
	@%p16 bra 	BB2_14;

	ld.global.f32 	%f97, [%rd5];
	cvt.ftz.sat.f32.f32	%f211, %f97;
	bra.uni 	BB2_15;

BB2_14:
	ld.global.u16 	%rs2, [%rd7];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f98, %temp;
	}
	cvt.ftz.sat.f32.f32	%f211, %f98;

BB2_15:
	st.shared.f32 	[%rd3], %f211;

BB2_16:
	add.s32 	%r54, %r43, 8;
	shl.b32 	%r55, %r30, 3;
	add.s32 	%r56, %r6, %r55;
	mul.wide.s32 	%rd70, %r56, 4;
	add.s64 	%rd8, %rd1, %rd70;
	mul.wide.s32 	%rd9, %r56, 2;
	add.s64 	%rd10, %rd1, %rd9;
	setp.ge.s32	%p17, %r54, %r29;
	@%p17 bra 	BB2_23;

	add.s32 	%r58, %r191, %r2;
	setp.lt.s32	%p18, %r58, %r28;
	@%p18 bra 	BB2_19;

	mov.u32 	%r59, 0;
	st.shared.u32 	[%rd3+1056], %r59;
	bra.uni 	BB2_23;

BB2_19:
	setp.eq.s32	%p19, %r31, 0;
	@%p19 bra 	BB2_21;

	ld.global.f32 	%f99, [%rd8];
	cvt.ftz.sat.f32.f32	%f212, %f99;
	bra.uni 	BB2_22;

BB2_21:
	ld.global.u16 	%rs3, [%rd10];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f100, %temp;
	}
	cvt.ftz.sat.f32.f32	%f212, %f100;

BB2_22:
	st.shared.f32 	[%rd3+1056], %f212;

BB2_23:
	add.s32 	%r64, %r43, 16;
	shl.b32 	%r65, %r30, 4;
	add.s32 	%r66, %r6, %r65;
	mul.wide.s32 	%rd72, %r66, 4;
	add.s64 	%rd11, %rd1, %rd72;
	mul.wide.s32 	%rd73, %r66, 2;
	add.s64 	%rd12, %rd1, %rd73;
	setp.ge.s32	%p20, %r64, %r29;
	@%p20 bra 	BB2_30;

	add.s32 	%r68, %r191, %r2;
	setp.lt.s32	%p21, %r68, %r28;
	@%p21 bra 	BB2_26;

	mov.u32 	%r69, 0;
	st.shared.u32 	[%rd3+2112], %r69;
	bra.uni 	BB2_30;

BB2_26:
	setp.eq.s32	%p22, %r31, 0;
	@%p22 bra 	BB2_28;

	ld.global.f32 	%f101, [%rd11];
	cvt.ftz.sat.f32.f32	%f213, %f101;
	bra.uni 	BB2_29;

BB2_28:
	ld.global.u16 	%rs4, [%rd12];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f102, %temp;
	}
	cvt.ftz.sat.f32.f32	%f213, %f102;

BB2_29:
	st.shared.f32 	[%rd3+2112], %f213;

BB2_30:
	add.s32 	%r74, %r43, 24;
	mad.lo.s32 	%r75, %r30, 24, %r6;
	mul.wide.s32 	%rd75, %r75, 4;
	add.s64 	%rd13, %rd1, %rd75;
	mul.wide.s32 	%rd14, %r75, 2;
	add.s64 	%rd15, %rd1, %rd14;
	setp.ge.s32	%p23, %r74, %r29;
	@%p23 bra 	BB2_37;

	add.s32 	%r77, %r191, %r2;
	setp.lt.s32	%p24, %r77, %r28;
	@%p24 bra 	BB2_33;

	mov.u32 	%r78, 0;
	st.shared.u32 	[%rd3+3168], %r78;
	bra.uni 	BB2_37;

BB2_33:
	setp.eq.s32	%p25, %r31, 0;
	@%p25 bra 	BB2_35;

	ld.global.f32 	%f103, [%rd13];
	cvt.ftz.sat.f32.f32	%f214, %f103;
	bra.uni 	BB2_36;

BB2_35:
	ld.global.u16 	%rs5, [%rd15];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs5;
	cvt.f32.f16 	%f104, %temp;
	}
	cvt.ftz.sat.f32.f32	%f214, %f104;

BB2_36:
	st.shared.f32 	[%rd3+3168], %f214;

BB2_37:
	mul.lo.s32 	%r79, %r2, 33;
	mul.wide.s32 	%rd76, %r79, 4;
	add.s64 	%rd78, %rd76, %rd66;
	add.s64 	%rd115, %rd78, 16;
	bar.sync 	0;
	@!%p7 bra 	BB2_40;
	bra.uni 	BB2_38;

BB2_38:
	mov.u32 	%r189, 0;
	mov.f32 	%f224, %f225;
	mov.f32 	%f226, %f227;

BB2_39:
	ld.shared.f32 	%f105, [%rd115+-16];
	mul.ftz.f32 	%f106, %f230, %f86;
	fma.rn.ftz.f32 	%f107, %f105, %f85, %f106;
	fma.rn.ftz.f32 	%f108, %f224, %f87, %f107;
	fma.rn.ftz.f32 	%f109, %f226, %f88, %f108;
	ld.shared.f32 	%f110, [%rd115+-12];
	ld.shared.f32 	%f111, [%rd115+-8];
	ld.shared.f32 	%f112, [%rd115+-4];
	st.shared.f32 	[%rd115+-16], %f109;
	mul.ftz.f32 	%f113, %f105, %f86;
	fma.rn.ftz.f32 	%f114, %f110, %f85, %f113;
	fma.rn.ftz.f32 	%f115, %f109, %f87, %f114;
	fma.rn.ftz.f32 	%f116, %f224, %f88, %f115;
	st.shared.f32 	[%rd115+-12], %f116;
	mul.ftz.f32 	%f117, %f110, %f86;
	fma.rn.ftz.f32 	%f118, %f111, %f85, %f117;
	fma.rn.ftz.f32 	%f119, %f116, %f87, %f118;
	fma.rn.ftz.f32 	%f120, %f109, %f88, %f119;
	st.shared.f32 	[%rd115+-8], %f120;
	mul.ftz.f32 	%f121, %f111, %f86;
	fma.rn.ftz.f32 	%f122, %f112, %f85, %f121;
	fma.rn.ftz.f32 	%f123, %f120, %f87, %f122;
	fma.rn.ftz.f32 	%f124, %f116, %f88, %f123;
	st.shared.f32 	[%rd115+-4], %f124;
	ld.shared.f32 	%f125, [%rd115];
	mul.ftz.f32 	%f126, %f112, %f86;
	fma.rn.ftz.f32 	%f127, %f125, %f85, %f126;
	fma.rn.ftz.f32 	%f128, %f124, %f87, %f127;
	fma.rn.ftz.f32 	%f129, %f120, %f88, %f128;
	ld.shared.f32 	%f130, [%rd115+4];
	ld.shared.f32 	%f131, [%rd115+8];
	ld.shared.f32 	%f230, [%rd115+12];
	st.shared.f32 	[%rd115], %f129;
	mul.ftz.f32 	%f132, %f125, %f86;
	fma.rn.ftz.f32 	%f133, %f130, %f85, %f132;
	fma.rn.ftz.f32 	%f134, %f129, %f87, %f133;
	fma.rn.ftz.f32 	%f135, %f124, %f88, %f134;
	st.shared.f32 	[%rd115+4], %f135;
	mul.ftz.f32 	%f136, %f130, %f86;
	fma.rn.ftz.f32 	%f137, %f131, %f85, %f136;
	fma.rn.ftz.f32 	%f138, %f135, %f87, %f137;
	fma.rn.ftz.f32 	%f227, %f129, %f88, %f138;
	st.shared.f32 	[%rd115+8], %f227;
	mul.ftz.f32 	%f139, %f131, %f86;
	fma.rn.ftz.f32 	%f140, %f230, %f85, %f139;
	fma.rn.ftz.f32 	%f141, %f227, %f87, %f140;
	fma.rn.ftz.f32 	%f225, %f135, %f88, %f141;
	st.shared.f32 	[%rd115+12], %f225;
	add.s64 	%rd115, %rd115, 32;
	add.s32 	%r189, %r189, 8;
	setp.ne.s32	%p26, %r189, 32;
	mov.f32 	%f226, %f227;
	mov.f32 	%f224, %f225;
	@%p26 bra 	BB2_39;

BB2_40:
	mov.f32 	%f229, %f227;
	mov.f32 	%f228, %f225;
	add.s32 	%r81, %r191, %r2;
	setp.lt.s32	%p2, %r81, %r28;
	setp.lt.s32	%p3, %r43, %r29;
	cvta.to.global.u64 	%rd20, %rd59;
	bar.sync 	0;
	shl.b64 	%rd79, %rd4, 2;
	add.s64 	%rd21, %rd20, %rd79;
	add.s64 	%rd22, %rd20, %rd6;
	not.pred 	%p27, %p3;
	not.pred 	%p28, %p2;
	or.pred  	%p29, %p27, %p28;
	@%p29 bra 	BB2_44;

	setp.eq.s32	%p30, %r31, 0;
	ld.shared.f32 	%f142, [%rd3];
	cvt.ftz.sat.f32.f32	%f31, %f142;
	@%p30 bra 	BB2_43;

	st.global.f32 	[%rd21], %f31;
	bra.uni 	BB2_44;

BB2_43:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f31;
	mov.b16 	%rs6, %temp;
}
	st.global.u16 	[%rd22], %rs6;

BB2_44:
	mul.wide.s32 	%rd112, %r56, 2;
	mul.wide.s32 	%rd80, %r56, 4;
	add.s64 	%rd24, %rd20, %rd80;
	add.s64 	%rd25, %rd20, %rd112;
	setp.ge.s32	%p32, %r81, %r28;
	or.pred  	%p33, %p17, %p32;
	@%p33 bra 	BB2_48;

	setp.eq.s32	%p34, %r31, 0;
	ld.shared.f32 	%f143, [%rd3+1056];
	cvt.ftz.sat.f32.f32	%f32, %f143;
	@%p34 bra 	BB2_47;

	st.global.f32 	[%rd24], %f32;
	bra.uni 	BB2_48;

BB2_47:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f32;
	mov.b16 	%rs7, %temp;
}
	st.global.u16 	[%rd25], %rs7;

BB2_48:
	mul.wide.s32 	%rd81, %r66, 4;
	add.s64 	%rd26, %rd20, %rd81;
	mul.wide.s32 	%rd82, %r66, 2;
	add.s64 	%rd27, %rd20, %rd82;
	or.pred  	%p37, %p20, %p32;
	@%p37 bra 	BB2_52;

	setp.eq.s32	%p38, %r31, 0;
	ld.shared.f32 	%f144, [%rd3+2112];
	cvt.ftz.sat.f32.f32	%f33, %f144;
	@%p38 bra 	BB2_51;

	st.global.f32 	[%rd26], %f33;
	bra.uni 	BB2_52;

BB2_51:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f33;
	mov.b16 	%rs8, %temp;
}
	st.global.u16 	[%rd27], %rs8;

BB2_52:
	mul.wide.s32 	%rd113, %r75, 2;
	mul.wide.s32 	%rd83, %r75, 4;
	add.s64 	%rd28, %rd20, %rd83;
	add.s64 	%rd29, %rd20, %rd113;
	or.pred  	%p41, %p23, %p32;
	@%p41 bra 	BB2_56;

	setp.eq.s32	%p42, %r31, 0;
	ld.shared.f32 	%f145, [%rd3+3168];
	cvt.ftz.sat.f32.f32	%f34, %f145;
	@%p42 bra 	BB2_55;

	st.global.f32 	[%rd28], %f34;
	bra.uni 	BB2_56;

BB2_55:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f34;
	mov.b16 	%rs9, %temp;
}
	st.global.u16 	[%rd29], %rs9;

BB2_56:
	bar.sync 	0;
	add.s32 	%r191, %r191, 32;
	setp.lt.s32	%p43, %r191, %r28;
	add.s32 	%r188, %r188, 1;
	@%p43 bra 	BB2_9;

BB2_57:
	@%p11 bra 	BB2_59;

	mov.f32 	%f267, 0f00000000;
	bra.uni 	BB2_63;

BB2_59:
	add.s32 	%r183, %r33, %r1;
	mad.lo.s32 	%r123, %r2, %r30, %r28;
	add.s32 	%r124, %r123, -1;
	mad.lo.s32 	%r129, %r183, %r30, %r124;
	cvt.s64.s32	%rd30, %r129;
	setp.eq.s32	%p49, %r31, 0;
	@%p49 bra 	BB2_61;

	shl.b64 	%rd85, %rd30, 2;
	add.s64 	%rd86, %rd1, %rd85;
	ld.global.f32 	%f147, [%rd86];
	cvt.ftz.sat.f32.f32	%f231, %f147;
	bra.uni 	BB2_62;

BB2_61:
	shl.b64 	%rd88, %rd30, 1;
	add.s64 	%rd89, %rd1, %rd88;
	ld.global.u16 	%rs10, [%rd89];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs10;
	cvt.f32.f16 	%f148, %temp;
	}
	cvt.ftz.sat.f32.f32	%f231, %f148;

BB2_62:
	ld.param.f32 	%f209, [HorizontalRecursiveGaussianGray_kernel_param_14];
	mul.ftz.f32 	%f267, %f231, %f209;

BB2_63:
	mov.f32 	%f265, %f267;
	setp.lt.s32	%p50, %r191, 1;
	@%p50 bra 	BB2_125;

	mul.ftz.f32 	%f249, %f265, 0f3F000000;
	add.s32 	%r134, %r1, %r33;
	add.s32 	%r136, %r2, %r191;
	mad.lo.s32 	%r137, %r134, %r30, %r136;
	add.s32 	%r16, %r137, -32;
	mov.u32 	%r190, 0;
	mov.f32 	%f250, %f249;
	mov.f32 	%f266, %f265;

BB2_65:
	mov.f32 	%f264, %f266;
	mov.f32 	%f262, %f265;
	mov.f32 	%f248, %f250;
	mov.f32 	%f246, %f249;
	mad.lo.s32 	%r19, %r190, -32, %r16;
	add.s32 	%r191, %r191, -32;
	cvt.s64.s32	%rd31, %r19;
	mul.wide.s32 	%rd91, %r19, 4;
	add.s64 	%rd32, %rd1, %rd91;
	mul.wide.s32 	%rd33, %r19, 2;
	add.s64 	%rd34, %rd1, %rd33;
	setp.ge.s32	%p51, %r134, %r29;
	@%p51 bra 	BB2_72;

	add.s32 	%r143, %r191, %r2;
	setp.lt.s32	%p52, %r143, %r28;
	@%p52 bra 	BB2_68;

	mov.u32 	%r144, 0;
	st.shared.u32 	[%rd3], %r144;
	bra.uni 	BB2_72;

BB2_68:
	setp.eq.s32	%p53, %r31, 0;
	@%p53 bra 	BB2_70;

	ld.global.f32 	%f149, [%rd32];
	cvt.ftz.sat.f32.f32	%f232, %f149;
	bra.uni 	BB2_71;

BB2_70:
	ld.global.u16 	%rs11, [%rd34];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs11;
	cvt.f32.f16 	%f150, %temp;
	}
	cvt.ftz.sat.f32.f32	%f232, %f150;

BB2_71:
	st.shared.f32 	[%rd3], %f232;

BB2_72:
	add.s32 	%r149, %r134, 8;
	shl.b32 	%r150, %r30, 3;
	add.s32 	%r151, %r19, %r150;
	cvt.s64.s32	%rd35, %r151;
	mul.wide.s32 	%rd93, %r151, 4;
	add.s64 	%rd36, %rd1, %rd93;
	mul.wide.s32 	%rd37, %r151, 2;
	add.s64 	%rd38, %rd1, %rd37;
	setp.ge.s32	%p54, %r149, %r29;
	@%p54 bra 	BB2_79;

	add.s32 	%r153, %r191, %r2;
	setp.lt.s32	%p55, %r153, %r28;
	@%p55 bra 	BB2_75;

	mov.u32 	%r154, 0;
	st.shared.u32 	[%rd3+1056], %r154;
	bra.uni 	BB2_79;

BB2_75:
	setp.eq.s32	%p56, %r31, 0;
	@%p56 bra 	BB2_77;

	ld.global.f32 	%f151, [%rd36];
	cvt.ftz.sat.f32.f32	%f233, %f151;
	bra.uni 	BB2_78;

BB2_77:
	ld.global.u16 	%rs12, [%rd38];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs12;
	cvt.f32.f16 	%f152, %temp;
	}
	cvt.ftz.sat.f32.f32	%f233, %f152;

BB2_78:
	st.shared.f32 	[%rd3+1056], %f233;

BB2_79:
	add.s32 	%r159, %r134, 16;
	shl.b32 	%r160, %r30, 4;
	add.s32 	%r21, %r19, %r160;
	mul.wide.s32 	%rd95, %r21, 4;
	add.s64 	%rd39, %rd1, %rd95;
	mul.wide.s32 	%rd96, %r21, 2;
	add.s64 	%rd40, %rd1, %rd96;
	setp.ge.s32	%p57, %r159, %r29;
	@%p57 bra 	BB2_86;

	add.s32 	%r162, %r191, %r2;
	setp.lt.s32	%p58, %r162, %r28;
	@%p58 bra 	BB2_82;

	mov.u32 	%r163, 0;
	st.shared.u32 	[%rd3+2112], %r163;
	bra.uni 	BB2_86;

BB2_82:
	setp.eq.s32	%p59, %r31, 0;
	@%p59 bra 	BB2_84;

	ld.global.f32 	%f153, [%rd39];
	cvt.ftz.sat.f32.f32	%f234, %f153;
	bra.uni 	BB2_85;

BB2_84:
	ld.global.u16 	%rs13, [%rd40];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs13;
	cvt.f32.f16 	%f154, %temp;
	}
	cvt.ftz.sat.f32.f32	%f234, %f154;

BB2_85:
	st.shared.f32 	[%rd3+2112], %f234;

BB2_86:
	add.s32 	%r168, %r134, 24;
	mad.lo.s32 	%r22, %r30, 24, %r19;
	setp.ge.s32	%p60, %r168, %r29;
	@%p60 bra 	BB2_93;

	add.s32 	%r170, %r191, %r2;
	setp.lt.s32	%p61, %r170, %r28;
	@%p61 bra 	BB2_89;

	mov.u32 	%r171, 0;
	st.shared.u32 	[%rd3+3168], %r171;
	bra.uni 	BB2_93;

BB2_89:
	setp.eq.s32	%p62, %r31, 0;
	@%p62 bra 	BB2_91;

	mul.wide.s32 	%rd98, %r22, 4;
	add.s64 	%rd99, %rd1, %rd98;
	ld.global.f32 	%f155, [%rd99];
	cvt.ftz.sat.f32.f32	%f235, %f155;
	bra.uni 	BB2_92;

BB2_91:
	mul.wide.s32 	%rd101, %r22, 2;
	add.s64 	%rd102, %rd1, %rd101;
	ld.global.u16 	%rs14, [%rd102];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs14;
	cvt.f32.f16 	%f156, %temp;
	}
	cvt.ftz.sat.f32.f32	%f235, %f156;

BB2_92:
	st.shared.f32 	[%rd3+3168], %f235;

BB2_93:
	mul.lo.s32 	%r173, %r2, 33;
	mul.wide.s32 	%rd103, %r173, 4;
	add.s64 	%rd105, %rd103, %rd66;
	add.s64 	%rd116, %rd105, 124;
	bar.sync 	0;
	@!%p7 bra 	BB2_96;
	bra.uni 	BB2_94;

BB2_94:
	mov.u32 	%r192, 0;
	mov.f32 	%f245, %f246;
	mov.f32 	%f247, %f248;
	mov.f32 	%f261, %f262;
	mov.f32 	%f263, %f264;

BB2_95:
	mul.ftz.f32 	%f157, %f263, %f90;
	fma.rn.ftz.f32 	%f158, %f261, %f89, %f157;
	fma.rn.ftz.f32 	%f159, %f245, %f91, %f158;
	fma.rn.ftz.f32 	%f160, %f247, %f92, %f159;
	ld.shared.f32 	%f161, [%rd116];
	ld.shared.f32 	%f162, [%rd116+-4];
	ld.shared.f32 	%f163, [%rd116+-8];
	ld.shared.f32 	%f164, [%rd116+-12];
	st.shared.f32 	[%rd116], %f160;
	mul.ftz.f32 	%f165, %f261, %f90;
	fma.rn.ftz.f32 	%f166, %f161, %f89, %f165;
	fma.rn.ftz.f32 	%f167, %f160, %f91, %f166;
	fma.rn.ftz.f32 	%f168, %f245, %f92, %f167;
	st.shared.f32 	[%rd116+-4], %f168;
	mul.ftz.f32 	%f169, %f161, %f90;
	fma.rn.ftz.f32 	%f170, %f162, %f89, %f169;
	fma.rn.ftz.f32 	%f171, %f168, %f91, %f170;
	fma.rn.ftz.f32 	%f172, %f160, %f92, %f171;
	st.shared.f32 	[%rd116+-8], %f172;
	mul.ftz.f32 	%f173, %f162, %f90;
	fma.rn.ftz.f32 	%f174, %f163, %f89, %f173;
	fma.rn.ftz.f32 	%f175, %f172, %f91, %f174;
	fma.rn.ftz.f32 	%f176, %f168, %f92, %f175;
	st.shared.f32 	[%rd116+-12], %f176;
	mul.ftz.f32 	%f177, %f163, %f90;
	fma.rn.ftz.f32 	%f178, %f164, %f89, %f177;
	fma.rn.ftz.f32 	%f179, %f176, %f91, %f178;
	fma.rn.ftz.f32 	%f180, %f172, %f92, %f179;
	ld.shared.f32 	%f181, [%rd116+-16];
	ld.shared.f32 	%f182, [%rd116+-20];
	ld.shared.f32 	%f264, [%rd116+-24];
	ld.shared.f32 	%f262, [%rd116+-28];
	st.shared.f32 	[%rd116+-16], %f180;
	mul.ftz.f32 	%f183, %f164, %f90;
	fma.rn.ftz.f32 	%f184, %f181, %f89, %f183;
	fma.rn.ftz.f32 	%f185, %f180, %f91, %f184;
	fma.rn.ftz.f32 	%f186, %f176, %f92, %f185;
	st.shared.f32 	[%rd116+-20], %f186;
	mul.ftz.f32 	%f187, %f181, %f90;
	fma.rn.ftz.f32 	%f188, %f182, %f89, %f187;
	fma.rn.ftz.f32 	%f189, %f186, %f91, %f188;
	fma.rn.ftz.f32 	%f248, %f180, %f92, %f189;
	st.shared.f32 	[%rd116+-24], %f248;
	mul.ftz.f32 	%f190, %f182, %f90;
	fma.rn.ftz.f32 	%f191, %f264, %f89, %f190;
	fma.rn.ftz.f32 	%f192, %f248, %f91, %f191;
	fma.rn.ftz.f32 	%f246, %f186, %f92, %f192;
	st.shared.f32 	[%rd116+-28], %f246;
	add.s64 	%rd116, %rd116, -32;
	add.s32 	%r192, %r192, 8;
	setp.ne.s32	%p63, %r192, 32;
	mov.f32 	%f247, %f248;
	mov.f32 	%f245, %f246;
	mov.f32 	%f263, %f264;
	mov.f32 	%f261, %f262;
	@%p63 bra 	BB2_95;

BB2_96:
	mov.f32 	%f266, %f264;
	mov.f32 	%f265, %f262;
	mov.f32 	%f250, %f248;
	mov.f32 	%f249, %f246;
	add.s32 	%r25, %r191, %r2;
	setp.lt.s32	%p5, %r25, %r28;
	setp.lt.s32	%p6, %r134, %r29;
	cvta.to.global.u64 	%rd45, %rd59;
	bar.sync 	0;
	mad.lo.s32 	%r184, %r190, -32, %r16;
	mul.wide.s32 	%rd114, %r184, 2;
	shl.b64 	%rd106, %rd31, 2;
	add.s64 	%rd46, %rd45, %rd106;
	add.s64 	%rd47, %rd45, %rd114;
	not.pred 	%p64, %p6;
	not.pred 	%p65, %p5;
	or.pred  	%p66, %p64, %p65;
	@%p66 bra 	BB2_103;

	setp.eq.s32	%p67, %r31, 0;
	@%p67 bra 	BB2_99;

	ld.global.f32 	%f193, [%rd46];
	cvt.ftz.sat.f32.f32	%f268, %f193;
	bra.uni 	BB2_100;

BB2_99:
	ld.global.u16 	%rs15, [%rd47];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs15;
	cvt.f32.f16 	%f194, %temp;
	}
	cvt.ftz.sat.f32.f32	%f268, %f194;

BB2_100:
	ld.shared.f32 	%f195, [%rd3];
	add.ftz.f32 	%f196, %f268, %f195;
	cvt.ftz.sat.f32.f32	%f72, %f196;
	@%p67 bra 	BB2_102;

	st.global.f32 	[%rd46], %f72;
	bra.uni 	BB2_103;

BB2_102:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f72;
	mov.b16 	%rs16, %temp;
}
	st.global.u16 	[%rd47], %rs16;

BB2_103:
	shl.b64 	%rd107, %rd35, 2;
	add.s64 	%rd50, %rd45, %rd107;
	add.s64 	%rd51, %rd45, %rd37;
	setp.ge.s32	%p70, %r25, %r28;
	or.pred  	%p71, %p54, %p70;
	@%p71 bra 	BB2_110;

	setp.eq.s32	%p72, %r31, 0;
	@%p72 bra 	BB2_106;

	ld.global.f32 	%f197, [%rd50];
	cvt.ftz.sat.f32.f32	%f269, %f197;
	bra.uni 	BB2_107;

BB2_106:
	ld.global.u16 	%rs17, [%rd51];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs17;
	cvt.f32.f16 	%f198, %temp;
	}
	cvt.ftz.sat.f32.f32	%f269, %f198;

BB2_107:
	ld.shared.f32 	%f199, [%rd3+1056];
	add.ftz.f32 	%f200, %f269, %f199;
	cvt.ftz.sat.f32.f32	%f76, %f200;
	@%p72 bra 	BB2_109;

	st.global.f32 	[%rd50], %f76;
	bra.uni 	BB2_110;

BB2_109:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f76;
	mov.b16 	%rs18, %temp;
}
	st.global.u16 	[%rd51], %rs18;

BB2_110:
	shl.b32 	%r187, %r30, 4;
	mad.lo.s32 	%r186, %r190, -32, %r16;
	add.s32 	%r185, %r186, %r187;
	mul.wide.s32 	%rd108, %r185, 4;
	add.s64 	%rd53, %rd45, %rd108;
	mul.wide.s32 	%rd109, %r185, 2;
	add.s64 	%rd54, %rd45, %rd109;
	or.pred  	%p76, %p57, %p70;
	@%p76 bra 	BB2_117;

	setp.eq.s32	%p77, %r31, 0;
	@%p77 bra 	BB2_113;

	ld.global.f32 	%f201, [%rd53];
	cvt.ftz.sat.f32.f32	%f270, %f201;
	bra.uni 	BB2_114;

BB2_113:
	ld.global.u16 	%rs19, [%rd54];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs19;
	cvt.f32.f16 	%f202, %temp;
	}
	cvt.ftz.sat.f32.f32	%f270, %f202;

BB2_114:
	ld.shared.f32 	%f203, [%rd3+2112];
	add.ftz.f32 	%f204, %f270, %f203;
	cvt.ftz.sat.f32.f32	%f80, %f204;
	@%p77 bra 	BB2_116;

	st.global.f32 	[%rd53], %f80;
	bra.uni 	BB2_117;

BB2_116:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f80;
	mov.b16 	%rs20, %temp;
}
	st.global.u16 	[%rd54], %rs20;

BB2_117:
	mul.wide.s32 	%rd110, %r22, 4;
	add.s64 	%rd56, %rd45, %rd110;
	mul.wide.s32 	%rd111, %r22, 2;
	add.s64 	%rd57, %rd45, %rd111;
	or.pred  	%p81, %p60, %p70;
	@%p81 bra 	BB2_124;

	setp.eq.s32	%p82, %r31, 0;
	@%p82 bra 	BB2_120;

	ld.global.f32 	%f205, [%rd56];
	cvt.ftz.sat.f32.f32	%f271, %f205;
	bra.uni 	BB2_121;

BB2_120:
	ld.global.u16 	%rs21, [%rd57];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs21;
	cvt.f32.f16 	%f206, %temp;
	}
	cvt.ftz.sat.f32.f32	%f271, %f206;

BB2_121:
	ld.shared.f32 	%f207, [%rd3+3168];
	add.ftz.f32 	%f208, %f271, %f207;
	cvt.ftz.sat.f32.f32	%f84, %f208;
	@%p82 bra 	BB2_123;

	st.global.f32 	[%rd56], %f84;
	bra.uni 	BB2_124;

BB2_123:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f84;
	mov.b16 	%rs22, %temp;
}
	st.global.u16 	[%rd57], %rs22;

BB2_124:
	bar.sync 	0;
	add.s32 	%r190, %r190, 1;
	setp.gt.s32	%p84, %r191, 0;
	@%p84 bra 	BB2_65;

BB2_125:
	ret;
}


