//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Fri Jul 25 04:36:16 2014 (1406288176)
// Cuda compilation tools, release 6.5, V6.5.13
//

.version 4.1
.target sm_30
.address_size 64


.visible .func _Z11ApplyLevelsPfffffffffff(
	.param .b64 _Z11ApplyLevelsPfffffffffff_param_0,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_1,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_2,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_3,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_4,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_5,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_6,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_7,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_8,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_9,
	.param .b32 _Z11ApplyLevelsPfffffffffff_param_10
)
{
	.reg .pred 	%p<5>;
	.reg .f32 	%f<48>;
	.reg .s64 	%rd<2>;


	ld.param.u64 	%rd1, [_Z11ApplyLevelsPfffffffffff_param_0];
	ld.param.f32 	%f21, [_Z11ApplyLevelsPfffffffffff_param_1];
	ld.param.f32 	%f22, [_Z11ApplyLevelsPfffffffffff_param_2];
	ld.param.f32 	%f23, [_Z11ApplyLevelsPfffffffffff_param_3];
	ld.param.f32 	%f24, [_Z11ApplyLevelsPfffffffffff_param_4];
	ld.param.f32 	%f19, [_Z11ApplyLevelsPfffffffffff_param_5];
	ld.param.f32 	%f25, [_Z11ApplyLevelsPfffffffffff_param_6];
	ld.param.f32 	%f26, [_Z11ApplyLevelsPfffffffffff_param_7];
	ld.param.f32 	%f27, [_Z11ApplyLevelsPfffffffffff_param_8];
	ld.param.f32 	%f28, [_Z11ApplyLevelsPfffffffffff_param_9];
	ld.param.f32 	%f20, [_Z11ApplyLevelsPfffffffffff_param_10];
	sub.ftz.f32 	%f29, %f22, %f21;
	fma.rn.ftz.f32 	%f30, %f29, %f25, %f21;
	cvt.ftz.sat.f32.f32	%f1, %f30;
	fma.rn.ftz.f32 	%f31, %f29, %f26, %f21;
	cvt.ftz.sat.f32.f32	%f2, %f31;
	sub.ftz.f32 	%f32, %f24, %f23;
	fma.rn.ftz.f32 	%f33, %f32, %f27, %f23;
	cvt.ftz.sat.f32.f32	%f3, %f33;
	fma.rn.ftz.f32 	%f34, %f32, %f28, %f23;
	cvt.ftz.sat.f32.f32	%f4, %f34;
	ld.f32 	%f5, [%rd1];
	setp.lt.ftz.f32	%p1, %f5, %f1;
	mov.f32 	%f47, %f3;
	@%p1 bra 	BB0_8;

	setp.ge.ftz.f32	%p2, %f5, %f2;
	mov.f32 	%f47, %f4;
	@%p2 bra 	BB0_8;

	sub.ftz.f32 	%f6, %f2, %f1;
	sub.ftz.f32 	%f7, %f4, %f3;
	mul.ftz.f32 	%f8, %f20, %f19;
	setp.eq.ftz.f32	%p3, %f8, 0f3F800000;
	sub.ftz.f32 	%f9, %f5, %f1;
	@%p3 bra 	BB0_6;

	div.approx.ftz.f32 	%f10, %f9, %f6;
	setp.ltu.ftz.f32	%p4, %f10, 0f00000000;
	@%p4 bra 	BB0_5;

	lg2.approx.ftz.f32 	%f35, %f10;
	mul.ftz.f32 	%f36, %f35, %f8;
	ex2.approx.ftz.f32 	%f11, %f36;
	mul.ftz.f32 	%f46, %f7, %f11;
	bra.uni 	BB0_7;

BB0_5:
	neg.ftz.f32 	%f37, %f10;
	lg2.approx.ftz.f32 	%f38, %f37;
	mul.ftz.f32 	%f39, %f38, %f8;
	ex2.approx.ftz.f32 	%f40, %f39;
	neg.ftz.f32 	%f12, %f40;
	mul.ftz.f32 	%f46, %f7, %f12;
	bra.uni 	BB0_7;

BB0_6:
	mul.ftz.f32 	%f41, %f7, %f9;
	div.approx.ftz.f32 	%f46, %f41, %f6;

BB0_7:
	add.ftz.f32 	%f47, %f3, %f46;

BB0_8:
	st.f32 	[%rd1], %f47;
	ret;
}

.visible .entry Levels(
	.param .u64 Levels_param_0,
	.param .u32 Levels_param_1,
	.param .u32 Levels_param_2,
	.param .u32 Levels_param_3,
	.param .u32 Levels_param_4,
	.param .f32 Levels_param_5,
	.param .f32 Levels_param_6,
	.param .f32 Levels_param_7,
	.param .f32 Levels_param_8,
	.param .f32 Levels_param_9,
	.param .f32 Levels_param_10,
	.param .f32 Levels_param_11,
	.param .f32 Levels_param_12,
	.param .f32 Levels_param_13,
	.param .f32 Levels_param_14,
	.param .f32 Levels_param_15,
	.param .f32 Levels_param_16,
	.param .f32 Levels_param_17,
	.param .f32 Levels_param_18,
	.param .f32 Levels_param_19,
	.param .f32 Levels_param_20,
	.param .f32 Levels_param_21,
	.param .f32 Levels_param_22,
	.param .f32 Levels_param_23,
	.param .f32 Levels_param_24
)
{
	.reg .pred 	%p<18>;
	.reg .s16 	%rs<13>;
	.reg .s32 	%r<14>;
	.reg .f32 	%f<153>;
	.reg .s64 	%rd<7>;


	ld.param.u64 	%rd3, [Levels_param_0];
	ld.param.u32 	%r3, [Levels_param_1];
	ld.param.u32 	%r4, [Levels_param_2];
	ld.param.u32 	%r5, [Levels_param_3];
	ld.param.u32 	%r6, [Levels_param_4];
	ld.param.f32 	%f68, [Levels_param_5];
	ld.param.f32 	%f69, [Levels_param_6];
	ld.param.f32 	%f70, [Levels_param_7];
	ld.param.f32 	%f71, [Levels_param_8];
	ld.param.f32 	%f72, [Levels_param_9];
	ld.param.f32 	%f73, [Levels_param_10];
	ld.param.f32 	%f74, [Levels_param_11];
	ld.param.f32 	%f75, [Levels_param_12];
	ld.param.f32 	%f76, [Levels_param_13];
	ld.param.f32 	%f77, [Levels_param_14];
	ld.param.f32 	%f78, [Levels_param_15];
	ld.param.f32 	%f79, [Levels_param_16];
	ld.param.f32 	%f80, [Levels_param_17];
	ld.param.f32 	%f81, [Levels_param_18];
	ld.param.f32 	%f82, [Levels_param_19];
	ld.param.f32 	%f83, [Levels_param_20];
	ld.param.f32 	%f84, [Levels_param_21];
	ld.param.f32 	%f85, [Levels_param_22];
	ld.param.f32 	%f86, [Levels_param_23];
	ld.param.f32 	%f87, [Levels_param_24];
	mov.u32 	%r7, %ntid.x;
	mov.u32 	%r8, %ctaid.x;
	mov.u32 	%r9, %tid.x;
	mad.lo.s32 	%r1, %r7, %r8, %r9;
	mov.u32 	%r10, %ntid.y;
	mov.u32 	%r11, %ctaid.y;
	mov.u32 	%r12, %tid.y;
	mad.lo.s32 	%r2, %r10, %r11, %r12;
	setp.lt.s32	%p1, %r1, %r5;
	setp.lt.s32	%p2, %r2, %r6;
	and.pred  	%p3, %p1, %p2;
	@!%p3 bra 	BB1_31;
	bra.uni 	BB1_1;

BB1_1:
	cvta.to.global.u64 	%rd4, %rd3;
	mad.lo.s32 	%r13, %r2, %r3, %r1;
	mul.wide.s32 	%rd5, %r13, 16;
	add.s64 	%rd1, %rd4, %rd5;
	mul.wide.s32 	%rd6, %r13, 8;
	add.s64 	%rd2, %rd4, %rd6;
	setp.eq.s32	%p4, %r4, 0;
	@%p4 bra 	BB1_3;

	ld.global.v4.f32 	{%f88, %f89, %f90, %f91}, [%rd1];
	mov.f32 	%f146, %f91;
	mov.f32 	%f145, %f90;
	mov.f32 	%f144, %f89;
	mov.f32 	%f143, %f88;
	bra.uni 	BB1_4;

BB1_3:
	ld.global.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd2];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f143, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f144, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f145, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f146, %temp;
	}

BB1_4:
	sub.ftz.f32 	%f92, %f69, %f68;
	fma.rn.ftz.f32 	%f93, %f92, %f73, %f68;
	cvt.ftz.sat.f32.f32	%f13, %f93;
	fma.rn.ftz.f32 	%f94, %f92, %f74, %f68;
	cvt.ftz.sat.f32.f32	%f14, %f94;
	sub.ftz.f32 	%f95, %f71, %f70;
	fma.rn.ftz.f32 	%f96, %f95, %f75, %f70;
	cvt.ftz.sat.f32.f32	%f15, %f96;
	fma.rn.ftz.f32 	%f97, %f95, %f76, %f70;
	cvt.ftz.sat.f32.f32	%f16, %f97;
	setp.lt.ftz.f32	%p5, %f145, %f13;
	mov.f32 	%f148, %f15;
	@%p5 bra 	BB1_12;

	setp.ge.ftz.f32	%p6, %f145, %f14;
	mov.f32 	%f148, %f16;
	@%p6 bra 	BB1_12;

	sub.ftz.f32 	%f18, %f14, %f13;
	sub.ftz.f32 	%f19, %f16, %f15;
	mul.ftz.f32 	%f20, %f77, %f72;
	setp.eq.ftz.f32	%p7, %f20, 0f3F800000;
	sub.ftz.f32 	%f21, %f145, %f13;
	@%p7 bra 	BB1_10;

	div.approx.ftz.f32 	%f22, %f21, %f18;
	setp.ltu.ftz.f32	%p8, %f22, 0f00000000;
	@%p8 bra 	BB1_9;

	lg2.approx.ftz.f32 	%f98, %f22;
	mul.ftz.f32 	%f99, %f98, %f20;
	ex2.approx.ftz.f32 	%f23, %f99;
	mul.ftz.f32 	%f147, %f19, %f23;
	bra.uni 	BB1_11;

BB1_9:
	neg.ftz.f32 	%f100, %f22;
	lg2.approx.ftz.f32 	%f101, %f100;
	mul.ftz.f32 	%f102, %f101, %f20;
	ex2.approx.ftz.f32 	%f103, %f102;
	neg.ftz.f32 	%f24, %f103;
	mul.ftz.f32 	%f147, %f19, %f24;
	bra.uni 	BB1_11;

BB1_10:
	mul.ftz.f32 	%f104, %f19, %f21;
	div.approx.ftz.f32 	%f147, %f104, %f18;

BB1_11:
	add.ftz.f32 	%f148, %f15, %f147;

BB1_12:
	fma.rn.ftz.f32 	%f106, %f92, %f78, %f68;
	cvt.ftz.sat.f32.f32	%f32, %f106;
	fma.rn.ftz.f32 	%f107, %f92, %f79, %f68;
	cvt.ftz.sat.f32.f32	%f33, %f107;
	fma.rn.ftz.f32 	%f109, %f95, %f80, %f70;
	cvt.ftz.sat.f32.f32	%f34, %f109;
	fma.rn.ftz.f32 	%f110, %f95, %f81, %f70;
	cvt.ftz.sat.f32.f32	%f35, %f110;
	setp.lt.ftz.f32	%p9, %f144, %f32;
	mov.f32 	%f150, %f34;
	@%p9 bra 	BB1_20;

	setp.ge.ftz.f32	%p10, %f144, %f33;
	mov.f32 	%f150, %f35;
	@%p10 bra 	BB1_20;

	sub.ftz.f32 	%f36, %f33, %f32;
	sub.ftz.f32 	%f37, %f35, %f34;
	mul.ftz.f32 	%f38, %f82, %f72;
	setp.eq.ftz.f32	%p11, %f38, 0f3F800000;
	sub.ftz.f32 	%f39, %f144, %f32;
	@%p11 bra 	BB1_18;

	div.approx.ftz.f32 	%f40, %f39, %f36;
	setp.ltu.ftz.f32	%p12, %f40, 0f00000000;
	@%p12 bra 	BB1_17;

	lg2.approx.ftz.f32 	%f111, %f40;
	mul.ftz.f32 	%f112, %f111, %f38;
	ex2.approx.ftz.f32 	%f41, %f112;
	mul.ftz.f32 	%f149, %f37, %f41;
	bra.uni 	BB1_19;

BB1_17:
	neg.ftz.f32 	%f113, %f40;
	lg2.approx.ftz.f32 	%f114, %f113;
	mul.ftz.f32 	%f115, %f114, %f38;
	ex2.approx.ftz.f32 	%f116, %f115;
	neg.ftz.f32 	%f42, %f116;
	mul.ftz.f32 	%f149, %f37, %f42;
	bra.uni 	BB1_19;

BB1_18:
	mul.ftz.f32 	%f117, %f37, %f39;
	div.approx.ftz.f32 	%f149, %f117, %f36;

BB1_19:
	add.ftz.f32 	%f150, %f34, %f149;

BB1_20:
	fma.rn.ftz.f32 	%f119, %f92, %f83, %f68;
	cvt.ftz.sat.f32.f32	%f50, %f119;
	fma.rn.ftz.f32 	%f120, %f92, %f84, %f68;
	cvt.ftz.sat.f32.f32	%f51, %f120;
	fma.rn.ftz.f32 	%f122, %f95, %f85, %f70;
	cvt.ftz.sat.f32.f32	%f52, %f122;
	fma.rn.ftz.f32 	%f123, %f95, %f86, %f70;
	cvt.ftz.sat.f32.f32	%f53, %f123;
	setp.lt.ftz.f32	%p13, %f143, %f50;
	mov.f32 	%f152, %f52;
	@%p13 bra 	BB1_28;

	setp.ge.ftz.f32	%p14, %f143, %f51;
	mov.f32 	%f152, %f53;
	@%p14 bra 	BB1_28;

	sub.ftz.f32 	%f54, %f51, %f50;
	sub.ftz.f32 	%f55, %f53, %f52;
	mul.ftz.f32 	%f56, %f87, %f72;
	setp.eq.ftz.f32	%p15, %f56, 0f3F800000;
	sub.ftz.f32 	%f57, %f143, %f50;
	@%p15 bra 	BB1_26;

	div.approx.ftz.f32 	%f58, %f57, %f54;
	setp.ltu.ftz.f32	%p16, %f58, 0f00000000;
	@%p16 bra 	BB1_25;

	lg2.approx.ftz.f32 	%f124, %f58;
	mul.ftz.f32 	%f125, %f124, %f56;
	ex2.approx.ftz.f32 	%f59, %f125;
	mul.ftz.f32 	%f151, %f55, %f59;
	bra.uni 	BB1_27;

BB1_25:
	neg.ftz.f32 	%f126, %f58;
	lg2.approx.ftz.f32 	%f127, %f126;
	mul.ftz.f32 	%f128, %f127, %f56;
	ex2.approx.ftz.f32 	%f129, %f128;
	neg.ftz.f32 	%f60, %f129;
	mul.ftz.f32 	%f151, %f55, %f60;
	bra.uni 	BB1_27;

BB1_26:
	mul.ftz.f32 	%f130, %f55, %f57;
	div.approx.ftz.f32 	%f151, %f130, %f54;

BB1_27:
	add.ftz.f32 	%f152, %f52, %f151;

BB1_28:
	@%p4 bra 	BB1_30;

	st.global.v4.f32 	[%rd1], {%f152, %f150, %f148, %f146};
	bra.uni 	BB1_31;

BB1_30:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f146;
	mov.b16 	%rs9, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f148;
	mov.b16 	%rs10, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f150;
	mov.b16 	%rs11, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f152;
	mov.b16 	%rs12, %temp;
}
	st.global.v4.u16 	[%rd2], {%rs12, %rs11, %rs10, %rs9};

BB1_31:
	ret;
}


