//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Fri Jul 25 04:36:16 2014 (1406288176)
// Cuda compilation tools, release 6.5, V6.5.13
//

.version 4.1
.target sm_30
.address_size 64

.const .align 4 .b8 kRGB32f_To_601YPbPr[36] = {135, 22, 153, 62, 162, 69, 22, 63, 213, 120, 233, 61, 33, 201, 44, 190, 111, 155, 169, 190, 0, 0, 0, 63, 0, 0, 0, 63, 70, 94, 214, 190, 232, 134, 166, 189};
.const .align 4 .b8 k601YPbPr_To_RGB32f[36] = {0, 0, 128, 63, 0, 0, 0, 0, 188, 116, 179, 63, 0, 0, 128, 63, 152, 50, 176, 190, 158, 209, 54, 191, 0, 0, 128, 63, 229, 208, 226, 63, 0, 0, 0, 0};
.const .align 4 .b8 kRGB32f_To_601YCbCr[36] = {70, 246, 130, 66, 145, 141, 0, 67, 94, 186, 199, 65, 33, 48, 23, 194, 240, 103, 148, 194, 0, 0, 224, 66, 0, 0, 224, 66, 111, 146, 187, 194, 70, 182, 145, 193};
.const .align 4 .b8 k601YCbCr_To_RGB32f[36] = {37, 160, 149, 59, 0, 0, 0, 0, 182, 23, 205, 59, 37, 160, 149, 59, 40, 15, 201, 186, 156, 239, 80, 187, 37, 160, 149, 59, 236, 155, 1, 60, 0, 0, 0, 0};
.const .align 4 .b8 kRGB8u_To_601YCbCr[36] = {219, 121, 131, 62, 152, 14, 1, 63, 18, 131, 200, 61, 174, 199, 23, 190, 238, 252, 148, 190, 197, 224, 224, 62, 197, 224, 224, 62, 217, 78, 188, 190, 174, 71, 146, 189};
.const .align 4 .b8 k601YCbCr_To_RGB8u[36] = {127, 10, 149, 63, 0, 0, 0, 0, 160, 74, 204, 63, 127, 10, 149, 63, 254, 148, 200, 190, 184, 30, 80, 191, 127, 10, 149, 63, 78, 26, 1, 64, 0, 0, 0, 0};
.const .align 4 .b8 kRGB8u_To_601YCbCrFullRange[36] = {135, 22, 153, 62, 162, 69, 22, 63, 213, 120, 233, 61, 166, 27, 44, 190, 39, 241, 168, 190, 250, 254, 254, 62, 250, 254, 254, 62, 43, 135, 213, 190, 59, 223, 165, 189};
.const .align 4 .b8 k601YCbCrFullRange_To_RGB8u[36] = {0, 0, 128, 63, 0, 0, 0, 0, 72, 193, 178, 63, 0, 0, 128, 63, 143, 130, 175, 190, 225, 26, 54, 191, 0, 0, 128, 63, 20, 238, 225, 63, 0, 0, 0, 0};
.const .align 4 .b8 kRGB32f_To_601YCbCrFullRange[36] = {113, 125, 152, 66, 92, 175, 21, 67, 92, 143, 232, 65, 158, 111, 43, 194, 49, 72, 168, 194, 0, 0, 254, 66, 0, 0, 254, 66, 170, 177, 212, 194, 88, 57, 165, 193};
.const .align 4 .b8 k601YCbCrFullRange_To_RGB32f[36] = {129, 128, 128, 59, 0, 0, 0, 0, 188, 116, 179, 59, 129, 128, 128, 59, 194, 50, 176, 186, 179, 209, 54, 187, 129, 128, 128, 59, 229, 208, 226, 59, 0, 0, 0, 0};
.const .align 4 .b8 kRGB32f_To_709YPbPr[36] = {208, 179, 89, 62, 89, 23, 55, 63, 152, 221, 147, 61, 186, 164, 234, 189, 210, 86, 197, 190, 0, 0, 0, 63, 0, 0, 0, 63, 190, 134, 232, 190, 16, 202, 59, 189};
.const .align 4 .b8 k709YPbPr_To_RGB32f[36] = {0, 0, 128, 63, 0, 0, 0, 0, 12, 147, 201, 63, 0, 0, 128, 63, 221, 209, 63, 190, 243, 173, 239, 190, 0, 0, 128, 63, 77, 132, 237, 63, 0, 0, 0, 0};
.const .align 4 .b8 kRGB32f_To_709YCbCr[36] = {106, 60, 58, 66, 6, 161, 28, 67, 244, 253, 124, 65, 223, 79, 205, 193, 8, 172, 172, 194, 0, 0, 224, 66, 0, 0, 224, 66, 195, 117, 203, 194, 236, 81, 36, 193};
.const .align 4 .b8 k709YCbCr_To_RGB32f[36] = {37, 160, 149, 59, 0, 0, 0, 0, 239, 94, 230, 59, 37, 160, 149, 59, 33, 57, 91, 186, 178, 245, 8, 187, 37, 160, 149, 59, 82, 185, 7, 60, 0, 0, 0, 0};
.const .align 4 .b8 k709YCbCrFullRange_To_RGB32f[36] = {131, 128, 128, 59, 0, 0, 0, 0, 28, 147, 201, 59, 131, 128, 128, 59, 61, 210, 63, 186, 248, 173, 239, 186, 131, 128, 128, 59, 82, 132, 237, 59, 0, 0, 0, 0};
.const .align 4 .b8 kRGB8u_To_709YCbCr[36] = {207, 247, 58, 62, 53, 62, 29, 63, 231, 251, 125, 61, 184, 30, 206, 189, 23, 89, 173, 190, 197, 224, 224, 62, 197, 224, 224, 62, 12, 66, 204, 190, 195, 245, 36, 189};
.const .align 4 .b8 k709YCbCr_To_RGB8u[36] = {127, 10, 149, 63, 0, 0, 0, 0, 147, 120, 229, 63, 127, 10, 149, 63, 53, 94, 90, 190, 205, 108, 8, 191, 127, 10, 149, 63, 154, 49, 7, 64, 0, 0, 0, 0};
.const .align 4 .b8 k709YCbCr_To_601YCbCr[36] = {0, 0, 128, 63, 23, 100, 203, 61, 1, 77, 68, 62, 0, 0, 0, 0, 18, 103, 125, 63, 10, 158, 226, 189, 0, 0, 0, 0, 61, 98, 148, 189, 249, 191, 123, 63};
.const .align 4 .b8 k601YCbCr_To_709YCbCr[36] = {0, 0, 128, 63, 122, 165, 236, 189, 179, 237, 84, 190, 0, 0, 0, 0, 204, 98, 130, 63, 216, 188, 234, 61, 0, 0, 0, 0, 74, 179, 153, 61, 234, 61, 131, 63};
.const .align 4 .b8 kYCbCrOffset[12] = {0, 0, 128, 65, 0, 0, 0, 67, 0, 0, 0, 67};
.const .align 4 .b8 kYCbCrFullRangeOffset[12] = {0, 0, 0, 0, 0, 0, 0, 67, 0, 0, 0, 67};
.const .align 4 .b8 kRGB32f_To_YIQ[36] = {135, 22, 153, 62, 162, 69, 22, 63, 213, 120, 233, 61, 216, 128, 24, 63, 27, 133, 140, 190, 149, 124, 164, 190, 236, 135, 88, 62, 134, 200, 5, 191, 22, 77, 159, 62};
.const .align 4 .b8 kYIQ_To_RGB32f[36] = {0, 0, 128, 63, 20, 208, 116, 63, 219, 249, 30, 63, 0, 0, 128, 63, 177, 80, 139, 190, 2, 188, 37, 191, 0, 0, 128, 63, 45, 178, 141, 191, 85, 48, 218, 63};

.visible .func  (.param .align 16 .b8 func_retval0[16]) _Z15ConvertRGBtoHSL8PixelRGB(
	.param .align 16 .b8 _Z15ConvertRGBtoHSL8PixelRGB_param_0[16]
)
{
	.reg .pred 	%p<16>;
	.reg .f32 	%f<37>;


	ld.param.f32 	%f10, [_Z15ConvertRGBtoHSL8PixelRGB_param_0+8];
	ld.param.f32 	%f11, [_Z15ConvertRGBtoHSL8PixelRGB_param_0];
	ld.param.f32 	%f12, [_Z15ConvertRGBtoHSL8PixelRGB_param_0+4];
	sub.ftz.f32 	%f13, %f12, %f11;
	setp.ge.ftz.f32	%p1, %f12, %f11;
	setp.ge.ftz.f32	%p2, %f12, %f10;
	and.pred  	%p3, %p2, %p1;
	sub.ftz.f32 	%f14, %f11, %f10;
	selp.f32	%f15, %f14, %f13, %p3;
	selp.f32	%f16, 0f40000000, 0f00000000, %p3;
	mov.f32 	%f17, 0f40000000;
	selp.f32	%f18, %f12, %f10, %p3;
	setp.ge.ftz.f32	%p4, %f11, %f12;
	setp.ge.ftz.f32	%p5, %f11, %f10;
	and.pred  	%p6, %p5, %p4;
	sub.ftz.f32 	%f19, %f10, %f12;
	selp.f32	%f1, %f19, %f15, %p6;
	selp.f32	%f2, 0f40800000, %f16, %p6;
	selp.f32	%f3, %f11, %f18, %p6;
	setp.le.ftz.f32	%p7, %f12, %f11;
	setp.le.ftz.f32	%p8, %f12, %f10;
	and.pred  	%p9, %p8, %p7;
	selp.f32	%f20, %f12, %f10, %p9;
	setp.le.ftz.f32	%p10, %f11, %f12;
	setp.le.ftz.f32	%p11, %f11, %f10;
	and.pred  	%p12, %p11, %p10;
	selp.f32	%f4, %f11, %f20, %p12;
	add.ftz.f32 	%f21, %f3, %f4;
	div.approx.ftz.f32 	%f5, %f21, %f17;
	setp.gt.ftz.f32	%p13, %f5, 0f38D1B717;
	mov.f32 	%f34, 0f00000000;
	mov.f32 	%f33, 0f00000000;
	@%p13 bra 	BB0_2;

	mov.f32 	%f36, %f33;
	bra.uni 	BB0_5;

BB0_2:
	sub.ftz.f32 	%f6, %f3, %f4;
	setp.gt.ftz.f32	%p14, %f6, 0f38D1B717;
	@%p14 bra 	BB0_4;

	mov.f32 	%f36, %f33;
	bra.uni 	BB0_5;

BB0_4:
	div.approx.ftz.f32 	%f26, %f1, %f6;
	add.ftz.f32 	%f27, %f26, %f2;
	setp.lt.ftz.f32	%p15, %f27, 0f00000000;
	add.ftz.f32 	%f28, %f27, 0f40C00000;
	mov.f32 	%f29, 0f40C00000;
	selp.f32	%f30, %f28, %f27, %p15;
	div.approx.ftz.f32 	%f34, %f30, %f29;
	mov.f32 	%f36, %f6;

BB0_5:
	st.param.f32	[func_retval0+0], %f34;
	st.param.f32	[func_retval0+4], %f36;
	st.param.f32	[func_retval0+8], %f5;
	st.param.f32	[func_retval0+12], %f31;
	ret;
}

.visible .func  (.param .align 16 .b8 func_retval0[16]) _Z15ConvertHSLtoRGB8PixelHSL(
	.param .align 16 .b8 _Z15ConvertHSLtoRGB8PixelHSL_param_0[16]
)
{
	.reg .pred 	%p<10>;
	.reg .s32 	%r<2>;
	.reg .f32 	%f<56>;


	ld.param.f32 	%f9, [_Z15ConvertHSLtoRGB8PixelHSL_param_0];
	ld.param.f32 	%f10, [_Z15ConvertHSLtoRGB8PixelHSL_param_0+4];
	ld.param.f32 	%f1, [_Z15ConvertHSLtoRGB8PixelHSL_param_0+8];
	setp.gtu.ftz.f32	%p1, %f1, 0f3F000000;
	add.ftz.f32 	%f13, %f10, 0f3F800000;
	mul.ftz.f32 	%f14, %f1, %f13;
	add.ftz.f32 	%f15, %f1, %f10;
	mul.ftz.f32 	%f16, %f1, %f10;
	sub.ftz.f32 	%f17, %f15, %f16;
	selp.f32	%f2, %f17, %f14, %p1;
	setp.gt.ftz.f32	%p2, %f2, 0f00000000;
	mov.f32 	%f33, 0f00000000;
	mov.f32 	%f34, 0f00000000;
	mov.f32 	%f35, 0f00000000;
	@%p2 bra 	BB1_2;

	mov.f32 	%f55, %f33;
	mov.f32 	%f54, %f34;
	mov.f32 	%f52, %f35;
	mov.f32 	%f53, %f52;
	bra.uni 	BB1_10;

BB1_2:
	add.ftz.f32 	%f21, %f1, %f1;
	sub.ftz.f32 	%f3, %f21, %f2;
	sub.ftz.f32 	%f22, %f2, %f3;
	div.approx.ftz.f32 	%f23, %f22, %f2;
	mul.ftz.f32 	%f24, %f9, 0f40C00000;
	cvt.rzi.ftz.s32.f32	%r1, %f24;
	cvt.rn.f32.s32	%f25, %r1;
	sub.ftz.f32 	%f26, %f24, %f25;
	mul.ftz.f32 	%f27, %f2, %f23;
	mul.ftz.f32 	%f28, %f27, %f26;
	add.ftz.f32 	%f4, %f3, %f28;
	sub.ftz.f32 	%f5, %f2, %f28;
	setp.gt.s32	%p3, %r1, 2;
	@%p3 bra 	BB1_6;

	setp.eq.s32	%p7, %r1, 0;
	mov.f32 	%f45, %f2;
	mov.f32 	%f50, %f4;
	mov.f32 	%f53, %f45;
	mov.f32 	%f54, %f50;
	mov.f32 	%f55, %f3;
	@%p7 bra 	BB1_10;

	setp.eq.s32	%p8, %r1, 1;
	mov.f32 	%f41, %f3;
	mov.f32 	%f42, %f5;
	mov.f32 	%f46, %f2;
	mov.f32 	%f53, %f42;
	mov.f32 	%f54, %f46;
	mov.f32 	%f55, %f41;
	@%p8 bra 	BB1_10;

	setp.eq.s32	%p9, %r1, 2;
	mov.f32 	%f37, %f3;
	mov.f32 	%f47, %f2;
	mov.f32 	%f53, %f37;
	mov.f32 	%f54, %f47;
	mov.f32 	%f55, %f4;
	@%p9 bra 	BB1_10;
	bra.uni 	BB1_9;

BB1_6:
	setp.eq.s32	%p4, %r1, 3;
	mov.f32 	%f38, %f3;
	mov.f32 	%f43, %f5;
	mov.f32 	%f48, %f2;
	mov.f32 	%f53, %f38;
	mov.f32 	%f54, %f43;
	mov.f32 	%f55, %f48;
	@%p4 bra 	BB1_10;

	setp.eq.s32	%p5, %r1, 4;
	mov.f32 	%f39, %f3;
	mov.f32 	%f49, %f4;
	mov.f32 	%f53, %f49;
	mov.f32 	%f54, %f39;
	mov.f32 	%f55, %f2;
	@%p5 bra 	BB1_10;

	setp.ne.s32	%p6, %r1, 5;
	mov.f32 	%f40, %f3;
	mov.f32 	%f44, %f2;
	mov.f32 	%f53, %f44;
	mov.f32 	%f54, %f40;
	mov.f32 	%f55, %f5;
	@%p6 bra 	BB1_9;
	bra.uni 	BB1_10;

BB1_9:
	mov.f32 	%f53, %f35;
	mov.f32 	%f54, %f34;
	mov.f32 	%f55, %f33;

BB1_10:
	mov.f32 	%f8, %f53;
	st.param.f32	[func_retval0+0], %f55;
	st.param.f32	[func_retval0+4], %f54;
	st.param.f32	[func_retval0+8], %f8;
	st.param.f32	[func_retval0+12], %f35;
	ret;
}

.visible .func  (.param .align 16 .b8 func_retval0[16]) _Z15ConvertRGBtoYIQ8PixelRGB(
	.param .align 16 .b8 _Z15ConvertRGBtoYIQ8PixelRGB_param_0[16]
)
{
	.reg .f32 	%f<23>;


	ld.param.f32 	%f1, [_Z15ConvertRGBtoYIQ8PixelRGB_param_0+12];
	ld.param.f32 	%f2, [_Z15ConvertRGBtoYIQ8PixelRGB_param_0];
	ld.param.f32 	%f3, [_Z15ConvertRGBtoYIQ8PixelRGB_param_0+8];
	ld.param.f32 	%f4, [_Z15ConvertRGBtoYIQ8PixelRGB_param_0+4];
	ld.const.f32 	%f5, [kRGB32f_To_YIQ];
	ld.const.f32 	%f6, [kRGB32f_To_YIQ+4];
	mul.ftz.f32 	%f7, %f4, %f6;
	fma.rn.ftz.f32 	%f8, %f3, %f5, %f7;
	ld.const.f32 	%f9, [kRGB32f_To_YIQ+8];
	fma.rn.ftz.f32 	%f10, %f2, %f9, %f8;
	ld.const.f32 	%f11, [kRGB32f_To_YIQ+12];
	ld.const.f32 	%f12, [kRGB32f_To_YIQ+16];
	mul.ftz.f32 	%f13, %f4, %f12;
	fma.rn.ftz.f32 	%f14, %f3, %f11, %f13;
	ld.const.f32 	%f15, [kRGB32f_To_YIQ+20];
	fma.rn.ftz.f32 	%f16, %f2, %f15, %f14;
	ld.const.f32 	%f17, [kRGB32f_To_YIQ+24];
	ld.const.f32 	%f18, [kRGB32f_To_YIQ+28];
	mul.ftz.f32 	%f19, %f4, %f18;
	fma.rn.ftz.f32 	%f20, %f3, %f17, %f19;
	ld.const.f32 	%f21, [kRGB32f_To_YIQ+32];
	fma.rn.ftz.f32 	%f22, %f2, %f21, %f20;
	st.param.f32	[func_retval0+0], %f1;
	st.param.f32	[func_retval0+4], %f10;
	st.param.f32	[func_retval0+8], %f16;
	st.param.f32	[func_retval0+12], %f22;
	ret;
}

.visible .func  (.param .align 16 .b8 func_retval0[16]) _Z15ConvertYIQtoRGB6float4(
	.param .align 16 .b8 _Z15ConvertYIQtoRGB6float4_param_0[16]
)
{
	.reg .f32 	%f<23>;


	ld.param.f32 	%f1, [_Z15ConvertYIQtoRGB6float4_param_0];
	ld.param.f32 	%f2, [_Z15ConvertYIQtoRGB6float4_param_0+12];
	ld.param.f32 	%f3, [_Z15ConvertYIQtoRGB6float4_param_0+4];
	ld.param.f32 	%f4, [_Z15ConvertYIQtoRGB6float4_param_0+8];
	ld.const.f32 	%f5, [kYIQ_To_RGB32f];
	ld.const.f32 	%f6, [kYIQ_To_RGB32f+4];
	mul.ftz.f32 	%f7, %f4, %f6;
	fma.rn.ftz.f32 	%f8, %f3, %f5, %f7;
	ld.const.f32 	%f9, [kYIQ_To_RGB32f+8];
	fma.rn.ftz.f32 	%f10, %f2, %f9, %f8;
	ld.const.f32 	%f11, [kYIQ_To_RGB32f+12];
	ld.const.f32 	%f12, [kYIQ_To_RGB32f+16];
	mul.ftz.f32 	%f13, %f4, %f12;
	fma.rn.ftz.f32 	%f14, %f3, %f11, %f13;
	ld.const.f32 	%f15, [kYIQ_To_RGB32f+20];
	fma.rn.ftz.f32 	%f16, %f2, %f15, %f14;
	ld.const.f32 	%f17, [kYIQ_To_RGB32f+24];
	ld.const.f32 	%f18, [kYIQ_To_RGB32f+28];
	mul.ftz.f32 	%f19, %f4, %f18;
	fma.rn.ftz.f32 	%f20, %f3, %f17, %f19;
	ld.const.f32 	%f21, [kYIQ_To_RGB32f+32];
	fma.rn.ftz.f32 	%f22, %f2, %f21, %f20;
	st.param.f32	[func_retval0+0], %f22;
	st.param.f32	[func_retval0+4], %f16;
	st.param.f32	[func_retval0+8], %f10;
	st.param.f32	[func_retval0+12], %f1;
	ret;
}

.visible .entry InvertKernel(
	.param .u32 InvertKernel_param_0,
	.param .u64 InvertKernel_param_1,
	.param .u32 InvertKernel_param_2,
	.param .u32 InvertKernel_param_3,
	.param .u32 InvertKernel_param_4,
	.param .u64 InvertKernel_param_5,
	.param .u32 InvertKernel_param_6,
	.param .u32 InvertKernel_param_7,
	.param .f32 InvertKernel_param_8
)
{
	.reg .pred 	%p<70>;
	.reg .s16 	%rs<13>;
	.reg .s32 	%r<24>;
	.reg .f32 	%f<222>;
	.reg .s64 	%rd<16>;


	ld.param.u32 	%r3, [InvertKernel_param_0];
	ld.param.u64 	%rd4, [InvertKernel_param_1];
	ld.param.u32 	%r7, [InvertKernel_param_2];
	ld.param.u32 	%r8, [InvertKernel_param_3];
	ld.param.u32 	%r4, [InvertKernel_param_4];
	ld.param.u64 	%rd5, [InvertKernel_param_5];
	ld.param.u32 	%r5, [InvertKernel_param_6];
	ld.param.u32 	%r6, [InvertKernel_param_7];
	ld.param.f32 	%f68, [InvertKernel_param_8];
	cvta.to.global.u64 	%rd1, %rd5;
	mov.u32 	%r9, %ntid.x;
	mov.u32 	%r10, %ctaid.x;
	mov.u32 	%r11, %tid.x;
	mad.lo.s32 	%r1, %r9, %r10, %r11;
	mov.u32 	%r12, %ntid.y;
	mov.u32 	%r13, %ctaid.y;
	mov.u32 	%r14, %tid.y;
	mad.lo.s32 	%r2, %r12, %r13, %r14;
	setp.ge.s32	%p1, %r2, %r8;
	setp.ge.s32	%p2, %r1, %r7;
	or.pred  	%p3, %p2, %p1;
	@%p3 bra 	BB4_57;

	mad.lo.s32 	%r15, %r2, %r5, %r1;
	cvt.s64.s32	%rd2, %r15;
	setp.eq.s32	%p4, %r3, 0;
	@%p4 bra 	BB4_3;

	shl.b64 	%rd6, %rd2, 4;
	add.s64 	%rd7, %rd1, %rd6;
	ld.global.v4.f32 	{%f69, %f70, %f71, %f72}, [%rd7];
	mov.f32 	%f179, %f72;
	mov.f32 	%f178, %f71;
	mov.f32 	%f177, %f70;
	mov.f32 	%f176, %f69;
	bra.uni 	BB4_4;

BB4_3:
	shl.b64 	%rd8, %rd2, 3;
	add.s64 	%rd9, %rd1, %rd8;
	ld.global.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd9];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f176, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f177, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f178, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f179, %temp;
	}

BB4_4:
	cvt.ftz.sat.f32.f32	%f216, %f178;
	cvt.ftz.sat.f32.f32	%f217, %f177;
	cvt.ftz.sat.f32.f32	%f218, %f176;
	cvt.ftz.sat.f32.f32	%f192, %f179;
	setp.gt.s32	%p5, %r6, 2;
	@%p5 bra 	BB4_9;

	setp.eq.s32	%p11, %r6, 0;
	@%p11 bra 	BB4_51;

	setp.eq.s32	%p12, %r6, 1;
	@%p12 bra 	BB4_50;

	setp.eq.s32	%p13, %r6, 2;
	@%p13 bra 	BB4_8;
	bra.uni 	BB4_52;

BB4_8:
	mov.f32 	%f165, 0f3F800000;
	sub.ftz.f32 	%f220, %f165, %f217;
	mov.f32 	%f221, %f218;
	mov.f32 	%f219, %f216;
	bra.uni 	BB4_52;

BB4_9:
	setp.gt.s32	%p6, %r6, 9;
	@%p6 bra 	BB4_14;

	setp.eq.s32	%p9, %r6, 3;
	@%p9 bra 	BB4_49;

	add.s32 	%r17, %r6, -5;
	setp.lt.u32	%p10, %r17, 4;
	@%p10 bra 	BB4_12;
	bra.uni 	BB4_52;

BB4_12:
	sub.ftz.f32 	%f111, %f217, %f218;
	setp.ge.ftz.f32	%p19, %f217, %f216;
	setp.ge.ftz.f32	%p20, %f217, %f218;
	and.pred  	%p21, %p19, %p20;
	sub.ftz.f32 	%f112, %f218, %f216;
	selp.f32	%f113, %f112, %f111, %p21;
	selp.f32	%f114, %f217, %f216, %p21;
	setp.ge.ftz.f32	%p22, %f218, %f216;
	setp.ge.ftz.f32	%p23, %f218, %f217;
	and.pred  	%p24, %p22, %p23;
	sub.ftz.f32 	%f115, %f216, %f217;
	selp.f32	%f33, %f115, %f113, %p24;
	selp.f32	%f116, %f218, %f114, %p24;
	setp.le.ftz.f32	%p25, %f217, %f216;
	setp.le.ftz.f32	%p26, %f217, %f218;
	and.pred  	%p27, %p25, %p26;
	selp.f32	%f117, %f217, %f216, %p27;
	setp.le.ftz.f32	%p28, %f218, %f216;
	setp.le.ftz.f32	%p29, %f218, %f217;
	and.pred  	%p30, %p28, %p29;
	selp.f32	%f118, %f218, %f117, %p30;
	add.ftz.f32 	%f119, %f116, %f118;
	mov.f32 	%f120, 0f40000000;
	div.approx.ftz.f32 	%f191, %f119, %f120;
	setp.gt.ftz.f32	%p31, %f191, 0f38D1B717;
	mov.f32 	%f183, 0f00000000;
	mov.f32 	%f172, 0f00000000;
	@%p31 bra 	BB4_27;

	mov.f32 	%f190, %f172;
	bra.uni 	BB4_30;

BB4_14:
	add.s32 	%r16, %r6, -10;
	setp.lt.u32	%p7, %r16, 4;
	@%p7 bra 	BB4_17;

	setp.ne.s32	%p8, %r6, 15;
	@%p8 bra 	BB4_52;

	mov.f32 	%f75, 0f3F800000;
	sub.ftz.f32 	%f76, %f75, %f192;
	sub.ftz.f32 	%f77, %f75, %f68;
	mul.ftz.f32 	%f78, %f77, %f76;
	fma.rn.ftz.f32 	%f192, %f192, %f68, %f78;
	bra.uni 	BB4_52;

BB4_17:
	ld.const.f32 	%f79, [kRGB32f_To_YIQ];
	ld.const.f32 	%f80, [kRGB32f_To_YIQ+4];
	mul.ftz.f32 	%f81, %f217, %f80;
	fma.rn.ftz.f32 	%f82, %f216, %f79, %f81;
	ld.const.f32 	%f83, [kRGB32f_To_YIQ+8];
	fma.rn.ftz.f32 	%f180, %f218, %f83, %f82;
	ld.const.f32 	%f84, [kRGB32f_To_YIQ+12];
	ld.const.f32 	%f85, [kRGB32f_To_YIQ+16];
	mul.ftz.f32 	%f86, %f217, %f85;
	fma.rn.ftz.f32 	%f87, %f216, %f84, %f86;
	ld.const.f32 	%f88, [kRGB32f_To_YIQ+20];
	fma.rn.ftz.f32 	%f181, %f218, %f88, %f87;
	ld.const.f32 	%f89, [kRGB32f_To_YIQ+24];
	ld.const.f32 	%f90, [kRGB32f_To_YIQ+28];
	mul.ftz.f32 	%f91, %f217, %f90;
	fma.rn.ftz.f32 	%f92, %f216, %f89, %f91;
	ld.const.f32 	%f93, [kRGB32f_To_YIQ+32];
	fma.rn.ftz.f32 	%f182, %f218, %f93, %f92;
	setp.gt.s32	%p14, %r6, 11;
	@%p14 bra 	BB4_21;

	setp.eq.s32	%p17, %r6, 10;
	@%p17 bra 	BB4_24;

	setp.eq.s32	%p18, %r6, 11;
	@%p18 bra 	BB4_20;
	bra.uni 	BB4_26;

BB4_20:
	mov.f32 	%f94, 0f3F800000;
	sub.ftz.f32 	%f180, %f94, %f180;
	bra.uni 	BB4_26;

BB4_21:
	setp.eq.s32	%p15, %r6, 12;
	@%p15 bra 	BB4_23;

	setp.ne.s32	%p16, %r6, 13;
	@%p16 bra 	BB4_26;
	bra.uni 	BB4_25;

BB4_23:
	neg.ftz.f32 	%f181, %f181;
	bra.uni 	BB4_26;

BB4_24:
	mov.f32 	%f95, 0f3F800000;
	sub.ftz.f32 	%f180, %f95, %f180;
	neg.ftz.f32 	%f181, %f181;

BB4_25:
	neg.ftz.f32 	%f182, %f182;

BB4_26:
	ld.const.f32 	%f96, [kYIQ_To_RGB32f];
	ld.const.f32 	%f97, [kYIQ_To_RGB32f+4];
	mul.ftz.f32 	%f98, %f181, %f97;
	fma.rn.ftz.f32 	%f99, %f180, %f96, %f98;
	ld.const.f32 	%f100, [kYIQ_To_RGB32f+8];
	fma.rn.ftz.f32 	%f219, %f182, %f100, %f99;
	ld.const.f32 	%f101, [kYIQ_To_RGB32f+12];
	ld.const.f32 	%f102, [kYIQ_To_RGB32f+16];
	mul.ftz.f32 	%f103, %f181, %f102;
	fma.rn.ftz.f32 	%f104, %f180, %f101, %f103;
	ld.const.f32 	%f105, [kYIQ_To_RGB32f+20];
	fma.rn.ftz.f32 	%f220, %f182, %f105, %f104;
	ld.const.f32 	%f106, [kYIQ_To_RGB32f+24];
	ld.const.f32 	%f107, [kYIQ_To_RGB32f+28];
	mul.ftz.f32 	%f108, %f181, %f107;
	fma.rn.ftz.f32 	%f109, %f180, %f106, %f108;
	ld.const.f32 	%f110, [kYIQ_To_RGB32f+32];
	fma.rn.ftz.f32 	%f221, %f182, %f110, %f109;
	bra.uni 	BB4_52;

BB4_27:
	sub.ftz.f32 	%f35, %f116, %f118;
	setp.gt.ftz.f32	%p44, %f35, 0f38D1B717;
	@%p44 bra 	BB4_29;

	mov.f32 	%f190, %f172;
	bra.uni 	BB4_30;

BB4_29:
	div.approx.ftz.f32 	%f129, %f33, %f35;
	selp.f32	%f130, 0f40000000, 0f00000000, %p21;
	selp.f32	%f131, 0f40800000, %f130, %p24;
	add.ftz.f32 	%f132, %f129, %f131;
	setp.lt.ftz.f32	%p51, %f132, 0f00000000;
	add.ftz.f32 	%f133, %f132, 0f40C00000;
	mov.f32 	%f134, 0f40C00000;
	selp.f32	%f135, %f133, %f132, %p51;
	div.approx.ftz.f32 	%f183, %f135, %f134;
	mov.f32 	%f190, %f35;

BB4_30:
	mov.f32 	%f38, %f190;
	setp.gt.s32	%p52, %r6, 6;
	@%p52 bra 	BB4_34;

	setp.eq.s32	%p55, %r6, 5;
	@%p55 bra 	BB4_38;

	setp.eq.s32	%p56, %r6, 6;
	mov.f32 	%f188, %f38;
	mov.f32 	%f189, %f188;
	@%p56 bra 	BB4_33;
	bra.uni 	BB4_39;

BB4_33:
	mov.f32 	%f138, 0f3F000000;
	sub.ftz.f32 	%f139, %f138, %f183;
	setp.lt.ftz.f32	%p57, %f139, 0f00000000;
	add.ftz.f32 	%f140, %f139, 0f3F800000;
	selp.f32	%f183, %f140, %f139, %p57;
	mov.f32 	%f189, %f38;
	bra.uni 	BB4_39;

BB4_34:
	setp.eq.s32	%p53, %r6, 7;
	@%p53 bra 	BB4_37;

	setp.ne.s32	%p54, %r6, 8;
	mov.f32 	%f189, %f38;
	@%p54 bra 	BB4_39;

	mov.f32 	%f136, 0f3F800000;
	sub.ftz.f32 	%f189, %f136, %f38;
	bra.uni 	BB4_39;

BB4_37:
	mov.f32 	%f137, 0f3F800000;
	sub.ftz.f32 	%f191, %f137, %f191;
	mov.f32 	%f189, %f38;
	bra.uni 	BB4_39;

BB4_38:
	mov.f32 	%f141, 0f3F000000;
	sub.ftz.f32 	%f142, %f141, %f183;
	setp.lt.ftz.f32	%p58, %f142, 0f00000000;
	add.ftz.f32 	%f143, %f142, 0f3F800000;
	mov.f32 	%f144, 0f3F800000;
	selp.f32	%f183, %f143, %f142, %p58;
	sub.ftz.f32 	%f191, %f144, %f191;
	sub.ftz.f32 	%f189, %f144, %f38;

BB4_39:
	add.ftz.f32 	%f145, %f189, 0f3F800000;
	mul.ftz.f32 	%f146, %f191, %f145;
	mul.ftz.f32 	%f147, %f191, %f189;
	add.ftz.f32 	%f148, %f191, %f189;
	sub.ftz.f32 	%f149, %f148, %f147;
	setp.gtu.ftz.f32	%p59, %f191, 0f3F000000;
	selp.f32	%f48, %f149, %f146, %p59;
	setp.gt.ftz.f32	%p60, %f48, 0f00000000;
	mov.f32 	%f173, 0f00000000;
	mov.f32 	%f174, 0f00000000;
	mov.f32 	%f175, 0f00000000;
	@%p60 bra 	BB4_41;

	mov.f32 	%f221, %f173;
	mov.f32 	%f220, %f174;
	mov.f32 	%f219, %f175;
	bra.uni 	BB4_52;

BB4_41:
	add.ftz.f32 	%f153, %f191, %f191;
	sub.ftz.f32 	%f49, %f153, %f48;
	sub.ftz.f32 	%f154, %f48, %f49;
	div.approx.ftz.f32 	%f155, %f154, %f48;
	mul.ftz.f32 	%f156, %f183, 0f40C00000;
	cvt.rzi.ftz.s32.f32	%r18, %f156;
	cvt.rn.f32.s32	%f157, %r18;
	sub.ftz.f32 	%f158, %f156, %f157;
	mul.ftz.f32 	%f159, %f48, %f155;
	mul.ftz.f32 	%f160, %f159, %f158;
	add.ftz.f32 	%f50, %f49, %f160;
	sub.ftz.f32 	%f51, %f48, %f160;
	setp.gt.s32	%p61, %r18, 2;
	@%p61 bra 	BB4_45;

	setp.eq.s32	%p65, %r18, 0;
	mov.f32 	%f202, %f48;
	mov.f32 	%f207, %f50;
	mov.f32 	%f219, %f202;
	mov.f32 	%f220, %f207;
	mov.f32 	%f221, %f49;
	@%p65 bra 	BB4_52;

	setp.eq.s32	%p66, %r18, 1;
	mov.f32 	%f198, %f49;
	mov.f32 	%f199, %f51;
	mov.f32 	%f203, %f48;
	mov.f32 	%f219, %f199;
	mov.f32 	%f220, %f203;
	mov.f32 	%f221, %f198;
	@%p66 bra 	BB4_52;

	setp.eq.s32	%p67, %r18, 2;
	mov.f32 	%f194, %f49;
	mov.f32 	%f204, %f48;
	mov.f32 	%f219, %f194;
	mov.f32 	%f220, %f204;
	mov.f32 	%f221, %f50;
	@%p67 bra 	BB4_52;
	bra.uni 	BB4_48;

BB4_45:
	setp.eq.s32	%p62, %r18, 3;
	mov.f32 	%f195, %f49;
	mov.f32 	%f200, %f51;
	mov.f32 	%f205, %f48;
	mov.f32 	%f219, %f195;
	mov.f32 	%f220, %f200;
	mov.f32 	%f221, %f205;
	@%p62 bra 	BB4_52;

	setp.eq.s32	%p63, %r18, 4;
	mov.f32 	%f196, %f49;
	mov.f32 	%f206, %f50;
	mov.f32 	%f219, %f206;
	mov.f32 	%f220, %f196;
	mov.f32 	%f221, %f48;
	@%p63 bra 	BB4_52;

	setp.ne.s32	%p64, %r18, 5;
	mov.f32 	%f197, %f49;
	mov.f32 	%f201, %f48;
	mov.f32 	%f219, %f201;
	mov.f32 	%f220, %f197;
	mov.f32 	%f221, %f51;
	@%p64 bra 	BB4_48;
	bra.uni 	BB4_52;

BB4_48:
	mov.f32 	%f219, %f175;
	mov.f32 	%f220, %f174;
	mov.f32 	%f221, %f173;
	bra.uni 	BB4_52;

BB4_49:
	mov.f32 	%f164, 0f3F800000;
	sub.ftz.f32 	%f221, %f164, %f218;
	mov.f32 	%f220, %f217;
	mov.f32 	%f219, %f216;
	bra.uni 	BB4_52;

BB4_50:
	mov.f32 	%f166, 0f3F800000;
	sub.ftz.f32 	%f219, %f166, %f216;
	mov.f32 	%f221, %f218;
	mov.f32 	%f220, %f217;
	bra.uni 	BB4_52;

BB4_51:
	mov.f32 	%f167, 0f3F800000;
	sub.ftz.f32 	%f219, %f167, %f216;
	sub.ftz.f32 	%f220, %f167, %f217;
	sub.ftz.f32 	%f221, %f167, %f218;

BB4_52:
	setp.eq.s32	%p68, %r6, 15;
	@%p68 bra 	BB4_54;

	sub.ftz.f32 	%f168, %f216, %f219;
	fma.rn.ftz.f32 	%f216, %f168, %f68, %f219;
	sub.ftz.f32 	%f169, %f217, %f220;
	fma.rn.ftz.f32 	%f217, %f169, %f68, %f220;
	sub.ftz.f32 	%f170, %f218, %f221;
	fma.rn.ftz.f32 	%f218, %f170, %f68, %f221;

BB4_54:
	mad.lo.s32 	%r23, %r2, %r4, %r1;
	cvt.s64.s32	%rd3, %r23;
	@%p4 bra 	BB4_56;

	cvta.to.global.u64 	%rd10, %rd4;
	shl.b64 	%rd11, %rd3, 4;
	add.s64 	%rd12, %rd10, %rd11;
	st.global.v4.f32 	[%rd12], {%f218, %f217, %f216, %f192};
	bra.uni 	BB4_57;

BB4_56:
	cvta.to.global.u64 	%rd13, %rd4;
	shl.b64 	%rd14, %rd3, 3;
	add.s64 	%rd15, %rd13, %rd14;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f192;
	mov.b16 	%rs9, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f216;
	mov.b16 	%rs10, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f217;
	mov.b16 	%rs11, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f218;
	mov.b16 	%rs12, %temp;
}
	st.global.v4.u16 	[%rd15], {%rs12, %rs11, %rs10, %rs9};

BB4_57:
	ret;
}


