//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Fri Jul 25 04:36:16 2014 (1406288176)
// Cuda compilation tools, release 6.5, V6.5.13
//

.version 4.1
.target sm_30
.address_size 64

.global .texref texture0_RECT;
.global .texref texture2_2D;
// ShaderKernel_HueSatCurve$__cuda_local_var_180674_564_non_const_p_local has been demoted

.visible .entry ShaderKernel_HueSatCurve(
	.param .u64 ShaderKernel_HueSatCurve_param_0,
	.param .u32 ShaderKernel_HueSatCurve_param_1,
	.param .u32 ShaderKernel_HueSatCurve_param_2,
	.param .u32 ShaderKernel_HueSatCurve_param_3,
	.param .u32 ShaderKernel_HueSatCurve_param_4,
	.param .u64 ShaderKernel_HueSatCurve_param_5,
	.param .u64 ShaderKernel_HueSatCurve_param_6,
	.param .u64 ShaderKernel_HueSatCurve_param_7
)
{
	.reg .pred 	%p<12>;
	.reg .s16 	%rs<5>;
	.reg .s32 	%r<14>;
	.reg .f32 	%f<75>;
	.reg .s64 	%rd<18>;
	// demoted variable
	.shared .align 16 .b8 ShaderKernel_HueSatCurve$__cuda_local_var_180674_564_non_const_p_local[32];

	ld.param.u64 	%rd4, [ShaderKernel_HueSatCurve_param_0];
	ld.param.u32 	%r4, [ShaderKernel_HueSatCurve_param_1];
	ld.param.u32 	%r5, [ShaderKernel_HueSatCurve_param_2];
	ld.param.u32 	%r6, [ShaderKernel_HueSatCurve_param_3];
	ld.param.u32 	%r7, [ShaderKernel_HueSatCurve_param_4];
	ld.param.u64 	%rd3, [ShaderKernel_HueSatCurve_param_5];
	cvta.to.global.u64 	%rd1, %rd4;
	mov.u32 	%r8, %ntid.x;
	mov.u32 	%r9, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r8, %r9, %r1;
	mov.u32 	%r10, %ntid.y;
	mov.u32 	%r11, %ctaid.y;
	mov.u32 	%r12, %tid.y;
	mad.lo.s32 	%r3, %r10, %r11, %r12;
	setp.lt.s32	%p1, %r2, %r6;
	setp.lt.s32	%p2, %r3, %r7;
	and.pred  	%p3, %p1, %p2;
	@!%p3 bra 	BB0_6;
	bra.uni 	BB0_1;

BB0_1:
	setp.gt.u32	%p4, %r1, 1;
	@%p4 bra 	BB0_3;

	cvta.to.global.u64 	%rd5, %rd3;
	mul.wide.u32 	%rd6, %r1, 16;
	mov.u64 	%rd7, ShaderKernel_HueSatCurve$__cuda_local_var_180674_564_non_const_p_local;
	add.s64 	%rd8, %rd7, %rd6;
	add.s64 	%rd9, %rd5, %rd6;
	ld.global.v4.f32 	{%f7, %f8, %f9, %f10}, [%rd9];
	st.shared.v4.f32 	[%rd8], {%f7, %f8, %f9, %f10};

BB0_3:
	cvt.rn.f32.s32	%f15, %r2;
	add.ftz.f32 	%f1, %f15, 0f3F000000;
	cvt.rn.f32.s32	%f16, %r3;
	add.ftz.f32 	%f2, %f16, 0f3F000000;
	bar.sync 	0;
	// inline asm
	tex.2d.v4.f32.f32 {%f17, %f18, %f19, %f20}, [texture0_RECT, {%f1, %f2}];
	// inline asm
	setp.gt.ftz.f32	%p5, %f19, %f18;
	selp.f32	%f29, %f19, %f18, %p5;
	setp.gt.ftz.f32	%p6, %f29, %f17;
	selp.f32	%f30, %f29, %f17, %p6;
	cvt.ftz.sat.f32.f32	%f31, %f30;
	selp.f32	%f32, %f18, %f19, %p5;
	setp.gt.ftz.f32	%p7, %f32, %f17;
	selp.f32	%f33, %f17, %f32, %p7;
	cvt.ftz.sat.f32.f32	%f34, %f33;
	sub.ftz.f32 	%f35, %f31, %f34;
	setp.gt.ftz.f32	%p8, %f35, 0f2EDBE6FF;
	selp.f32	%f36, %f35, 0f2EDBE6FF, %p8;
	mov.f32 	%f37, 0f3F800000;
	div.rn.ftz.f32 	%f38, %f37, %f36;
	cvt.ftz.sat.f32.f32	%f39, %f19;
	cvt.ftz.sat.f32.f32	%f40, %f18;
	cvt.ftz.sat.f32.f32	%f41, %f17;
	sub.ftz.f32 	%f42, %f18, %f41;
	sub.ftz.f32 	%f43, %f17, %f39;
	sub.ftz.f32 	%f44, %f19, %f40;
	mul.ftz.f32 	%f45, %f38, %f42;
	mul.ftz.f32 	%f46, %f38, %f43;
	mul.ftz.f32 	%f47, %f38, %f44;
	fma.rn.ftz.f32 	%f48, %f45, 0f3E2AAAAB, 0f00000000;
	fma.rn.ftz.f32 	%f49, %f46, 0f3E2AAAAB, 0f3EAAAAAB;
	fma.rn.ftz.f32 	%f50, %f47, 0f3E2AAAAB, 0f3F2AAAAB;
	sub.ftz.f32 	%f51, %f19, %f31;
	sub.ftz.f32 	%f52, %f18, %f31;
	setp.lt.ftz.f32	%p9, %f51, 0f00000000;
	selp.f32	%f53, %f50, %f48, %p9;
	setp.lt.ftz.f32	%p10, %f52, 0f00000000;
	selp.f32	%f54, %f53, %f49, %p10;
	cvt.rmi.ftz.f32.f32	%f55, %f54;
	sub.ftz.f32 	%f56, %f54, %f55;
	fma.rn.ftz.f32 	%f27, %f56, 0f3F7FF000, 0f3A000000;
	mov.f32 	%f28, 0f3D800000;
	// inline asm
	tex.2d.v4.f32.f32 {%f23, %f24, %f25, %f26}, [texture2_2D, {%f27, %f28}];
	// inline asm
	ld.shared.v4.f32 	{%f57, %f58, %f59, %f60}, [ShaderKernel_HueSatCurve$__cuda_local_var_180674_564_non_const_p_local];
	mul.ftz.f32 	%f62, %f18, %f58;
	fma.rn.ftz.f32 	%f64, %f19, %f57, %f62;
	fma.rn.ftz.f32 	%f66, %f17, %f59, %f64;
	ld.shared.v2.f32 	{%f67, %f68}, [ShaderKernel_HueSatCurve$__cuda_local_var_180674_564_non_const_p_local+16];
	fma.rn.ftz.f32 	%f71, %f23, %f67, %f68;
	sub.ftz.f32 	%f72, %f19, %f66;
	sub.ftz.f32 	%f73, %f18, %f66;
	sub.ftz.f32 	%f74, %f17, %f66;
	fma.rn.ftz.f32 	%f4, %f72, %f71, %f66;
	fma.rn.ftz.f32 	%f5, %f73, %f71, %f66;
	fma.rn.ftz.f32 	%f6, %f74, %f71, %f66;
	mad.lo.s32 	%r13, %r3, %r4, %r2;
	cvt.s64.s32	%rd2, %r13;
	setp.eq.s32	%p11, %r5, 0;
	@%p11 bra 	BB0_5;

	shl.b64 	%rd14, %rd2, 4;
	add.s64 	%rd15, %rd1, %rd14;
	st.global.v4.f32 	[%rd15], {%f6, %f5, %f4, %f20};
	bra.uni 	BB0_6;

BB0_5:
	shl.b64 	%rd16, %rd2, 3;
	add.s64 	%rd17, %rd1, %rd16;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f20;
	mov.b16 	%rs1, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f4;
	mov.b16 	%rs2, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f5;
	mov.b16 	%rs3, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f6;
	mov.b16 	%rs4, %temp;
}
	st.global.v4.u16 	[%rd17], {%rs4, %rs3, %rs2, %rs1};

BB0_6:
	ret;
}


