//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Fri Jul 25 04:36:16 2014 (1406288176)
// Cuda compilation tools, release 6.5, V6.5.13
//

.version 4.1
.target sm_30
.address_size 64

// VerticalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_8773_non_const_smem has been demoted
// VerticalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_9460_non_const_smem has been demoted
// HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem has been demoted
// HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem has been demoted

.visible .func  (.param .align 16 .b8 func_retval0[16]) _Z18UnpremultiplyPixel8PixelRGB(
	.param .align 16 .b8 _Z18UnpremultiplyPixel8PixelRGB_param_0[16]
)
{
	.reg .pred 	%p<2>;
	.reg .f32 	%f<24>;


	ld.param.f32 	%f11, [_Z18UnpremultiplyPixel8PixelRGB_param_0+8];
	ld.param.f32 	%f10, [_Z18UnpremultiplyPixel8PixelRGB_param_0+4];
	ld.param.f32 	%f9, [_Z18UnpremultiplyPixel8PixelRGB_param_0];
	ld.param.f32 	%f12, [_Z18UnpremultiplyPixel8PixelRGB_param_0+12];
	cvt.ftz.sat.f32.f32	%f20, %f12;
	add.ftz.f32 	%f13, %f20, 0fB70637BD;
	setp.gtu.ftz.f32	%p1, %f13, 0f00000000;
	@%p1 bra 	BB0_2;

	mov.f32 	%f23, 0f00000000;
	mov.f32 	%f22, %f23;
	mov.f32 	%f21, %f23;
	mov.f32 	%f20, %f23;
	bra.uni 	BB0_3;

BB0_2:
	mov.f32 	%f18, 0f3F800000;
	div.approx.ftz.f32 	%f19, %f18, %f20;
	mul.ftz.f32 	%f21, %f11, %f19;
	mul.ftz.f32 	%f22, %f10, %f19;
	mul.ftz.f32 	%f23, %f9, %f19;

BB0_3:
	st.param.f32	[func_retval0+0], %f23;
	st.param.f32	[func_retval0+4], %f22;
	st.param.f32	[func_retval0+8], %f21;
	st.param.f32	[func_retval0+12], %f20;
	ret;
}

.visible .func _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff(
	.param .b64 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_0,
	.param .b64 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_1,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_2,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_3,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_4,
	.param .b64 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_5,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_6,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_7,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_8,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_9,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_10,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_11,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_12,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_13,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_14,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_15,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_16,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_17,
	.param .b32 _Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_18
)
{
	.reg .pred 	%p<49>;
	.reg .s16 	%rs<33>;
	.reg .s32 	%r<109>;
	.reg .f32 	%f<301>;
	.reg .s64 	%rd<34>;


	ld.param.u64 	%rd6, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_0];
	ld.param.u64 	%rd7, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_1];
	ld.param.u32 	%r36, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_2];
	ld.param.u32 	%r37, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_3];
	ld.param.u32 	%r38, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_4];
	ld.param.u64 	%rd8, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_5];
	ld.param.u32 	%r39, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_6];
	ld.param.u32 	%r40, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_7];
	ld.param.u32 	%r41, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_8];
	ld.param.u32 	%r42, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_9];
	ld.param.u32 	%r43, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_10];
	ld.param.f32 	%f109, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_11];
	ld.param.f32 	%f110, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_12];
	ld.param.f32 	%f111, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_13];
	ld.param.f32 	%f112, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_14];
	ld.param.f32 	%f113, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_15];
	ld.param.f32 	%f114, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_16];
	ld.param.f32 	%f115, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_17];
	ld.param.f32 	%f116, [_Z25VerticalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_18];
	mov.u32 	%r44, %ntid.x;
	mov.u32 	%r45, %ctaid.x;
	mov.u32 	%r46, %tid.x;
	mad.lo.s32 	%r1, %r45, %r44, %r46;
	sub.s32 	%r47, %r41, %r38;
	shr.s32 	%r48, %r47, 1;
	mov.u32 	%r108, %tid.y;
	sub.s32 	%r106, %r108, %r48;
	setp.ge.s32	%p1, %r1, %r40;
	@%p1 bra 	BB1_61;

	sub.s32 	%r49, %r40, %r37;
	shr.s32 	%r50, %r49, 1;
	sub.s32 	%r51, %r1, %r50;
	mad.lo.s32 	%r105, %r106, %r36, %r51;
	setp.gt.s32	%p2, %r41, 0;
	@%p2 bra 	BB1_3;

	mov.u32 	%r107, 0;
	bra.uni 	BB1_24;

BB1_3:
	mad.lo.s32 	%r103, %r108, %r39, %r1;
	mov.u32 	%r107, 0;
	mov.f32 	%f263, 0f00000000;
	mov.f32 	%f262, %f263;
	mov.f32 	%f261, %f263;

BB1_4:
	setp.lt.s32	%p3, %r51, %r37;
	setp.gt.s32	%p4, %r51, -1;
	setp.lt.s32	%p5, %r106, %r38;
	setp.gt.s32	%p6, %r106, -1;
	and.pred  	%p7, %p6, %p5;
	and.pred  	%p8, %p7, %p4;
	and.pred  	%p9, %p8, %p3;
	@%p9 bra 	BB1_6;

	mov.f32 	%f274, 0f00000000;
	mov.f32 	%f273, %f274;
	mov.f32 	%f272, %f274;
	mov.f32 	%f271, %f274;
	bra.uni 	BB1_19;

BB1_6:
	setp.eq.s32	%p10, %r42, 0;
	cvt.s64.s32	%rd1, %r105;
	@%p10 bra 	BB1_8;

	shl.b64 	%rd9, %rd1, 4;
	add.s64 	%rd10, %rd7, %rd9;
	ld.v4.f32 	{%f124, %f125, %f126, %f127}, [%rd10];
	mov.f32 	%f267, %f127;
	mov.f32 	%f266, %f126;
	mov.f32 	%f265, %f125;
	mov.f32 	%f264, %f124;
	bra.uni 	BB1_9;

BB1_8:
	shl.b64 	%rd11, %rd1, 3;
	add.s64 	%rd12, %rd7, %rd11;
	ld.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd12];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f264, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f265, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f266, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f267, %temp;
	}

BB1_9:
	cvt.ftz.sat.f32.f32	%f274, %f267;
	setp.ltu.ftz.f32	%p11, %f264, 0f00000000;
	@%p11 bra 	BB1_11;

	lg2.approx.ftz.f32 	%f128, %f264;
	mul.ftz.f32 	%f129, %f128, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f268, %f129;
	bra.uni 	BB1_12;

BB1_11:
	neg.ftz.f32 	%f130, %f264;
	lg2.approx.ftz.f32 	%f131, %f130;
	mul.ftz.f32 	%f132, %f131, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f133, %f132;
	neg.ftz.f32 	%f268, %f133;

BB1_12:
	setp.ltu.ftz.f32	%p12, %f265, 0f00000000;
	@%p12 bra 	BB1_14;

	lg2.approx.ftz.f32 	%f134, %f265;
	mul.ftz.f32 	%f135, %f134, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f269, %f135;
	bra.uni 	BB1_15;

BB1_14:
	neg.ftz.f32 	%f136, %f265;
	lg2.approx.ftz.f32 	%f137, %f136;
	mul.ftz.f32 	%f138, %f137, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f139, %f138;
	neg.ftz.f32 	%f269, %f139;

BB1_15:
	setp.ltu.ftz.f32	%p13, %f266, 0f00000000;
	@%p13 bra 	BB1_17;

	lg2.approx.ftz.f32 	%f140, %f266;
	mul.ftz.f32 	%f141, %f140, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f270, %f141;
	bra.uni 	BB1_18;

BB1_17:
	neg.ftz.f32 	%f142, %f266;
	lg2.approx.ftz.f32 	%f143, %f142;
	mul.ftz.f32 	%f144, %f143, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f145, %f144;
	neg.ftz.f32 	%f270, %f145;

BB1_18:
	mul.ftz.f32 	%f273, %f270, %f274;
	mul.ftz.f32 	%f272, %f269, %f274;
	mul.ftz.f32 	%f271, %f268, %f274;

BB1_19:
	mov.u32 	%r11, %tid.y;
	shl.b32 	%r61, %r11, 5;
	add.s32 	%r62, %r61, %r46;
	mul.wide.s32 	%rd13, %r62, 4;
	add.s64 	%rd14, %rd6, %rd13;
	st.f32 	[%rd14], %f271;
	st.f32 	[%rd14+512], %f272;
	st.f32 	[%rd14+1024], %f273;
	st.f32 	[%rd14+1536], %f274;
	bar.sync 	0;
	shl.b32 	%r63, %r11, 7;
	add.s32 	%r64, %r46, %r63;
	mul.wide.s32 	%rd15, %r64, 4;
	add.s64 	%rd16, %rd6, %rd15;
	setp.eq.s32	%p14, %r107, 0;
	setp.ne.s32	%p15, %r43, 0;
	and.pred  	%p16, %p14, %p15;
	ld.f32 	%f146, [%rd16];
	mul.ftz.f32 	%f147, %f146, 0f3F000000;
	selp.f32	%f148, %f147, %f262, %p16;
	selp.f32	%f149, %f147, %f261, %p16;
	mul.ftz.f32 	%f150, %f263, %f110;
	fma.rn.ftz.f32 	%f151, %f146, %f109, %f150;
	fma.rn.ftz.f32 	%f152, %f148, %f111, %f151;
	fma.rn.ftz.f32 	%f153, %f149, %f112, %f152;
	st.f32 	[%rd16], %f153;
	ld.f32 	%f154, [%rd16+128];
	mul.ftz.f32 	%f155, %f146, %f110;
	fma.rn.ftz.f32 	%f156, %f154, %f109, %f155;
	fma.rn.ftz.f32 	%f157, %f153, %f111, %f156;
	fma.rn.ftz.f32 	%f158, %f148, %f112, %f157;
	st.f32 	[%rd16+128], %f158;
	ld.f32 	%f159, [%rd16+256];
	mul.ftz.f32 	%f160, %f154, %f110;
	fma.rn.ftz.f32 	%f161, %f159, %f109, %f160;
	fma.rn.ftz.f32 	%f162, %f158, %f111, %f161;
	fma.rn.ftz.f32 	%f261, %f153, %f112, %f162;
	st.f32 	[%rd16+256], %f261;
	ld.f32 	%f263, [%rd16+384];
	mul.ftz.f32 	%f163, %f159, %f110;
	fma.rn.ftz.f32 	%f164, %f263, %f109, %f163;
	fma.rn.ftz.f32 	%f165, %f261, %f111, %f164;
	fma.rn.ftz.f32 	%f262, %f158, %f112, %f165;
	st.f32 	[%rd16+384], %f262;
	bar.sync 	0;
	setp.ge.s32	%p17, %r108, %r41;
	@%p17 bra 	BB1_23;

	setp.eq.s32	%p18, %r42, 0;
	mul.wide.s32 	%rd17, %r62, 4;
	add.s64 	%rd18, %rd6, %rd17;
	ld.f32 	%f36, [%rd18];
	ld.f32 	%f37, [%rd18+512];
	ld.f32 	%f38, [%rd18+1024];
	ld.f32 	%f39, [%rd18+1536];
	@%p18 bra 	BB1_22;

	mul.wide.s32 	%rd19, %r103, 16;
	add.s64 	%rd20, %rd8, %rd19;
	st.v4.f32 	[%rd20], {%f36, %f37, %f38, %f39};
	bra.uni 	BB1_23;

BB1_22:
	mul.wide.s32 	%rd21, %r103, 8;
	add.s64 	%rd22, %rd8, %rd21;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f39;
	mov.b16 	%rs9, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f38;
	mov.b16 	%rs10, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f37;
	mov.b16 	%rs11, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f36;
	mov.b16 	%rs12, %temp;
}
	st.v4.u16 	[%rd22], {%rs12, %rs11, %rs10, %rs9};

BB1_23:
	bar.sync 	0;
	add.s32 	%r106, %r106, 4;
	add.s32 	%r108, %r108, 4;
	shl.b32 	%r69, %r36, 2;
	add.s32 	%r105, %r105, %r69;
	shl.b32 	%r70, %r39, 2;
	add.s32 	%r103, %r103, %r70;
	add.s32 	%r107, %r107, 4;
	setp.lt.s32	%p19, %r107, %r41;
	@%p19 bra 	BB1_4;

BB1_24:
	setp.lt.s32	%p20, %r107, 1;
	@%p20 bra 	BB1_61;

	add.s32 	%r22, %r107, -1;
	mov.f32 	%f278, 0f00000000;
	mov.f32 	%f277, %f278;
	mov.f32 	%f276, %f278;
	mov.f32 	%f275, %f278;
	mov.u32 	%r104, 0;

BB1_26:
	setp.lt.s32	%p21, %r51, %r37;
	setp.gt.s32	%p22, %r51, -1;
	add.s32 	%r107, %r107, -4;
	add.s32 	%r108, %r108, -4;
	add.s32 	%r106, %r106, -4;
	setp.gt.s32	%p23, %r106, -1;
	setp.lt.s32	%p24, %r106, %r38;
	and.pred  	%p25, %p23, %p24;
	and.pred  	%p26, %p25, %p22;
	and.pred  	%p27, %p26, %p21;
	@%p27 bra 	BB1_28;

	mov.f32 	%f289, 0f00000000;
	mov.f32 	%f288, %f289;
	mov.f32 	%f287, %f289;
	mov.f32 	%f286, %f289;
	bra.uni 	BB1_41;

BB1_28:
	shl.b32 	%r79, %r36, 2;
	sub.s32 	%r80, %r105, %r79;
	setp.eq.s32	%p28, %r42, 0;
	cvt.s64.s32	%rd2, %r80;
	@%p28 bra 	BB1_30;

	shl.b64 	%rd23, %rd2, 4;
	add.s64 	%rd24, %rd7, %rd23;
	ld.v4.f32 	{%f174, %f175, %f176, %f177}, [%rd24];
	mov.f32 	%f282, %f177;
	mov.f32 	%f281, %f176;
	mov.f32 	%f280, %f175;
	mov.f32 	%f279, %f174;
	bra.uni 	BB1_31;

BB1_30:
	shl.b64 	%rd25, %rd2, 3;
	add.s64 	%rd26, %rd7, %rd25;
	ld.v4.u16 	{%rs13, %rs14, %rs15, %rs16}, [%rd26];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs13;
	cvt.f32.f16 	%f279, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs14;
	cvt.f32.f16 	%f280, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs15;
	cvt.f32.f16 	%f281, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs16;
	cvt.f32.f16 	%f282, %temp;
	}

BB1_31:
	cvt.ftz.sat.f32.f32	%f289, %f282;
	setp.ltu.ftz.f32	%p29, %f279, 0f00000000;
	@%p29 bra 	BB1_33;

	lg2.approx.ftz.f32 	%f178, %f279;
	mul.ftz.f32 	%f179, %f178, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f283, %f179;
	bra.uni 	BB1_34;

BB1_33:
	neg.ftz.f32 	%f180, %f279;
	lg2.approx.ftz.f32 	%f181, %f180;
	mul.ftz.f32 	%f182, %f181, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f183, %f182;
	neg.ftz.f32 	%f283, %f183;

BB1_34:
	setp.ltu.ftz.f32	%p30, %f280, 0f00000000;
	@%p30 bra 	BB1_36;

	lg2.approx.ftz.f32 	%f184, %f280;
	mul.ftz.f32 	%f185, %f184, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f284, %f185;
	bra.uni 	BB1_37;

BB1_36:
	neg.ftz.f32 	%f186, %f280;
	lg2.approx.ftz.f32 	%f187, %f186;
	mul.ftz.f32 	%f188, %f187, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f189, %f188;
	neg.ftz.f32 	%f284, %f189;

BB1_37:
	setp.ltu.ftz.f32	%p31, %f281, 0f00000000;
	@%p31 bra 	BB1_39;

	lg2.approx.ftz.f32 	%f190, %f281;
	mul.ftz.f32 	%f191, %f190, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f285, %f191;
	bra.uni 	BB1_40;

BB1_39:
	neg.ftz.f32 	%f192, %f281;
	lg2.approx.ftz.f32 	%f193, %f192;
	mul.ftz.f32 	%f194, %f193, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f195, %f194;
	neg.ftz.f32 	%f285, %f195;

BB1_40:
	mul.ftz.f32 	%f288, %f285, %f289;
	mul.ftz.f32 	%f287, %f284, %f289;
	mul.ftz.f32 	%f286, %f283, %f289;

BB1_41:
	mad.lo.s32 	%r31, %r104, -4, %r22;
	mov.u32 	%r32, %tid.y;
	shl.b32 	%r81, %r32, 5;
	add.s32 	%r82, %r81, %r46;
	mul.wide.s32 	%rd27, %r82, 4;
	add.s64 	%rd28, %rd6, %rd27;
	st.f32 	[%rd28], %f286;
	st.f32 	[%rd28+512], %f287;
	st.f32 	[%rd28+1024], %f288;
	st.f32 	[%rd28+1536], %f289;
	bar.sync 	0;
	shl.b32 	%r83, %r32, 7;
	add.s32 	%r84, %r46, %r83;
	mul.wide.s32 	%rd29, %r84, 4;
	add.s64 	%rd30, %rd6, %rd29;
	add.s32 	%r85, %r41, -1;
	setp.eq.s32	%p32, %r31, %r85;
	setp.ne.s32	%p33, %r43, 0;
	and.pred  	%p34, %p32, %p33;
	ld.f32 	%f196, [%rd30+384];
	mul.ftz.f32 	%f197, %f196, 0f3F000000;
	selp.f32	%f198, %f197, %f276, %p34;
	selp.f32	%f199, %f197, %f275, %p34;
	mul.ftz.f32 	%f200, %f277, %f114;
	fma.rn.ftz.f32 	%f201, %f278, %f113, %f200;
	fma.rn.ftz.f32 	%f202, %f198, %f115, %f201;
	fma.rn.ftz.f32 	%f203, %f199, %f116, %f202;
	st.f32 	[%rd30+384], %f203;
	setp.eq.s32	%p35, %r31, %r41;
	and.pred  	%p36, %p35, %p33;
	ld.f32 	%f204, [%rd30+256];
	mul.ftz.f32 	%f205, %f204, 0f3F000000;
	selp.f32	%f206, %f205, %f203, %p36;
	selp.f32	%f207, %f205, %f198, %p36;
	mul.ftz.f32 	%f208, %f278, %f114;
	fma.rn.ftz.f32 	%f209, %f196, %f113, %f208;
	fma.rn.ftz.f32 	%f210, %f206, %f115, %f209;
	fma.rn.ftz.f32 	%f211, %f207, %f116, %f210;
	st.f32 	[%rd30+256], %f211;
	add.s32 	%r86, %r31, -2;
	setp.eq.s32	%p37, %r86, %r85;
	and.pred  	%p38, %p37, %p33;
	ld.f32 	%f277, [%rd30+128];
	mul.ftz.f32 	%f212, %f277, 0f3F000000;
	selp.f32	%f213, %f212, %f211, %p38;
	selp.f32	%f214, %f212, %f206, %p38;
	mul.ftz.f32 	%f215, %f196, %f114;
	fma.rn.ftz.f32 	%f216, %f204, %f113, %f215;
	fma.rn.ftz.f32 	%f217, %f213, %f115, %f216;
	fma.rn.ftz.f32 	%f218, %f214, %f116, %f217;
	st.f32 	[%rd30+128], %f218;
	add.s32 	%r87, %r31, -3;
	setp.eq.s32	%p39, %r87, %r85;
	and.pred  	%p40, %p39, %p33;
	ld.f32 	%f278, [%rd30];
	mul.ftz.f32 	%f219, %f278, 0f3F000000;
	selp.f32	%f275, %f219, %f218, %p40;
	selp.f32	%f220, %f219, %f213, %p40;
	mul.ftz.f32 	%f221, %f204, %f114;
	fma.rn.ftz.f32 	%f222, %f277, %f113, %f221;
	fma.rn.ftz.f32 	%f223, %f275, %f115, %f222;
	fma.rn.ftz.f32 	%f276, %f220, %f116, %f223;
	st.f32 	[%rd30], %f276;
	bar.sync 	0;
	setp.ge.s32	%p41, %r108, %r41;
	@%p41 bra 	BB1_60;

	mad.lo.s32 	%r91, %r108, %r39, %r1;
	setp.eq.s32	%p42, %r42, 0;
	mul.wide.s32 	%rd31, %r91, 16;
	add.s64 	%rd3, %rd8, %rd31;
	mul.wide.s32 	%rd32, %r91, 8;
	add.s64 	%rd4, %rd8, %rd32;
	@%p42 bra 	BB1_44;

	ld.v4.f32 	{%f224, %f225, %f226, %f227}, [%rd3];
	mov.f32 	%f293, %f227;
	mov.f32 	%f292, %f226;
	mov.f32 	%f291, %f225;
	mov.f32 	%f290, %f224;
	bra.uni 	BB1_45;

BB1_44:
	ld.v4.u16 	{%rs21, %rs22, %rs23, %rs24}, [%rd4];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs21;
	cvt.f32.f16 	%f290, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs22;
	cvt.f32.f16 	%f291, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs23;
	cvt.f32.f16 	%f292, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs24;
	cvt.f32.f16 	%f293, %temp;
	}

BB1_45:
	mul.wide.s32 	%rd33, %r82, 4;
	add.s64 	%rd5, %rd6, %rd33;
	ld.f32 	%f228, [%rd5+1536];
	add.ftz.f32 	%f229, %f293, %f228;
	cvt.ftz.sat.f32.f32	%f294, %f229;
	add.ftz.f32 	%f230, %f294, 0fB70637BD;
	setp.gtu.ftz.f32	%p43, %f230, 0f00000000;
	@%p43 bra 	BB1_47;

	mov.f32 	%f297, 0f00000000;
	mov.f32 	%f296, %f297;
	mov.f32 	%f295, %f297;
	mov.f32 	%f294, %f297;
	bra.uni 	BB1_48;

BB1_47:
	ld.f32 	%f235, [%rd5];
	add.ftz.f32 	%f236, %f290, %f235;
	ld.f32 	%f237, [%rd5+512];
	add.ftz.f32 	%f238, %f291, %f237;
	ld.f32 	%f239, [%rd5+1024];
	add.ftz.f32 	%f240, %f292, %f239;
	mov.f32 	%f241, 0f3F800000;
	div.approx.ftz.f32 	%f242, %f241, %f294;
	mul.ftz.f32 	%f295, %f240, %f242;
	mul.ftz.f32 	%f296, %f238, %f242;
	mul.ftz.f32 	%f297, %f236, %f242;

BB1_48:
	setp.ltu.ftz.f32	%p44, %f297, 0f00000000;
	@%p44 bra 	BB1_50;

	lg2.approx.ftz.f32 	%f243, %f297;
	mul.ftz.f32 	%f244, %f243, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f298, %f244;
	bra.uni 	BB1_51;

BB1_50:
	neg.ftz.f32 	%f245, %f297;
	lg2.approx.ftz.f32 	%f246, %f245;
	mul.ftz.f32 	%f247, %f246, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f248, %f247;
	neg.ftz.f32 	%f298, %f248;

BB1_51:
	setp.ltu.ftz.f32	%p45, %f296, 0f00000000;
	@%p45 bra 	BB1_53;

	lg2.approx.ftz.f32 	%f249, %f296;
	mul.ftz.f32 	%f250, %f249, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f299, %f250;
	bra.uni 	BB1_54;

BB1_53:
	neg.ftz.f32 	%f251, %f296;
	lg2.approx.ftz.f32 	%f252, %f251;
	mul.ftz.f32 	%f253, %f252, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f254, %f253;
	neg.ftz.f32 	%f299, %f254;

BB1_54:
	setp.ltu.ftz.f32	%p46, %f295, 0f00000000;
	@%p46 bra 	BB1_56;

	lg2.approx.ftz.f32 	%f255, %f295;
	mul.ftz.f32 	%f256, %f255, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f300, %f256;
	bra.uni 	BB1_57;

BB1_56:
	neg.ftz.f32 	%f257, %f295;
	lg2.approx.ftz.f32 	%f258, %f257;
	mul.ftz.f32 	%f259, %f258, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f260, %f259;
	neg.ftz.f32 	%f300, %f260;

BB1_57:
	@%p42 bra 	BB1_59;

	st.v4.f32 	[%rd3], {%f298, %f299, %f300, %f294};
	bra.uni 	BB1_60;

BB1_59:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f294;
	mov.b16 	%rs29, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f300;
	mov.b16 	%rs30, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f299;
	mov.b16 	%rs31, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f298;
	mov.b16 	%rs32, %temp;
}
	st.v4.u16 	[%rd4], {%rs32, %rs31, %rs30, %rs29};

BB1_60:
	bar.sync 	0;
	add.s32 	%r104, %r104, 1;
	mad.lo.s32 	%r105, %r106, %r36, %r51;
	setp.gt.s32	%p48, %r107, 0;
	@%p48 bra 	BB1_26;

BB1_61:
	ret;
}

.visible .func _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff(
	.param .b64 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_0,
	.param .b64 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_1,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_2,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_3,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_4,
	.param .b64 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_5,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_6,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_7,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_8,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_9,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_10,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_11,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_12,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_13,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_14,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_15,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_16,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_17,
	.param .b32 _Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_18
)
{
	.reg .pred 	%p<98>;
	.reg .s16 	%rs<65>;
	.reg .s32 	%r<234>;
	.reg .f32 	%f<589>;
	.reg .s64 	%rd<74>;


	ld.param.u64 	%rd16, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_0];
	ld.param.u64 	%rd17, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_1];
	ld.param.u32 	%r28, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_2];
	ld.param.u32 	%r29, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_3];
	ld.param.u32 	%r30, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_4];
	ld.param.u64 	%rd18, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_5];
	ld.param.u32 	%r31, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_6];
	ld.param.u32 	%r32, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_7];
	ld.param.u32 	%r33, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_8];
	ld.param.u32 	%r34, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_9];
	ld.param.u32 	%r35, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_10];
	ld.param.f32 	%f223, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_11];
	ld.param.f32 	%f224, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_12];
	ld.param.f32 	%f225, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_13];
	ld.param.f32 	%f226, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_14];
	ld.param.f32 	%f227, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_15];
	ld.param.f32 	%f228, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_16];
	ld.param.f32 	%f229, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_17];
	ld.param.f32 	%f230, [_Z27HorizontalRecursiveGaussianPfPK6float4iiiPS0_iii17DevicePixelFormatiffffffff_param_18];
	mov.u32 	%r231, 0;
	setp.gt.s32	%p6, %r32, 0;
	@%p6 bra 	BB2_1;
	bra.uni 	BB2_50;

BB2_1:
	mov.f32 	%f540, 0f00000000;
	mov.f32 	%f539, %f540;
	mov.f32 	%f538, %f540;
	mov.u32 	%r229, %r231;

BB2_2:
	mov.u32 	%r227, %r229;
	mov.u32 	%r1, %r227;
	mov.u32 	%r39, %ctaid.y;
	shl.b32 	%r40, %r39, 3;
	mov.u32 	%r41, %tid.y;
	add.s32 	%r42, %r40, %r41;
	sub.s32 	%r43, %r33, %r30;
	shr.s32 	%r44, %r43, 1;
	sub.s32 	%r45, %r42, %r44;
	setp.lt.s32	%p7, %r45, %r30;
	mov.u32 	%r46, %tid.x;
	add.s32 	%r3, %r231, %r46;
	sub.s32 	%r47, %r32, %r29;
	shr.s32 	%r4, %r47, 1;
	setp.gt.s32	%p8, %r45, -1;
	and.pred  	%p1, %p8, %p7;
	setp.ge.s32	%p9, %r45, %r30;
	@%p9 bra 	BB2_19;

	sub.s32 	%r48, %r3, %r4;
	setp.gt.s32	%p10, %r48, -1;
	and.pred  	%p11, %p1, %p10;
	setp.lt.s32	%p12, %r48, %r29;
	and.pred  	%p13, %p11, %p12;
	@%p13 bra 	BB2_5;

	mov.f32 	%f526, 0f00000000;
	mov.f32 	%f525, %f526;
	mov.f32 	%f524, %f526;
	mov.f32 	%f523, %f526;
	bra.uni 	BB2_18;

BB2_5:
	setp.eq.s32	%p14, %r34, 0;
	mad.lo.s32 	%r57, %r45, %r28, %r48;
	cvt.s64.s32	%rd1, %r57;
	@%p14 bra 	BB2_7;

	shl.b64 	%rd19, %rd1, 4;
	add.s64 	%rd20, %rd17, %rd19;
	ld.v4.f32 	{%f238, %f239, %f240, %f241}, [%rd20];
	mov.f32 	%f519, %f241;
	mov.f32 	%f518, %f240;
	mov.f32 	%f517, %f239;
	mov.f32 	%f516, %f238;
	bra.uni 	BB2_8;

BB2_7:
	shl.b64 	%rd21, %rd1, 3;
	add.s64 	%rd22, %rd17, %rd21;
	ld.v4.u16 	{%rs1, %rs2, %rs3, %rs4}, [%rd22];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs1;
	cvt.f32.f16 	%f516, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs2;
	cvt.f32.f16 	%f517, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs3;
	cvt.f32.f16 	%f518, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs4;
	cvt.f32.f16 	%f519, %temp;
	}

BB2_8:
	cvt.ftz.sat.f32.f32	%f526, %f519;
	setp.ltu.ftz.f32	%p15, %f516, 0f00000000;
	@%p15 bra 	BB2_10;

	lg2.approx.ftz.f32 	%f242, %f516;
	mul.ftz.f32 	%f243, %f242, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f520, %f243;
	bra.uni 	BB2_11;

BB2_10:
	neg.ftz.f32 	%f244, %f516;
	lg2.approx.ftz.f32 	%f245, %f244;
	mul.ftz.f32 	%f246, %f245, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f247, %f246;
	neg.ftz.f32 	%f520, %f247;

BB2_11:
	setp.ltu.ftz.f32	%p16, %f517, 0f00000000;
	@%p16 bra 	BB2_13;

	lg2.approx.ftz.f32 	%f248, %f517;
	mul.ftz.f32 	%f249, %f248, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f521, %f249;
	bra.uni 	BB2_14;

BB2_13:
	neg.ftz.f32 	%f250, %f517;
	lg2.approx.ftz.f32 	%f251, %f250;
	mul.ftz.f32 	%f252, %f251, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f253, %f252;
	neg.ftz.f32 	%f521, %f253;

BB2_14:
	setp.ltu.ftz.f32	%p17, %f518, 0f00000000;
	@%p17 bra 	BB2_16;

	lg2.approx.ftz.f32 	%f254, %f518;
	mul.ftz.f32 	%f255, %f254, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f522, %f255;
	bra.uni 	BB2_17;

BB2_16:
	neg.ftz.f32 	%f256, %f518;
	lg2.approx.ftz.f32 	%f257, %f256;
	mul.ftz.f32 	%f258, %f257, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f259, %f258;
	neg.ftz.f32 	%f522, %f259;

BB2_17:
	mul.ftz.f32 	%f525, %f522, %f526;
	mul.ftz.f32 	%f524, %f521, %f526;
	mul.ftz.f32 	%f523, %f520, %f526;

BB2_18:
	mad.lo.s32 	%r60, %r41, 33, %r46;
	mul.wide.s32 	%rd23, %r60, 4;
	add.s64 	%rd24, %rd16, %rd23;
	st.f32 	[%rd24], %f523;
	st.f32 	[%rd24+1056], %f524;
	st.f32 	[%rd24+2112], %f525;
	st.f32 	[%rd24+3168], %f526;

BB2_19:
	add.s32 	%r67, %r45, 4;
	setp.ge.s32	%p18, %r67, %r30;
	@%p18 bra 	BB2_36;

	sub.s32 	%r68, %r3, %r4;
	setp.gt.s32	%p19, %r68, -1;
	and.pred  	%p20, %p1, %p19;
	setp.lt.s32	%p21, %r68, %r29;
	and.pred  	%p22, %p20, %p21;
	@%p22 bra 	BB2_22;

	mov.f32 	%f537, 0f00000000;
	mov.f32 	%f536, %f537;
	mov.f32 	%f535, %f537;
	mov.f32 	%f534, %f537;
	bra.uni 	BB2_35;

BB2_22:
	mad.lo.s32 	%r72, %r45, %r28, %r68;
	shl.b32 	%r73, %r28, 2;
	add.s32 	%r74, %r72, %r73;
	setp.eq.s32	%p23, %r34, 0;
	cvt.s64.s32	%rd2, %r74;
	@%p23 bra 	BB2_24;

	shl.b64 	%rd25, %rd2, 4;
	add.s64 	%rd26, %rd17, %rd25;
	ld.v4.f32 	{%f264, %f265, %f266, %f267}, [%rd26];
	mov.f32 	%f530, %f267;
	mov.f32 	%f529, %f266;
	mov.f32 	%f528, %f265;
	mov.f32 	%f527, %f264;
	bra.uni 	BB2_25;

BB2_24:
	shl.b64 	%rd27, %rd2, 3;
	add.s64 	%rd28, %rd17, %rd27;
	ld.v4.u16 	{%rs9, %rs10, %rs11, %rs12}, [%rd28];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs9;
	cvt.f32.f16 	%f527, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs10;
	cvt.f32.f16 	%f528, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs11;
	cvt.f32.f16 	%f529, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs12;
	cvt.f32.f16 	%f530, %temp;
	}

BB2_25:
	cvt.ftz.sat.f32.f32	%f537, %f530;
	setp.ltu.ftz.f32	%p24, %f527, 0f00000000;
	@%p24 bra 	BB2_27;

	lg2.approx.ftz.f32 	%f268, %f527;
	mul.ftz.f32 	%f269, %f268, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f531, %f269;
	bra.uni 	BB2_28;

BB2_27:
	neg.ftz.f32 	%f270, %f527;
	lg2.approx.ftz.f32 	%f271, %f270;
	mul.ftz.f32 	%f272, %f271, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f273, %f272;
	neg.ftz.f32 	%f531, %f273;

BB2_28:
	setp.ltu.ftz.f32	%p25, %f528, 0f00000000;
	@%p25 bra 	BB2_30;

	lg2.approx.ftz.f32 	%f274, %f528;
	mul.ftz.f32 	%f275, %f274, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f532, %f275;
	bra.uni 	BB2_31;

BB2_30:
	neg.ftz.f32 	%f276, %f528;
	lg2.approx.ftz.f32 	%f277, %f276;
	mul.ftz.f32 	%f278, %f277, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f279, %f278;
	neg.ftz.f32 	%f532, %f279;

BB2_31:
	setp.ltu.ftz.f32	%p26, %f529, 0f00000000;
	@%p26 bra 	BB2_33;

	lg2.approx.ftz.f32 	%f280, %f529;
	mul.ftz.f32 	%f281, %f280, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f533, %f281;
	bra.uni 	BB2_34;

BB2_33:
	neg.ftz.f32 	%f282, %f529;
	lg2.approx.ftz.f32 	%f283, %f282;
	mul.ftz.f32 	%f284, %f283, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f285, %f284;
	neg.ftz.f32 	%f533, %f285;

BB2_34:
	mul.ftz.f32 	%f536, %f533, %f537;
	mul.ftz.f32 	%f535, %f532, %f537;
	mul.ftz.f32 	%f534, %f531, %f537;

BB2_35:
	mad.lo.s32 	%r77, %r41, 33, %r46;
	mul.wide.s32 	%rd29, %r77, 4;
	add.s64 	%rd30, %rd16, %rd29;
	st.f32 	[%rd30+528], %f534;
	st.f32 	[%rd30+1584], %f535;
	st.f32 	[%rd30+2640], %f536;
	st.f32 	[%rd30+3696], %f537;

BB2_36:
	shl.b32 	%r78, %r41, 5;
	add.s32 	%r79, %r78, %r46;
	setp.lt.s32	%p2, %r79, 32;
	bar.sync 	0;
	mad.lo.s32 	%r80, %r41, 16, %r46;
	mul.lo.s32 	%r81, %r80, 33;
	mul.wide.s32 	%rd31, %r81, 4;
	add.s64 	%rd72, %rd16, %rd31;
	mul.lo.s32 	%r82, %r46, 33;
	mad.lo.s32 	%r83, %r41, 528, %r82;
	mul.wide.s32 	%rd32, %r83, 4;
	add.s64 	%rd33, %rd32, %rd16;
	add.s64 	%rd73, %rd33, 16;
	@!%p2 bra 	BB2_39;
	bra.uni 	BB2_37;

BB2_37:
	mov.u32 	%r230, 0;
	mov.u32 	%r228, %r1;

BB2_38:
	mov.u32 	%r8, %r228;
	setp.eq.s32	%p27, %r8, 0;
	setp.ne.s32	%p28, %r35, 0;
	and.pred  	%p29, %p27, %p28;
	ld.f32 	%f286, [%rd72];
	mul.ftz.f32 	%f287, %f286, 0f3F000000;
	selp.f32	%f288, %f287, %f539, %p29;
	selp.f32	%f289, %f287, %f538, %p29;
	mul.ftz.f32 	%f290, %f540, %f224;
	fma.rn.ftz.f32 	%f291, %f286, %f223, %f290;
	fma.rn.ftz.f32 	%f292, %f288, %f225, %f291;
	fma.rn.ftz.f32 	%f293, %f289, %f226, %f292;
	st.f32 	[%rd72], %f293;
	ld.f32 	%f294, [%rd73+-12];
	mul.ftz.f32 	%f295, %f286, %f224;
	fma.rn.ftz.f32 	%f296, %f294, %f223, %f295;
	fma.rn.ftz.f32 	%f297, %f293, %f225, %f296;
	fma.rn.ftz.f32 	%f298, %f288, %f226, %f297;
	ld.f32 	%f299, [%rd73+-8];
	ld.f32 	%f300, [%rd73+-4];
	ld.f32 	%f301, [%rd73];
	st.f32 	[%rd73+-12], %f298;
	mul.ftz.f32 	%f302, %f294, %f224;
	fma.rn.ftz.f32 	%f303, %f299, %f223, %f302;
	fma.rn.ftz.f32 	%f304, %f298, %f225, %f303;
	fma.rn.ftz.f32 	%f305, %f293, %f226, %f304;
	st.f32 	[%rd73+-8], %f305;
	mul.ftz.f32 	%f306, %f299, %f224;
	fma.rn.ftz.f32 	%f307, %f300, %f223, %f306;
	fma.rn.ftz.f32 	%f308, %f305, %f225, %f307;
	fma.rn.ftz.f32 	%f309, %f298, %f226, %f308;
	st.f32 	[%rd73+-4], %f309;
	mul.ftz.f32 	%f310, %f300, %f224;
	fma.rn.ftz.f32 	%f311, %f301, %f223, %f310;
	fma.rn.ftz.f32 	%f312, %f309, %f225, %f311;
	fma.rn.ftz.f32 	%f313, %f305, %f226, %f312;
	st.f32 	[%rd73], %f313;
	ld.f32 	%f314, [%rd73+4];
	mul.ftz.f32 	%f315, %f301, %f224;
	fma.rn.ftz.f32 	%f316, %f314, %f223, %f315;
	fma.rn.ftz.f32 	%f317, %f313, %f225, %f316;
	fma.rn.ftz.f32 	%f318, %f309, %f226, %f317;
	ld.f32 	%f319, [%rd73+8];
	ld.f32 	%f540, [%rd73+12];
	st.f32 	[%rd73+4], %f318;
	mul.ftz.f32 	%f320, %f314, %f224;
	fma.rn.ftz.f32 	%f321, %f319, %f223, %f320;
	fma.rn.ftz.f32 	%f322, %f318, %f225, %f321;
	fma.rn.ftz.f32 	%f538, %f313, %f226, %f322;
	st.f32 	[%rd73+8], %f538;
	mul.ftz.f32 	%f323, %f319, %f224;
	fma.rn.ftz.f32 	%f324, %f540, %f223, %f323;
	fma.rn.ftz.f32 	%f325, %f538, %f225, %f324;
	fma.rn.ftz.f32 	%f539, %f318, %f226, %f325;
	st.f32 	[%rd73+12], %f539;
	add.s64 	%rd73, %rd73, 32;
	add.s32 	%r10, %r8, -8;
	add.s64 	%rd72, %rd72, 32;
	add.s32 	%r230, %r230, 32;
	setp.ne.s32	%p30, %r230, 128;
	mov.u32 	%r228, %r10;
	@%p30 bra 	BB2_38;

BB2_39:
	bar.sync 	0;
	@!%p7 bra 	BB2_44;
	bra.uni 	BB2_40;

BB2_40:
	mad.lo.s32 	%r92, %r41, 33, %r46;
	mul.wide.s32 	%rd34, %r92, 4;
	add.s64 	%rd35, %rd16, %rd34;
	ld.f32 	%f77, [%rd35];
	ld.f32 	%f78, [%rd35+1056];
	ld.f32 	%f79, [%rd35+2112];
	ld.f32 	%f80, [%rd35+3168];
	setp.ge.s32	%p31, %r3, %r32;
	@%p31 bra 	BB2_44;

	setp.eq.s32	%p32, %r34, 0;
	@%p32 bra 	BB2_43;

	mad.lo.s32 	%r97, %r42, %r31, %r3;
	mul.wide.s32 	%rd36, %r97, 16;
	add.s64 	%rd37, %rd18, %rd36;
	st.v4.f32 	[%rd37], {%f77, %f78, %f79, %f80};
	bra.uni 	BB2_44;

BB2_43:
	mad.lo.s32 	%r98, %r42, %r31, %r3;
	mul.wide.s32 	%rd38, %r98, 8;
	add.s64 	%rd39, %rd18, %rd38;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f80;
	mov.b16 	%rs17, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f79;
	mov.b16 	%rs18, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f78;
	mov.b16 	%rs19, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f77;
	mov.b16 	%rs20, %temp;
}
	st.v4.u16 	[%rd39], {%rs20, %rs19, %rs18, %rs17};

BB2_44:
	@%p18 bra 	BB2_49;

	mad.lo.s32 	%r14, %r42, %r31, %r3;
	mad.lo.s32 	%r108, %r41, 33, %r46;
	mul.wide.s32 	%rd40, %r108, 4;
	add.s64 	%rd41, %rd16, %rd40;
	ld.f32 	%f81, [%rd41+528];
	ld.f32 	%f82, [%rd41+1584];
	ld.f32 	%f83, [%rd41+2640];
	ld.f32 	%f84, [%rd41+3696];
	setp.ge.s32	%p34, %r3, %r32;
	@%p34 bra 	BB2_49;

	shl.b32 	%r109, %r31, 2;
	add.s32 	%r110, %r14, %r109;
	setp.eq.s32	%p35, %r34, 0;
	cvt.s64.s32	%rd9, %r110;
	@%p35 bra 	BB2_48;

	shl.b64 	%rd42, %rd9, 4;
	add.s64 	%rd43, %rd18, %rd42;
	st.v4.f32 	[%rd43], {%f81, %f82, %f83, %f84};
	bra.uni 	BB2_49;

BB2_48:
	shl.b64 	%rd44, %rd9, 3;
	add.s64 	%rd45, %rd18, %rd44;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f84;
	mov.b16 	%rs21, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f83;
	mov.b16 	%rs22, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f82;
	mov.b16 	%rs23, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f81;
	mov.b16 	%rs24, %temp;
}
	st.v4.u16 	[%rd45], {%rs24, %rs23, %rs22, %rs21};

BB2_49:
	bar.sync 	0;
	add.s32 	%r231, %r231, 32;
	setp.lt.s32	%p36, %r231, %r32;
	add.s32 	%r229, %r1, -32;
	@%p36 bra 	BB2_2;

BB2_50:
	setp.lt.s32	%p37, %r231, 1;
	@%p37 bra 	BB2_128;

	add.s32 	%r18, %r231, -1;
	mov.f32 	%f566, 0f00000000;
	mov.f32 	%f565, %f566;
	mov.f32 	%f564, %f566;
	mov.f32 	%f563, %f566;
	mov.u32 	%r232, 0;

BB2_52:
	mov.u32 	%r112, %ctaid.y;
	shl.b32 	%r113, %r112, 3;
	mov.u32 	%r114, %tid.y;
	add.s32 	%r115, %r113, %r114;
	sub.s32 	%r116, %r33, %r30;
	shr.s32 	%r117, %r116, 1;
	sub.s32 	%r20, %r115, %r117;
	mad.lo.s32 	%r21, %r232, -32, %r18;
	mov.u32 	%r118, %tid.x;
	add.s32 	%r119, %r21, %r118;
	add.s32 	%r22, %r119, -31;
	sub.s32 	%r120, %r32, %r29;
	shr.s32 	%r121, %r120, 1;
	sub.s32 	%r23, %r22, %r121;
	setp.ge.s32	%p38, %r20, %r30;
	@%p38 bra 	BB2_69;

	setp.gt.s32	%p39, %r23, -1;
	setp.gt.s32	%p40, %r20, -1;
	setp.lt.s32	%p41, %r20, %r30;
	and.pred  	%p42, %p40, %p41;
	and.pred  	%p43, %p42, %p39;
	setp.lt.s32	%p44, %r23, %r29;
	and.pred  	%p45, %p43, %p44;
	@%p45 bra 	BB2_55;

	mov.f32 	%f551, 0f00000000;
	mov.f32 	%f550, %f551;
	mov.f32 	%f549, %f551;
	mov.f32 	%f548, %f551;
	bra.uni 	BB2_68;

BB2_55:
	mad.lo.s32 	%r122, %r20, %r28, %r23;
	setp.eq.s32	%p46, %r34, 0;
	cvt.s64.s32	%rd10, %r122;
	@%p46 bra 	BB2_57;

	shl.b64 	%rd46, %rd10, 4;
	add.s64 	%rd47, %rd17, %rd46;
	ld.v4.f32 	{%f334, %f335, %f336, %f337}, [%rd47];
	mov.f32 	%f544, %f337;
	mov.f32 	%f543, %f336;
	mov.f32 	%f542, %f335;
	mov.f32 	%f541, %f334;
	bra.uni 	BB2_58;

BB2_57:
	shl.b64 	%rd48, %rd10, 3;
	add.s64 	%rd49, %rd17, %rd48;
	ld.v4.u16 	{%rs25, %rs26, %rs27, %rs28}, [%rd49];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs25;
	cvt.f32.f16 	%f541, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs26;
	cvt.f32.f16 	%f542, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs27;
	cvt.f32.f16 	%f543, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs28;
	cvt.f32.f16 	%f544, %temp;
	}

BB2_58:
	cvt.ftz.sat.f32.f32	%f551, %f544;
	setp.ltu.ftz.f32	%p47, %f541, 0f00000000;
	@%p47 bra 	BB2_60;

	lg2.approx.ftz.f32 	%f338, %f541;
	mul.ftz.f32 	%f339, %f338, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f545, %f339;
	bra.uni 	BB2_61;

BB2_60:
	neg.ftz.f32 	%f340, %f541;
	lg2.approx.ftz.f32 	%f341, %f340;
	mul.ftz.f32 	%f342, %f341, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f343, %f342;
	neg.ftz.f32 	%f545, %f343;

BB2_61:
	setp.ltu.ftz.f32	%p48, %f542, 0f00000000;
	@%p48 bra 	BB2_63;

	lg2.approx.ftz.f32 	%f344, %f542;
	mul.ftz.f32 	%f345, %f344, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f546, %f345;
	bra.uni 	BB2_64;

BB2_63:
	neg.ftz.f32 	%f346, %f542;
	lg2.approx.ftz.f32 	%f347, %f346;
	mul.ftz.f32 	%f348, %f347, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f349, %f348;
	neg.ftz.f32 	%f546, %f349;

BB2_64:
	setp.ltu.ftz.f32	%p49, %f543, 0f00000000;
	@%p49 bra 	BB2_66;

	lg2.approx.ftz.f32 	%f350, %f543;
	mul.ftz.f32 	%f351, %f350, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f547, %f351;
	bra.uni 	BB2_67;

BB2_66:
	neg.ftz.f32 	%f352, %f543;
	lg2.approx.ftz.f32 	%f353, %f352;
	mul.ftz.f32 	%f354, %f353, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f355, %f354;
	neg.ftz.f32 	%f547, %f355;

BB2_67:
	mul.ftz.f32 	%f550, %f547, %f551;
	mul.ftz.f32 	%f549, %f546, %f551;
	mul.ftz.f32 	%f548, %f545, %f551;

BB2_68:
	mad.lo.s32 	%r125, %r114, 33, %r118;
	mul.wide.s32 	%rd50, %r125, 4;
	add.s64 	%rd51, %rd16, %rd50;
	st.f32 	[%rd51], %f548;
	st.f32 	[%rd51+1056], %f549;
	st.f32 	[%rd51+2112], %f550;
	st.f32 	[%rd51+3168], %f551;

BB2_69:
	add.s32 	%r133, %r20, 4;
	setp.ge.s32	%p50, %r133, %r30;
	@%p50 bra 	BB2_86;

	setp.gt.s32	%p51, %r20, -1;
	setp.lt.s32	%p52, %r20, %r30;
	and.pred  	%p53, %p51, %p52;
	setp.gt.s32	%p54, %r23, -1;
	and.pred  	%p55, %p53, %p54;
	setp.lt.s32	%p56, %r23, %r29;
	and.pred  	%p57, %p55, %p56;
	@%p57 bra 	BB2_72;

	mov.f32 	%f562, 0f00000000;
	mov.f32 	%f561, %f562;
	mov.f32 	%f560, %f562;
	mov.f32 	%f559, %f562;
	bra.uni 	BB2_85;

BB2_72:
	mad.lo.s32 	%r148, %r20, %r28, %r23;
	shl.b32 	%r149, %r28, 2;
	add.s32 	%r150, %r148, %r149;
	setp.eq.s32	%p58, %r34, 0;
	cvt.s64.s32	%rd11, %r150;
	@%p58 bra 	BB2_74;

	shl.b64 	%rd52, %rd11, 4;
	add.s64 	%rd53, %rd17, %rd52;
	ld.v4.f32 	{%f360, %f361, %f362, %f363}, [%rd53];
	mov.f32 	%f555, %f363;
	mov.f32 	%f554, %f362;
	mov.f32 	%f553, %f361;
	mov.f32 	%f552, %f360;
	bra.uni 	BB2_75;

BB2_74:
	shl.b64 	%rd54, %rd11, 3;
	add.s64 	%rd55, %rd17, %rd54;
	ld.v4.u16 	{%rs33, %rs34, %rs35, %rs36}, [%rd55];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs33;
	cvt.f32.f16 	%f552, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs34;
	cvt.f32.f16 	%f553, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs35;
	cvt.f32.f16 	%f554, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs36;
	cvt.f32.f16 	%f555, %temp;
	}

BB2_75:
	cvt.ftz.sat.f32.f32	%f562, %f555;
	setp.ltu.ftz.f32	%p59, %f552, 0f00000000;
	@%p59 bra 	BB2_77;

	lg2.approx.ftz.f32 	%f364, %f552;
	mul.ftz.f32 	%f365, %f364, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f556, %f365;
	bra.uni 	BB2_78;

BB2_77:
	neg.ftz.f32 	%f366, %f552;
	lg2.approx.ftz.f32 	%f367, %f366;
	mul.ftz.f32 	%f368, %f367, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f369, %f368;
	neg.ftz.f32 	%f556, %f369;

BB2_78:
	setp.ltu.ftz.f32	%p60, %f553, 0f00000000;
	@%p60 bra 	BB2_80;

	lg2.approx.ftz.f32 	%f370, %f553;
	mul.ftz.f32 	%f371, %f370, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f557, %f371;
	bra.uni 	BB2_81;

BB2_80:
	neg.ftz.f32 	%f372, %f553;
	lg2.approx.ftz.f32 	%f373, %f372;
	mul.ftz.f32 	%f374, %f373, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f375, %f374;
	neg.ftz.f32 	%f557, %f375;

BB2_81:
	setp.ltu.ftz.f32	%p61, %f554, 0f00000000;
	@%p61 bra 	BB2_83;

	lg2.approx.ftz.f32 	%f376, %f554;
	mul.ftz.f32 	%f377, %f376, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f558, %f377;
	bra.uni 	BB2_84;

BB2_83:
	neg.ftz.f32 	%f378, %f554;
	lg2.approx.ftz.f32 	%f379, %f378;
	mul.ftz.f32 	%f380, %f379, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f381, %f380;
	neg.ftz.f32 	%f558, %f381;

BB2_84:
	mul.ftz.f32 	%f561, %f558, %f562;
	mul.ftz.f32 	%f560, %f557, %f562;
	mul.ftz.f32 	%f559, %f556, %f562;

BB2_85:
	mad.lo.s32 	%r153, %r114, 33, %r118;
	mul.wide.s32 	%rd56, %r153, 4;
	add.s64 	%rd57, %rd16, %rd56;
	st.f32 	[%rd57+528], %f559;
	st.f32 	[%rd57+1584], %f560;
	st.f32 	[%rd57+2640], %f561;
	st.f32 	[%rd57+3696], %f562;

BB2_86:
	shl.b32 	%r155, %r114, 5;
	add.s32 	%r157, %r155, %r118;
	setp.lt.s32	%p4, %r157, 32;
	bar.sync 	0;
	@!%p4 bra 	BB2_89;
	bra.uni 	BB2_87;

BB2_87:
	mov.u32 	%r233, 0;

BB2_88:
	mad.lo.s32 	%r225, %r232, -32, %r18;
	shl.b32 	%r160, %r114, 4;
	add.s32 	%r162, %r118, %r160;
	mad.lo.s32 	%r163, %r162, 33, 31;
	sub.s32 	%r164, %r163, %r233;
	mul.wide.s32 	%rd58, %r164, 4;
	add.s64 	%rd59, %rd16, %rd58;
	add.s32 	%r165, %r32, -1;
	sub.s32 	%r166, %r225, %r233;
	setp.eq.s32	%p62, %r166, %r165;
	setp.ne.s32	%p63, %r35, 0;
	and.pred  	%p64, %p62, %p63;
	ld.f32 	%f382, [%rd59];
	mul.ftz.f32 	%f383, %f382, 0f3F000000;
	selp.f32	%f384, %f383, %f564, %p64;
	selp.f32	%f385, %f383, %f563, %p64;
	mul.ftz.f32 	%f386, %f565, %f228;
	fma.rn.ftz.f32 	%f387, %f566, %f227, %f386;
	fma.rn.ftz.f32 	%f388, %f384, %f229, %f387;
	fma.rn.ftz.f32 	%f389, %f385, %f230, %f388;
	ld.f32 	%f390, [%rd59+-4];
	ld.f32 	%f391, [%rd59+-8];
	ld.f32 	%f392, [%rd59+-12];
	st.f32 	[%rd59], %f389;
	not.b32 	%r167, %r233;
	add.s32 	%r168, %r225, %r167;
	setp.eq.s32	%p65, %r168, %r165;
	and.pred  	%p66, %p65, %p63;
	mul.ftz.f32 	%f393, %f390, 0f3F000000;
	selp.f32	%f394, %f393, %f389, %p66;
	selp.f32	%f395, %f393, %f384, %p66;
	mul.ftz.f32 	%f396, %f566, %f228;
	fma.rn.ftz.f32 	%f397, %f382, %f227, %f396;
	fma.rn.ftz.f32 	%f398, %f394, %f229, %f397;
	fma.rn.ftz.f32 	%f399, %f395, %f230, %f398;
	st.f32 	[%rd59+-4], %f399;
	mov.u32 	%r169, -2;
	sub.s32 	%r170, %r169, %r233;
	add.s32 	%r171, %r225, %r170;
	setp.eq.s32	%p67, %r171, %r165;
	and.pred  	%p68, %p67, %p63;
	mul.ftz.f32 	%f400, %f391, 0f3F000000;
	selp.f32	%f401, %f400, %f399, %p68;
	selp.f32	%f402, %f400, %f394, %p68;
	mul.ftz.f32 	%f403, %f382, %f228;
	fma.rn.ftz.f32 	%f404, %f390, %f227, %f403;
	fma.rn.ftz.f32 	%f405, %f401, %f229, %f404;
	fma.rn.ftz.f32 	%f406, %f402, %f230, %f405;
	st.f32 	[%rd59+-8], %f406;
	mov.u32 	%r172, -3;
	sub.s32 	%r173, %r172, %r233;
	add.s32 	%r174, %r225, %r173;
	setp.eq.s32	%p69, %r174, %r165;
	and.pred  	%p70, %p69, %p63;
	mul.ftz.f32 	%f407, %f392, 0f3F000000;
	selp.f32	%f408, %f407, %f406, %p70;
	selp.f32	%f409, %f407, %f401, %p70;
	mul.ftz.f32 	%f410, %f390, %f228;
	fma.rn.ftz.f32 	%f411, %f391, %f227, %f410;
	fma.rn.ftz.f32 	%f412, %f408, %f229, %f411;
	fma.rn.ftz.f32 	%f413, %f409, %f230, %f412;
	st.f32 	[%rd59+-12], %f413;
	mov.u32 	%r175, -4;
	sub.s32 	%r176, %r175, %r233;
	add.s32 	%r177, %r225, %r176;
	setp.eq.s32	%p71, %r177, %r165;
	and.pred  	%p72, %p71, %p63;
	ld.f32 	%f414, [%rd59+-16];
	mul.ftz.f32 	%f415, %f414, 0f3F000000;
	selp.f32	%f416, %f415, %f413, %p72;
	selp.f32	%f417, %f415, %f408, %p72;
	mul.ftz.f32 	%f418, %f391, %f228;
	fma.rn.ftz.f32 	%f419, %f392, %f227, %f418;
	fma.rn.ftz.f32 	%f420, %f416, %f229, %f419;
	fma.rn.ftz.f32 	%f421, %f417, %f230, %f420;
	ld.f32 	%f422, [%rd59+-20];
	ld.f32 	%f565, [%rd59+-24];
	ld.f32 	%f566, [%rd59+-28];
	st.f32 	[%rd59+-16], %f421;
	mov.u32 	%r178, -5;
	sub.s32 	%r179, %r178, %r233;
	add.s32 	%r180, %r225, %r179;
	setp.eq.s32	%p73, %r180, %r165;
	and.pred  	%p74, %p73, %p63;
	mul.ftz.f32 	%f423, %f422, 0f3F000000;
	selp.f32	%f424, %f423, %f421, %p74;
	selp.f32	%f425, %f423, %f416, %p74;
	mul.ftz.f32 	%f426, %f392, %f228;
	fma.rn.ftz.f32 	%f427, %f414, %f227, %f426;
	fma.rn.ftz.f32 	%f428, %f424, %f229, %f427;
	fma.rn.ftz.f32 	%f429, %f425, %f230, %f428;
	st.f32 	[%rd59+-20], %f429;
	mov.u32 	%r181, -6;
	sub.s32 	%r182, %r181, %r233;
	add.s32 	%r183, %r225, %r182;
	setp.eq.s32	%p75, %r183, %r165;
	and.pred  	%p76, %p75, %p63;
	mul.ftz.f32 	%f430, %f565, 0f3F000000;
	selp.f32	%f431, %f430, %f429, %p76;
	selp.f32	%f432, %f430, %f424, %p76;
	mul.ftz.f32 	%f433, %f414, %f228;
	fma.rn.ftz.f32 	%f434, %f422, %f227, %f433;
	fma.rn.ftz.f32 	%f435, %f431, %f229, %f434;
	fma.rn.ftz.f32 	%f436, %f432, %f230, %f435;
	st.f32 	[%rd59+-24], %f436;
	mov.u32 	%r184, -7;
	sub.s32 	%r185, %r184, %r233;
	add.s32 	%r186, %r225, %r185;
	setp.eq.s32	%p77, %r186, %r165;
	and.pred  	%p78, %p77, %p63;
	mul.ftz.f32 	%f437, %f566, 0f3F000000;
	selp.f32	%f563, %f437, %f436, %p78;
	selp.f32	%f438, %f437, %f431, %p78;
	mul.ftz.f32 	%f439, %f422, %f228;
	fma.rn.ftz.f32 	%f440, %f565, %f227, %f439;
	fma.rn.ftz.f32 	%f441, %f563, %f229, %f440;
	fma.rn.ftz.f32 	%f564, %f438, %f230, %f441;
	st.f32 	[%rd59+-28], %f564;
	add.s32 	%r233, %r233, 8;
	setp.ne.s32	%p79, %r233, 32;
	@%p79 bra 	BB2_88;

BB2_89:
	setp.lt.s32	%p5, %r115, %r33;
	bar.sync 	0;
	setp.lt.s32	%p80, %r22, %r32;
	and.pred  	%p81, %p5, %p80;
	@!%p81 bra 	BB2_108;
	bra.uni 	BB2_90;

BB2_90:
	setp.eq.s32	%p82, %r34, 0;
	@%p82 bra 	BB2_92;

	mad.lo.s32 	%r195, %r115, %r31, %r22;
	mul.wide.s32 	%rd60, %r195, 16;
	add.s64 	%rd61, %rd18, %rd60;
	ld.v4.f32 	{%f442, %f443, %f444, %f445}, [%rd61];
	mov.f32 	%f570, %f445;
	mov.f32 	%f569, %f444;
	mov.f32 	%f568, %f443;
	mov.f32 	%f567, %f442;
	bra.uni 	BB2_93;

BB2_92:
	mad.lo.s32 	%r200, %r115, %r31, %r22;
	mul.wide.s32 	%rd62, %r200, 8;
	add.s64 	%rd63, %rd18, %rd62;
	ld.v4.u16 	{%rs41, %rs42, %rs43, %rs44}, [%rd63];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs41;
	cvt.f32.f16 	%f567, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs42;
	cvt.f32.f16 	%f568, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs43;
	cvt.f32.f16 	%f569, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs44;
	cvt.f32.f16 	%f570, %temp;
	}

BB2_93:
	mad.lo.s32 	%r203, %r114, 33, %r118;
	mul.wide.s32 	%rd64, %r203, 4;
	add.s64 	%rd12, %rd16, %rd64;
	ld.f32 	%f446, [%rd12+3168];
	add.ftz.f32 	%f447, %f570, %f446;
	cvt.ftz.sat.f32.f32	%f571, %f447;
	add.ftz.f32 	%f448, %f571, 0fB70637BD;
	setp.gtu.ftz.f32	%p83, %f448, 0f00000000;
	@%p83 bra 	BB2_95;

	mov.f32 	%f574, 0f00000000;
	mov.f32 	%f573, %f574;
	mov.f32 	%f572, %f574;
	mov.f32 	%f571, %f574;
	bra.uni 	BB2_96;

BB2_95:
	ld.f32 	%f453, [%rd12];
	add.ftz.f32 	%f454, %f567, %f453;
	ld.f32 	%f455, [%rd12+1056];
	add.ftz.f32 	%f456, %f568, %f455;
	ld.f32 	%f457, [%rd12+2112];
	add.ftz.f32 	%f458, %f569, %f457;
	mov.f32 	%f459, 0f3F800000;
	div.approx.ftz.f32 	%f460, %f459, %f571;
	mul.ftz.f32 	%f572, %f458, %f460;
	mul.ftz.f32 	%f573, %f456, %f460;
	mul.ftz.f32 	%f574, %f454, %f460;

BB2_96:
	setp.ltu.ftz.f32	%p84, %f574, 0f00000000;
	@%p84 bra 	BB2_98;

	lg2.approx.ftz.f32 	%f461, %f574;
	mul.ftz.f32 	%f462, %f461, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f575, %f462;
	bra.uni 	BB2_99;

BB2_98:
	neg.ftz.f32 	%f463, %f574;
	lg2.approx.ftz.f32 	%f464, %f463;
	mul.ftz.f32 	%f465, %f464, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f466, %f465;
	neg.ftz.f32 	%f575, %f466;

BB2_99:
	setp.ltu.ftz.f32	%p85, %f573, 0f00000000;
	@%p85 bra 	BB2_101;

	lg2.approx.ftz.f32 	%f467, %f573;
	mul.ftz.f32 	%f468, %f467, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f576, %f468;
	bra.uni 	BB2_102;

BB2_101:
	neg.ftz.f32 	%f469, %f573;
	lg2.approx.ftz.f32 	%f470, %f469;
	mul.ftz.f32 	%f471, %f470, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f472, %f471;
	neg.ftz.f32 	%f576, %f472;

BB2_102:
	setp.ltu.ftz.f32	%p86, %f572, 0f00000000;
	@%p86 bra 	BB2_104;

	lg2.approx.ftz.f32 	%f473, %f572;
	mul.ftz.f32 	%f474, %f473, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f577, %f474;
	bra.uni 	BB2_105;

BB2_104:
	neg.ftz.f32 	%f475, %f572;
	lg2.approx.ftz.f32 	%f476, %f475;
	mul.ftz.f32 	%f477, %f476, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f478, %f477;
	neg.ftz.f32 	%f577, %f478;

BB2_105:
	@%p82 bra 	BB2_107;

	mad.lo.s32 	%r208, %r115, %r31, %r22;
	mul.wide.s32 	%rd65, %r208, 16;
	add.s64 	%rd66, %rd18, %rd65;
	st.v4.f32 	[%rd66], {%f575, %f576, %f577, %f571};
	bra.uni 	BB2_108;

BB2_107:
	mad.lo.s32 	%r213, %r115, %r31, %r22;
	mul.wide.s32 	%rd67, %r213, 8;
	add.s64 	%rd68, %rd18, %rd67;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f571;
	mov.b16 	%rs49, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f577;
	mov.b16 	%rs50, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f576;
	mov.b16 	%rs51, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f575;
	mov.b16 	%rs52, %temp;
}
	st.v4.u16 	[%rd68], {%rs52, %rs51, %rs50, %rs49};

BB2_108:
	add.s32 	%r218, %r115, 4;
	setp.lt.s32	%p89, %r218, %r33;
	mad.lo.s32 	%r26, %r115, %r31, %r22;
	and.pred  	%p90, %p89, %p80;
	@!%p90 bra 	BB2_127;
	bra.uni 	BB2_109;

BB2_109:
	shl.b32 	%r219, %r31, 2;
	add.s32 	%r220, %r26, %r219;
	setp.eq.s32	%p91, %r34, 0;
	mul.wide.s32 	%rd69, %r220, 16;
	add.s64 	%rd13, %rd18, %rd69;
	mul.wide.s32 	%rd70, %r220, 8;
	add.s64 	%rd14, %rd18, %rd70;
	@%p91 bra 	BB2_111;

	ld.v4.f32 	{%f479, %f480, %f481, %f482}, [%rd13];
	mov.f32 	%f581, %f482;
	mov.f32 	%f580, %f481;
	mov.f32 	%f579, %f480;
	mov.f32 	%f578, %f479;
	bra.uni 	BB2_112;

BB2_111:
	ld.v4.u16 	{%rs53, %rs54, %rs55, %rs56}, [%rd14];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs53;
	cvt.f32.f16 	%f578, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs54;
	cvt.f32.f16 	%f579, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs55;
	cvt.f32.f16 	%f580, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs56;
	cvt.f32.f16 	%f581, %temp;
	}

BB2_112:
	mad.lo.s32 	%r223, %r114, 33, %r118;
	mul.wide.s32 	%rd71, %r223, 4;
	add.s64 	%rd15, %rd16, %rd71;
	ld.f32 	%f483, [%rd15+3696];
	add.ftz.f32 	%f484, %f581, %f483;
	cvt.ftz.sat.f32.f32	%f582, %f484;
	add.ftz.f32 	%f485, %f582, 0fB70637BD;
	setp.gtu.ftz.f32	%p92, %f485, 0f00000000;
	@%p92 bra 	BB2_114;

	mov.f32 	%f585, 0f00000000;
	mov.f32 	%f584, %f585;
	mov.f32 	%f583, %f585;
	mov.f32 	%f582, %f585;
	bra.uni 	BB2_115;

BB2_114:
	ld.f32 	%f490, [%rd15+528];
	add.ftz.f32 	%f491, %f578, %f490;
	ld.f32 	%f492, [%rd15+1584];
	add.ftz.f32 	%f493, %f579, %f492;
	ld.f32 	%f494, [%rd15+2640];
	add.ftz.f32 	%f495, %f580, %f494;
	mov.f32 	%f496, 0f3F800000;
	div.approx.ftz.f32 	%f497, %f496, %f582;
	mul.ftz.f32 	%f583, %f495, %f497;
	mul.ftz.f32 	%f584, %f493, %f497;
	mul.ftz.f32 	%f585, %f491, %f497;

BB2_115:
	setp.ltu.ftz.f32	%p93, %f585, 0f00000000;
	@%p93 bra 	BB2_117;

	lg2.approx.ftz.f32 	%f498, %f585;
	mul.ftz.f32 	%f499, %f498, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f586, %f499;
	bra.uni 	BB2_118;

BB2_117:
	neg.ftz.f32 	%f500, %f585;
	lg2.approx.ftz.f32 	%f501, %f500;
	mul.ftz.f32 	%f502, %f501, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f503, %f502;
	neg.ftz.f32 	%f586, %f503;

BB2_118:
	setp.ltu.ftz.f32	%p94, %f584, 0f00000000;
	@%p94 bra 	BB2_120;

	lg2.approx.ftz.f32 	%f504, %f584;
	mul.ftz.f32 	%f505, %f504, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f587, %f505;
	bra.uni 	BB2_121;

BB2_120:
	neg.ftz.f32 	%f506, %f584;
	lg2.approx.ftz.f32 	%f507, %f506;
	mul.ftz.f32 	%f508, %f507, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f509, %f508;
	neg.ftz.f32 	%f587, %f509;

BB2_121:
	setp.ltu.ftz.f32	%p95, %f583, 0f00000000;
	@%p95 bra 	BB2_123;

	lg2.approx.ftz.f32 	%f510, %f583;
	mul.ftz.f32 	%f511, %f510, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f588, %f511;
	bra.uni 	BB2_124;

BB2_123:
	neg.ftz.f32 	%f512, %f583;
	lg2.approx.ftz.f32 	%f513, %f512;
	mul.ftz.f32 	%f514, %f513, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f515, %f514;
	neg.ftz.f32 	%f588, %f515;

BB2_124:
	@%p91 bra 	BB2_126;

	st.v4.f32 	[%rd13], {%f586, %f587, %f588, %f582};
	bra.uni 	BB2_127;

BB2_126:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f582;
	mov.b16 	%rs61, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f588;
	mov.b16 	%rs62, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f587;
	mov.b16 	%rs63, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f586;
	mov.b16 	%rs64, %temp;
}
	st.v4.u16 	[%rd14], {%rs64, %rs63, %rs62, %rs61};

BB2_127:
	bar.sync 	0;
	mad.lo.s32 	%r226, %r232, -32, %r18;
	add.s32 	%r224, %r226, -31;
	setp.gt.s32	%p97, %r224, 0;
	add.s32 	%r232, %r232, 1;
	@%p97 bra 	BB2_52;

BB2_128:
	ret;
}

.visible .entry VerticalRecursiveGaussianRGBAF16_kernel(
	.param .u64 VerticalRecursiveGaussianRGBAF16_kernel_param_0,
	.param .u32 VerticalRecursiveGaussianRGBAF16_kernel_param_1,
	.param .u32 VerticalRecursiveGaussianRGBAF16_kernel_param_2,
	.param .u32 VerticalRecursiveGaussianRGBAF16_kernel_param_3,
	.param .u64 VerticalRecursiveGaussianRGBAF16_kernel_param_4,
	.param .u32 VerticalRecursiveGaussianRGBAF16_kernel_param_5,
	.param .u32 VerticalRecursiveGaussianRGBAF16_kernel_param_6,
	.param .u32 VerticalRecursiveGaussianRGBAF16_kernel_param_7,
	.param .u32 VerticalRecursiveGaussianRGBAF16_kernel_param_8,
	.param .f32 VerticalRecursiveGaussianRGBAF16_kernel_param_9,
	.param .f32 VerticalRecursiveGaussianRGBAF16_kernel_param_10,
	.param .f32 VerticalRecursiveGaussianRGBAF16_kernel_param_11,
	.param .f32 VerticalRecursiveGaussianRGBAF16_kernel_param_12,
	.param .f32 VerticalRecursiveGaussianRGBAF16_kernel_param_13,
	.param .f32 VerticalRecursiveGaussianRGBAF16_kernel_param_14,
	.param .f32 VerticalRecursiveGaussianRGBAF16_kernel_param_15,
	.param .f32 VerticalRecursiveGaussianRGBAF16_kernel_param_16
)
{
	.reg .pred 	%p<44>;
	.reg .s16 	%rs<33>;
	.reg .s32 	%r<113>;
	.reg .f32 	%f<250>;
	.reg .s64 	%rd<36>;
	// demoted variable
	.shared .align 4 .b8 VerticalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_8773_non_const_smem[2048];

	ld.param.u64 	%rd2, [VerticalRecursiveGaussianRGBAF16_kernel_param_0];
	ld.param.u32 	%r35, [VerticalRecursiveGaussianRGBAF16_kernel_param_1];
	ld.param.u32 	%r36, [VerticalRecursiveGaussianRGBAF16_kernel_param_2];
	ld.param.u32 	%r37, [VerticalRecursiveGaussianRGBAF16_kernel_param_3];
	ld.param.u64 	%rd3, [VerticalRecursiveGaussianRGBAF16_kernel_param_4];
	ld.param.u32 	%r38, [VerticalRecursiveGaussianRGBAF16_kernel_param_5];
	ld.param.u32 	%r39, [VerticalRecursiveGaussianRGBAF16_kernel_param_6];
	ld.param.u32 	%r40, [VerticalRecursiveGaussianRGBAF16_kernel_param_7];
	ld.param.u32 	%r41, [VerticalRecursiveGaussianRGBAF16_kernel_param_8];
	ld.param.f32 	%f72, [VerticalRecursiveGaussianRGBAF16_kernel_param_9];
	ld.param.f32 	%f73, [VerticalRecursiveGaussianRGBAF16_kernel_param_10];
	ld.param.f32 	%f74, [VerticalRecursiveGaussianRGBAF16_kernel_param_11];
	ld.param.f32 	%f75, [VerticalRecursiveGaussianRGBAF16_kernel_param_12];
	ld.param.f32 	%f76, [VerticalRecursiveGaussianRGBAF16_kernel_param_13];
	ld.param.f32 	%f77, [VerticalRecursiveGaussianRGBAF16_kernel_param_14];
	ld.param.f32 	%f78, [VerticalRecursiveGaussianRGBAF16_kernel_param_15];
	ld.param.f32 	%f79, [VerticalRecursiveGaussianRGBAF16_kernel_param_16];
	mov.u32 	%r42, %ctaid.x;
	mov.u32 	%r43, %ntid.x;
	mov.u32 	%r44, %tid.x;
	mad.lo.s32 	%r1, %r42, %r43, %r44;
	sub.s32 	%r45, %r40, %r37;
	shr.s32 	%r46, %r45, 1;
	mov.u32 	%r112, %tid.y;
	sub.s32 	%r110, %r112, %r46;
	setp.ge.s32	%p1, %r1, %r39;
	@%p1 bra 	BB3_48;

	sub.s32 	%r47, %r39, %r36;
	shr.s32 	%r48, %r47, 1;
	sub.s32 	%r49, %r1, %r48;
	mad.lo.s32 	%r109, %r110, %r35, %r49;
	setp.gt.s32	%p2, %r40, 0;
	@%p2 bra 	BB3_3;

	mov.u32 	%r111, 0;
	bra.uni 	BB3_19;

BB3_3:
	mad.lo.s32 	%r107, %r112, %r38, %r1;
	mov.u32 	%r111, 0;
	mov.f32 	%f224, 0f00000000;
	mov.f32 	%f223, %f224;
	mov.f32 	%f222, %f224;

BB3_4:
	setp.lt.s32	%p3, %r49, %r36;
	setp.gt.s32	%p4, %r49, -1;
	setp.lt.s32	%p5, %r110, %r37;
	setp.gt.s32	%p6, %r110, -1;
	and.pred  	%p7, %p6, %p5;
	and.pred  	%p8, %p7, %p4;
	and.pred  	%p9, %p8, %p3;
	@%p9 bra 	BB3_6;

	mov.f32 	%f231, 0f00000000;
	mov.f32 	%f230, %f231;
	mov.f32 	%f229, %f231;
	mov.f32 	%f228, %f231;
	bra.uni 	BB3_16;

BB3_6:
	cvta.to.global.u64 	%rd4, %rd2;
	mul.wide.s32 	%rd5, %r109, 8;
	add.s64 	%rd6, %rd4, %rd5;
	ld.global.v4.u16 	{%rs5, %rs6, %rs7, %rs8}, [%rd6];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs5;
	cvt.f32.f16 	%f4, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs6;
	cvt.f32.f16 	%f5, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs7;
	cvt.f32.f16 	%f6, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs8;
	cvt.f32.f16 	%f87, %temp;
	}
	cvt.ftz.sat.f32.f32	%f231, %f87;
	setp.ltu.ftz.f32	%p10, %f4, 0f00000000;
	@%p10 bra 	BB3_8;

	lg2.approx.ftz.f32 	%f88, %f4;
	mul.ftz.f32 	%f89, %f88, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f225, %f89;
	bra.uni 	BB3_9;

BB3_8:
	neg.ftz.f32 	%f90, %f4;
	lg2.approx.ftz.f32 	%f91, %f90;
	mul.ftz.f32 	%f92, %f91, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f93, %f92;
	neg.ftz.f32 	%f225, %f93;

BB3_9:
	setp.ltu.ftz.f32	%p11, %f5, 0f00000000;
	@%p11 bra 	BB3_11;

	lg2.approx.ftz.f32 	%f94, %f5;
	mul.ftz.f32 	%f95, %f94, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f226, %f95;
	bra.uni 	BB3_12;

BB3_11:
	neg.ftz.f32 	%f96, %f5;
	lg2.approx.ftz.f32 	%f97, %f96;
	mul.ftz.f32 	%f98, %f97, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f99, %f98;
	neg.ftz.f32 	%f226, %f99;

BB3_12:
	setp.ltu.ftz.f32	%p12, %f6, 0f00000000;
	@%p12 bra 	BB3_14;

	lg2.approx.ftz.f32 	%f100, %f6;
	mul.ftz.f32 	%f101, %f100, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f227, %f101;
	bra.uni 	BB3_15;

BB3_14:
	neg.ftz.f32 	%f102, %f6;
	lg2.approx.ftz.f32 	%f103, %f102;
	mul.ftz.f32 	%f104, %f103, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f105, %f104;
	neg.ftz.f32 	%f227, %f105;

BB3_15:
	mul.ftz.f32 	%f230, %f227, %f231;
	mul.ftz.f32 	%f229, %f226, %f231;
	mul.ftz.f32 	%f228, %f225, %f231;

BB3_16:
	mov.u32 	%r11, %tid.y;
	shl.b32 	%r59, %r11, 5;
	add.s32 	%r60, %r59, %r44;
	mul.wide.s32 	%rd7, %r60, 4;
	mov.u64 	%rd8, VerticalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_8773_non_const_smem;
	add.s64 	%rd9, %rd8, %rd7;
	st.shared.f32 	[%rd9], %f228;
	st.shared.f32 	[%rd9+512], %f229;
	st.shared.f32 	[%rd9+1024], %f230;
	st.shared.f32 	[%rd9+1536], %f231;
	bar.sync 	0;
	shl.b32 	%r61, %r11, 7;
	add.s32 	%r62, %r44, %r61;
	mul.wide.s32 	%rd10, %r62, 4;
	add.s64 	%rd12, %rd8, %rd10;
	setp.eq.s32	%p13, %r111, 0;
	setp.ne.s32	%p14, %r41, 0;
	and.pred  	%p15, %p13, %p14;
	ld.shared.f32 	%f106, [%rd12];
	mul.ftz.f32 	%f107, %f106, 0f3F000000;
	selp.f32	%f108, %f107, %f223, %p15;
	selp.f32	%f109, %f107, %f222, %p15;
	mul.ftz.f32 	%f110, %f224, %f73;
	fma.rn.ftz.f32 	%f111, %f106, %f72, %f110;
	fma.rn.ftz.f32 	%f112, %f108, %f74, %f111;
	fma.rn.ftz.f32 	%f113, %f109, %f75, %f112;
	st.shared.f32 	[%rd12], %f113;
	ld.shared.f32 	%f114, [%rd12+128];
	mul.ftz.f32 	%f115, %f106, %f73;
	fma.rn.ftz.f32 	%f116, %f114, %f72, %f115;
	fma.rn.ftz.f32 	%f117, %f113, %f74, %f116;
	fma.rn.ftz.f32 	%f118, %f108, %f75, %f117;
	st.shared.f32 	[%rd12+128], %f118;
	ld.shared.f32 	%f119, [%rd12+256];
	mul.ftz.f32 	%f120, %f114, %f73;
	fma.rn.ftz.f32 	%f121, %f119, %f72, %f120;
	fma.rn.ftz.f32 	%f122, %f118, %f74, %f121;
	fma.rn.ftz.f32 	%f222, %f113, %f75, %f122;
	st.shared.f32 	[%rd12+256], %f222;
	ld.shared.f32 	%f224, [%rd12+384];
	mul.ftz.f32 	%f123, %f119, %f73;
	fma.rn.ftz.f32 	%f124, %f224, %f72, %f123;
	fma.rn.ftz.f32 	%f125, %f222, %f74, %f124;
	fma.rn.ftz.f32 	%f223, %f118, %f75, %f125;
	st.shared.f32 	[%rd12+384], %f223;
	bar.sync 	0;
	setp.ge.s32	%p16, %r112, %r40;
	@%p16 bra 	BB3_18;

	cvta.to.global.u64 	%rd13, %rd3;
	mul.wide.s32 	%rd14, %r60, 4;
	add.s64 	%rd16, %rd8, %rd14;
	mul.wide.s32 	%rd17, %r107, 8;
	add.s64 	%rd18, %rd13, %rd17;
	ld.shared.f32 	%f126, [%rd16];
	ld.shared.f32 	%f127, [%rd16+512];
	ld.shared.f32 	%f128, [%rd16+1024];
	ld.shared.f32 	%f129, [%rd16+1536];
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f129;
	mov.b16 	%rs13, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f128;
	mov.b16 	%rs14, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f127;
	mov.b16 	%rs15, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f126;
	mov.b16 	%rs16, %temp;
}
	st.global.v4.u16 	[%rd18], {%rs16, %rs15, %rs14, %rs13};

BB3_18:
	bar.sync 	0;
	add.s32 	%r110, %r110, 4;
	add.s32 	%r112, %r112, 4;
	shl.b32 	%r67, %r35, 2;
	add.s32 	%r109, %r109, %r67;
	shl.b32 	%r68, %r38, 2;
	add.s32 	%r107, %r107, %r68;
	add.s32 	%r111, %r111, 4;
	setp.lt.s32	%p17, %r111, %r40;
	@%p17 bra 	BB3_4;

BB3_19:
	setp.lt.s32	%p18, %r111, 1;
	@%p18 bra 	BB3_48;

	add.s32 	%r22, %r111, -1;
	mov.f32 	%f235, 0f00000000;
	mov.f32 	%f234, %f235;
	mov.f32 	%f233, %f235;
	mov.f32 	%f232, %f235;
	mov.u32 	%r108, 0;

BB3_21:
	setp.lt.s32	%p19, %r49, %r36;
	setp.gt.s32	%p20, %r49, -1;
	add.s32 	%r111, %r111, -4;
	add.s32 	%r112, %r112, -4;
	add.s32 	%r110, %r110, -4;
	setp.gt.s32	%p21, %r110, -1;
	setp.lt.s32	%p22, %r110, %r37;
	and.pred  	%p23, %p21, %p22;
	and.pred  	%p24, %p23, %p20;
	and.pred  	%p25, %p24, %p19;
	@%p25 bra 	BB3_23;

	mov.f32 	%f242, 0f00000000;
	mov.f32 	%f241, %f242;
	mov.f32 	%f240, %f242;
	mov.f32 	%f239, %f242;
	bra.uni 	BB3_33;

BB3_23:
	shl.b32 	%r77, %r35, 2;
	sub.s32 	%r78, %r109, %r77;
	cvta.to.global.u64 	%rd19, %rd2;
	mul.wide.s32 	%rd20, %r78, 8;
	add.s64 	%rd21, %rd19, %rd20;
	ld.global.v4.u16 	{%rs17, %rs18, %rs19, %rs20}, [%rd21];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs17;
	cvt.f32.f16 	%f31, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs18;
	cvt.f32.f16 	%f32, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs19;
	cvt.f32.f16 	%f33, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs20;
	cvt.f32.f16 	%f138, %temp;
	}
	cvt.ftz.sat.f32.f32	%f242, %f138;
	setp.ltu.ftz.f32	%p26, %f31, 0f00000000;
	@%p26 bra 	BB3_25;

	lg2.approx.ftz.f32 	%f139, %f31;
	mul.ftz.f32 	%f140, %f139, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f236, %f140;
	bra.uni 	BB3_26;

BB3_25:
	neg.ftz.f32 	%f141, %f31;
	lg2.approx.ftz.f32 	%f142, %f141;
	mul.ftz.f32 	%f143, %f142, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f144, %f143;
	neg.ftz.f32 	%f236, %f144;

BB3_26:
	setp.ltu.ftz.f32	%p27, %f32, 0f00000000;
	@%p27 bra 	BB3_28;

	lg2.approx.ftz.f32 	%f145, %f32;
	mul.ftz.f32 	%f146, %f145, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f237, %f146;
	bra.uni 	BB3_29;

BB3_28:
	neg.ftz.f32 	%f147, %f32;
	lg2.approx.ftz.f32 	%f148, %f147;
	mul.ftz.f32 	%f149, %f148, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f150, %f149;
	neg.ftz.f32 	%f237, %f150;

BB3_29:
	setp.ltu.ftz.f32	%p28, %f33, 0f00000000;
	@%p28 bra 	BB3_31;

	lg2.approx.ftz.f32 	%f151, %f33;
	mul.ftz.f32 	%f152, %f151, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f238, %f152;
	bra.uni 	BB3_32;

BB3_31:
	neg.ftz.f32 	%f153, %f33;
	lg2.approx.ftz.f32 	%f154, %f153;
	mul.ftz.f32 	%f155, %f154, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f156, %f155;
	neg.ftz.f32 	%f238, %f156;

BB3_32:
	mul.ftz.f32 	%f241, %f238, %f242;
	mul.ftz.f32 	%f240, %f237, %f242;
	mul.ftz.f32 	%f239, %f236, %f242;

BB3_33:
	mov.u32 	%r31, %tid.y;
	shl.b32 	%r79, %r31, 5;
	add.s32 	%r80, %r79, %r44;
	mul.wide.s32 	%rd22, %r80, 4;
	mov.u64 	%rd23, VerticalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_8773_non_const_smem;
	add.s64 	%rd24, %rd23, %rd22;
	st.shared.f32 	[%rd24], %f239;
	st.shared.f32 	[%rd24+512], %f240;
	st.shared.f32 	[%rd24+1024], %f241;
	st.shared.f32 	[%rd24+1536], %f242;
	bar.sync 	0;
	shl.b32 	%r81, %r31, 7;
	add.s32 	%r82, %r44, %r81;
	mul.wide.s32 	%rd25, %r82, 4;
	add.s64 	%rd27, %rd23, %rd25;
	mad.lo.s32 	%r83, %r108, -4, %r22;
	add.s32 	%r84, %r40, -1;
	setp.eq.s32	%p29, %r83, %r84;
	setp.ne.s32	%p30, %r41, 0;
	and.pred  	%p31, %p29, %p30;
	ld.shared.f32 	%f157, [%rd27+384];
	mul.ftz.f32 	%f158, %f157, 0f3F000000;
	selp.f32	%f159, %f158, %f233, %p31;
	selp.f32	%f160, %f158, %f232, %p31;
	mul.ftz.f32 	%f161, %f234, %f77;
	fma.rn.ftz.f32 	%f162, %f235, %f76, %f161;
	fma.rn.ftz.f32 	%f163, %f159, %f78, %f162;
	fma.rn.ftz.f32 	%f164, %f160, %f79, %f163;
	st.shared.f32 	[%rd27+384], %f164;
	setp.eq.s32	%p32, %r83, %r40;
	and.pred  	%p33, %p32, %p30;
	ld.shared.f32 	%f165, [%rd27+256];
	mul.ftz.f32 	%f166, %f165, 0f3F000000;
	selp.f32	%f167, %f166, %f164, %p33;
	selp.f32	%f168, %f166, %f159, %p33;
	mul.ftz.f32 	%f169, %f235, %f77;
	fma.rn.ftz.f32 	%f170, %f157, %f76, %f169;
	fma.rn.ftz.f32 	%f171, %f167, %f78, %f170;
	fma.rn.ftz.f32 	%f172, %f168, %f79, %f171;
	st.shared.f32 	[%rd27+256], %f172;
	add.s32 	%r85, %r83, -2;
	setp.eq.s32	%p34, %r85, %r84;
	and.pred  	%p35, %p34, %p30;
	ld.shared.f32 	%f234, [%rd27+128];
	mul.ftz.f32 	%f173, %f234, 0f3F000000;
	selp.f32	%f174, %f173, %f172, %p35;
	selp.f32	%f175, %f173, %f167, %p35;
	mul.ftz.f32 	%f176, %f157, %f77;
	fma.rn.ftz.f32 	%f177, %f165, %f76, %f176;
	fma.rn.ftz.f32 	%f178, %f174, %f78, %f177;
	fma.rn.ftz.f32 	%f179, %f175, %f79, %f178;
	st.shared.f32 	[%rd27+128], %f179;
	add.s32 	%r86, %r83, -3;
	setp.eq.s32	%p36, %r86, %r84;
	and.pred  	%p37, %p36, %p30;
	ld.shared.f32 	%f235, [%rd27];
	mul.ftz.f32 	%f180, %f235, 0f3F000000;
	selp.f32	%f232, %f180, %f179, %p37;
	selp.f32	%f181, %f180, %f174, %p37;
	mul.ftz.f32 	%f182, %f165, %f77;
	fma.rn.ftz.f32 	%f183, %f234, %f76, %f182;
	fma.rn.ftz.f32 	%f184, %f232, %f78, %f183;
	fma.rn.ftz.f32 	%f233, %f181, %f79, %f184;
	st.shared.f32 	[%rd27], %f233;
	bar.sync 	0;
	setp.ge.s32	%p38, %r112, %r40;
	@%p38 bra 	BB3_47;

	cvta.to.global.u64 	%rd28, %rd3;
	mad.lo.s32 	%r90, %r112, %r38, %r1;
	mul.wide.s32 	%rd29, %r90, 8;
	add.s64 	%rd30, %rd28, %rd29;
	ld.global.v4.u16 	{%rs25, %rs26, %rs27, %rs28}, [%rd30];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs28;
	cvt.f32.f16 	%f185, %temp;
	}
	mul.wide.s32 	%rd31, %r80, 4;
	add.s64 	%rd1, %rd23, %rd31;
	ld.shared.f32 	%f186, [%rd1+1536];
	add.ftz.f32 	%f187, %f185, %f186;
	cvt.ftz.sat.f32.f32	%f243, %f187;
	add.ftz.f32 	%f188, %f243, 0fB70637BD;
	setp.gtu.ftz.f32	%p39, %f188, 0f00000000;
	@%p39 bra 	BB3_36;

	mov.f32 	%f246, 0f00000000;
	mov.f32 	%f245, %f246;
	mov.f32 	%f244, %f246;
	mov.f32 	%f243, %f246;
	bra.uni 	BB3_37;

BB3_36:
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs25;
	cvt.f32.f16 	%f193, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs26;
	cvt.f32.f16 	%f194, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs27;
	cvt.f32.f16 	%f195, %temp;
	}
	ld.shared.f32 	%f196, [%rd1];
	add.ftz.f32 	%f197, %f193, %f196;
	ld.shared.f32 	%f198, [%rd1+512];
	add.ftz.f32 	%f199, %f194, %f198;
	ld.shared.f32 	%f200, [%rd1+1024];
	add.ftz.f32 	%f201, %f195, %f200;
	mov.f32 	%f202, 0f3F800000;
	div.approx.ftz.f32 	%f203, %f202, %f243;
	mul.ftz.f32 	%f244, %f201, %f203;
	mul.ftz.f32 	%f245, %f199, %f203;
	mul.ftz.f32 	%f246, %f197, %f203;

BB3_37:
	setp.ltu.ftz.f32	%p40, %f246, 0f00000000;
	@%p40 bra 	BB3_39;

	lg2.approx.ftz.f32 	%f204, %f246;
	mul.ftz.f32 	%f205, %f204, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f247, %f205;
	bra.uni 	BB3_40;

BB3_39:
	neg.ftz.f32 	%f206, %f246;
	lg2.approx.ftz.f32 	%f207, %f206;
	mul.ftz.f32 	%f208, %f207, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f209, %f208;
	neg.ftz.f32 	%f247, %f209;

BB3_40:
	setp.ltu.ftz.f32	%p41, %f245, 0f00000000;
	@%p41 bra 	BB3_42;

	lg2.approx.ftz.f32 	%f210, %f245;
	mul.ftz.f32 	%f211, %f210, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f248, %f211;
	bra.uni 	BB3_43;

BB3_42:
	neg.ftz.f32 	%f212, %f245;
	lg2.approx.ftz.f32 	%f213, %f212;
	mul.ftz.f32 	%f214, %f213, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f215, %f214;
	neg.ftz.f32 	%f248, %f215;

BB3_43:
	setp.ltu.ftz.f32	%p42, %f244, 0f00000000;
	@%p42 bra 	BB3_45;

	lg2.approx.ftz.f32 	%f216, %f244;
	mul.ftz.f32 	%f217, %f216, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f249, %f217;
	bra.uni 	BB3_46;

BB3_45:
	neg.ftz.f32 	%f218, %f244;
	lg2.approx.ftz.f32 	%f219, %f218;
	mul.ftz.f32 	%f220, %f219, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f221, %f220;
	neg.ftz.f32 	%f249, %f221;

BB3_46:
	mul.wide.s32 	%rd34, %r90, 8;
	add.s64 	%rd35, %rd28, %rd34;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f243;
	mov.b16 	%rs29, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f249;
	mov.b16 	%rs30, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f248;
	mov.b16 	%rs31, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f247;
	mov.b16 	%rs32, %temp;
}
	st.global.v4.u16 	[%rd35], {%rs32, %rs31, %rs30, %rs29};

BB3_47:
	bar.sync 	0;
	add.s32 	%r108, %r108, 1;
	mad.lo.s32 	%r109, %r110, %r35, %r49;
	setp.gt.s32	%p43, %r111, 0;
	@%p43 bra 	BB3_21;

BB3_48:
	ret;
}

.visible .entry VerticalRecursiveGaussianRGBAF32_kernel(
	.param .u64 VerticalRecursiveGaussianRGBAF32_kernel_param_0,
	.param .u32 VerticalRecursiveGaussianRGBAF32_kernel_param_1,
	.param .u32 VerticalRecursiveGaussianRGBAF32_kernel_param_2,
	.param .u32 VerticalRecursiveGaussianRGBAF32_kernel_param_3,
	.param .u64 VerticalRecursiveGaussianRGBAF32_kernel_param_4,
	.param .u32 VerticalRecursiveGaussianRGBAF32_kernel_param_5,
	.param .u32 VerticalRecursiveGaussianRGBAF32_kernel_param_6,
	.param .u32 VerticalRecursiveGaussianRGBAF32_kernel_param_7,
	.param .u32 VerticalRecursiveGaussianRGBAF32_kernel_param_8,
	.param .f32 VerticalRecursiveGaussianRGBAF32_kernel_param_9,
	.param .f32 VerticalRecursiveGaussianRGBAF32_kernel_param_10,
	.param .f32 VerticalRecursiveGaussianRGBAF32_kernel_param_11,
	.param .f32 VerticalRecursiveGaussianRGBAF32_kernel_param_12,
	.param .f32 VerticalRecursiveGaussianRGBAF32_kernel_param_13,
	.param .f32 VerticalRecursiveGaussianRGBAF32_kernel_param_14,
	.param .f32 VerticalRecursiveGaussianRGBAF32_kernel_param_15,
	.param .f32 VerticalRecursiveGaussianRGBAF32_kernel_param_16
)
{
	.reg .pred 	%p<44>;
	.reg .s32 	%r<113>;
	.reg .f32 	%f<263>;
	.reg .s64 	%rd<36>;
	// demoted variable
	.shared .align 4 .b8 VerticalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_9460_non_const_smem[2048];

	ld.param.u64 	%rd2, [VerticalRecursiveGaussianRGBAF32_kernel_param_0];
	ld.param.u32 	%r35, [VerticalRecursiveGaussianRGBAF32_kernel_param_1];
	ld.param.u32 	%r36, [VerticalRecursiveGaussianRGBAF32_kernel_param_2];
	ld.param.u32 	%r37, [VerticalRecursiveGaussianRGBAF32_kernel_param_3];
	ld.param.u64 	%rd3, [VerticalRecursiveGaussianRGBAF32_kernel_param_4];
	ld.param.u32 	%r38, [VerticalRecursiveGaussianRGBAF32_kernel_param_5];
	ld.param.u32 	%r39, [VerticalRecursiveGaussianRGBAF32_kernel_param_6];
	ld.param.u32 	%r40, [VerticalRecursiveGaussianRGBAF32_kernel_param_7];
	ld.param.u32 	%r41, [VerticalRecursiveGaussianRGBAF32_kernel_param_8];
	ld.param.f32 	%f78, [VerticalRecursiveGaussianRGBAF32_kernel_param_9];
	ld.param.f32 	%f79, [VerticalRecursiveGaussianRGBAF32_kernel_param_10];
	ld.param.f32 	%f80, [VerticalRecursiveGaussianRGBAF32_kernel_param_11];
	ld.param.f32 	%f81, [VerticalRecursiveGaussianRGBAF32_kernel_param_12];
	ld.param.f32 	%f82, [VerticalRecursiveGaussianRGBAF32_kernel_param_13];
	ld.param.f32 	%f83, [VerticalRecursiveGaussianRGBAF32_kernel_param_14];
	ld.param.f32 	%f84, [VerticalRecursiveGaussianRGBAF32_kernel_param_15];
	ld.param.f32 	%f85, [VerticalRecursiveGaussianRGBAF32_kernel_param_16];
	mov.u32 	%r42, %ctaid.x;
	mov.u32 	%r43, %ntid.x;
	mov.u32 	%r44, %tid.x;
	mad.lo.s32 	%r1, %r42, %r43, %r44;
	sub.s32 	%r45, %r40, %r37;
	shr.s32 	%r46, %r45, 1;
	mov.u32 	%r112, %tid.y;
	sub.s32 	%r110, %r112, %r46;
	setp.ge.s32	%p1, %r1, %r39;
	@%p1 bra 	BB4_48;

	sub.s32 	%r47, %r39, %r36;
	shr.s32 	%r48, %r47, 1;
	sub.s32 	%r49, %r1, %r48;
	mad.lo.s32 	%r109, %r110, %r35, %r49;
	setp.gt.s32	%p2, %r40, 0;
	@%p2 bra 	BB4_3;

	mov.u32 	%r111, 0;
	bra.uni 	BB4_19;

BB4_3:
	mad.lo.s32 	%r107, %r112, %r38, %r1;
	mov.u32 	%r111, 0;
	mov.f32 	%f237, 0f00000000;
	mov.f32 	%f236, %f237;
	mov.f32 	%f235, %f237;

BB4_4:
	setp.lt.s32	%p3, %r49, %r36;
	setp.gt.s32	%p4, %r49, -1;
	setp.lt.s32	%p5, %r110, %r37;
	setp.gt.s32	%p6, %r110, -1;
	and.pred  	%p7, %p6, %p5;
	and.pred  	%p8, %p7, %p4;
	and.pred  	%p9, %p8, %p3;
	@%p9 bra 	BB4_6;

	mov.f32 	%f244, 0f00000000;
	mov.f32 	%f243, %f244;
	mov.f32 	%f242, %f244;
	mov.f32 	%f241, %f244;
	bra.uni 	BB4_16;

BB4_6:
	cvta.to.global.u64 	%rd4, %rd2;
	mul.wide.s32 	%rd5, %r109, 16;
	add.s64 	%rd6, %rd4, %rd5;
	ld.global.v4.f32 	{%f93, %f94, %f95, %f96}, [%rd6];
	cvt.ftz.sat.f32.f32	%f244, %f96;
	setp.ltu.ftz.f32	%p10, %f93, 0f00000000;
	@%p10 bra 	BB4_8;

	lg2.approx.ftz.f32 	%f97, %f93;
	mul.ftz.f32 	%f98, %f97, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f238, %f98;
	bra.uni 	BB4_9;

BB4_8:
	neg.ftz.f32 	%f99, %f93;
	lg2.approx.ftz.f32 	%f100, %f99;
	mul.ftz.f32 	%f101, %f100, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f102, %f101;
	neg.ftz.f32 	%f238, %f102;

BB4_9:
	setp.ltu.ftz.f32	%p11, %f94, 0f00000000;
	@%p11 bra 	BB4_11;

	lg2.approx.ftz.f32 	%f103, %f94;
	mul.ftz.f32 	%f104, %f103, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f239, %f104;
	bra.uni 	BB4_12;

BB4_11:
	neg.ftz.f32 	%f105, %f94;
	lg2.approx.ftz.f32 	%f106, %f105;
	mul.ftz.f32 	%f107, %f106, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f108, %f107;
	neg.ftz.f32 	%f239, %f108;

BB4_12:
	setp.ltu.ftz.f32	%p12, %f95, 0f00000000;
	@%p12 bra 	BB4_14;

	lg2.approx.ftz.f32 	%f109, %f95;
	mul.ftz.f32 	%f110, %f109, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f240, %f110;
	bra.uni 	BB4_15;

BB4_14:
	neg.ftz.f32 	%f111, %f95;
	lg2.approx.ftz.f32 	%f112, %f111;
	mul.ftz.f32 	%f113, %f112, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f114, %f113;
	neg.ftz.f32 	%f240, %f114;

BB4_15:
	mul.ftz.f32 	%f243, %f240, %f244;
	mul.ftz.f32 	%f242, %f239, %f244;
	mul.ftz.f32 	%f241, %f238, %f244;

BB4_16:
	mov.u32 	%r11, %tid.y;
	shl.b32 	%r59, %r11, 5;
	add.s32 	%r60, %r59, %r44;
	mul.wide.s32 	%rd7, %r60, 4;
	mov.u64 	%rd8, VerticalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_9460_non_const_smem;
	add.s64 	%rd9, %rd8, %rd7;
	st.shared.f32 	[%rd9], %f241;
	st.shared.f32 	[%rd9+512], %f242;
	st.shared.f32 	[%rd9+1024], %f243;
	st.shared.f32 	[%rd9+1536], %f244;
	bar.sync 	0;
	shl.b32 	%r61, %r11, 7;
	add.s32 	%r62, %r44, %r61;
	mul.wide.s32 	%rd10, %r62, 4;
	add.s64 	%rd12, %rd8, %rd10;
	setp.eq.s32	%p13, %r111, 0;
	setp.ne.s32	%p14, %r41, 0;
	and.pred  	%p15, %p13, %p14;
	ld.shared.f32 	%f115, [%rd12];
	mul.ftz.f32 	%f116, %f115, 0f3F000000;
	selp.f32	%f117, %f116, %f236, %p15;
	selp.f32	%f118, %f116, %f235, %p15;
	mul.ftz.f32 	%f119, %f237, %f79;
	fma.rn.ftz.f32 	%f120, %f115, %f78, %f119;
	fma.rn.ftz.f32 	%f121, %f117, %f80, %f120;
	fma.rn.ftz.f32 	%f122, %f118, %f81, %f121;
	st.shared.f32 	[%rd12], %f122;
	ld.shared.f32 	%f123, [%rd12+128];
	mul.ftz.f32 	%f124, %f115, %f79;
	fma.rn.ftz.f32 	%f125, %f123, %f78, %f124;
	fma.rn.ftz.f32 	%f126, %f122, %f80, %f125;
	fma.rn.ftz.f32 	%f127, %f117, %f81, %f126;
	st.shared.f32 	[%rd12+128], %f127;
	ld.shared.f32 	%f128, [%rd12+256];
	mul.ftz.f32 	%f129, %f123, %f79;
	fma.rn.ftz.f32 	%f130, %f128, %f78, %f129;
	fma.rn.ftz.f32 	%f131, %f127, %f80, %f130;
	fma.rn.ftz.f32 	%f235, %f122, %f81, %f131;
	st.shared.f32 	[%rd12+256], %f235;
	ld.shared.f32 	%f237, [%rd12+384];
	mul.ftz.f32 	%f132, %f128, %f79;
	fma.rn.ftz.f32 	%f133, %f237, %f78, %f132;
	fma.rn.ftz.f32 	%f134, %f235, %f80, %f133;
	fma.rn.ftz.f32 	%f236, %f127, %f81, %f134;
	st.shared.f32 	[%rd12+384], %f236;
	bar.sync 	0;
	setp.ge.s32	%p16, %r112, %r40;
	@%p16 bra 	BB4_18;

	cvta.to.global.u64 	%rd13, %rd3;
	mul.wide.s32 	%rd14, %r60, 4;
	add.s64 	%rd16, %rd8, %rd14;
	mul.wide.s32 	%rd17, %r107, 16;
	add.s64 	%rd18, %rd13, %rd17;
	ld.shared.f32 	%f135, [%rd16+1536];
	ld.shared.f32 	%f136, [%rd16+1024];
	ld.shared.f32 	%f137, [%rd16+512];
	ld.shared.f32 	%f138, [%rd16];
	st.global.v4.f32 	[%rd18], {%f138, %f137, %f136, %f135};

BB4_18:
	bar.sync 	0;
	add.s32 	%r110, %r110, 4;
	add.s32 	%r112, %r112, 4;
	shl.b32 	%r67, %r35, 2;
	add.s32 	%r109, %r109, %r67;
	shl.b32 	%r68, %r38, 2;
	add.s32 	%r107, %r107, %r68;
	add.s32 	%r111, %r111, 4;
	setp.lt.s32	%p17, %r111, %r40;
	@%p17 bra 	BB4_4;

BB4_19:
	setp.lt.s32	%p18, %r111, 1;
	@%p18 bra 	BB4_48;

	add.s32 	%r22, %r111, -1;
	mov.f32 	%f248, 0f00000000;
	mov.f32 	%f247, %f248;
	mov.f32 	%f246, %f248;
	mov.f32 	%f245, %f248;
	mov.u32 	%r108, 0;

BB4_21:
	setp.lt.s32	%p19, %r49, %r36;
	setp.gt.s32	%p20, %r49, -1;
	add.s32 	%r111, %r111, -4;
	add.s32 	%r112, %r112, -4;
	add.s32 	%r110, %r110, -4;
	setp.gt.s32	%p21, %r110, -1;
	setp.lt.s32	%p22, %r110, %r37;
	and.pred  	%p23, %p21, %p22;
	and.pred  	%p24, %p23, %p20;
	and.pred  	%p25, %p24, %p19;
	@%p25 bra 	BB4_23;

	mov.f32 	%f255, 0f00000000;
	mov.f32 	%f254, %f255;
	mov.f32 	%f253, %f255;
	mov.f32 	%f252, %f255;
	bra.uni 	BB4_33;

BB4_23:
	shl.b32 	%r77, %r35, 2;
	sub.s32 	%r78, %r109, %r77;
	cvta.to.global.u64 	%rd19, %rd2;
	mul.wide.s32 	%rd20, %r78, 16;
	add.s64 	%rd21, %rd19, %rd20;
	ld.global.v4.f32 	{%f147, %f148, %f149, %f150}, [%rd21];
	cvt.ftz.sat.f32.f32	%f255, %f150;
	setp.ltu.ftz.f32	%p26, %f147, 0f00000000;
	@%p26 bra 	BB4_25;

	lg2.approx.ftz.f32 	%f152, %f147;
	mul.ftz.f32 	%f153, %f152, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f249, %f153;
	bra.uni 	BB4_26;

BB4_25:
	neg.ftz.f32 	%f154, %f147;
	lg2.approx.ftz.f32 	%f155, %f154;
	mul.ftz.f32 	%f156, %f155, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f157, %f156;
	neg.ftz.f32 	%f249, %f157;

BB4_26:
	setp.ltu.ftz.f32	%p27, %f148, 0f00000000;
	@%p27 bra 	BB4_28;

	lg2.approx.ftz.f32 	%f158, %f148;
	mul.ftz.f32 	%f159, %f158, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f250, %f159;
	bra.uni 	BB4_29;

BB4_28:
	neg.ftz.f32 	%f160, %f148;
	lg2.approx.ftz.f32 	%f161, %f160;
	mul.ftz.f32 	%f162, %f161, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f163, %f162;
	neg.ftz.f32 	%f250, %f163;

BB4_29:
	setp.ltu.ftz.f32	%p28, %f149, 0f00000000;
	@%p28 bra 	BB4_31;

	lg2.approx.ftz.f32 	%f164, %f149;
	mul.ftz.f32 	%f165, %f164, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f251, %f165;
	bra.uni 	BB4_32;

BB4_31:
	neg.ftz.f32 	%f166, %f149;
	lg2.approx.ftz.f32 	%f167, %f166;
	mul.ftz.f32 	%f168, %f167, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f169, %f168;
	neg.ftz.f32 	%f251, %f169;

BB4_32:
	mul.ftz.f32 	%f254, %f251, %f255;
	mul.ftz.f32 	%f253, %f250, %f255;
	mul.ftz.f32 	%f252, %f249, %f255;

BB4_33:
	mov.u32 	%r31, %tid.y;
	shl.b32 	%r79, %r31, 5;
	add.s32 	%r80, %r79, %r44;
	mul.wide.s32 	%rd22, %r80, 4;
	mov.u64 	%rd23, VerticalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_9460_non_const_smem;
	add.s64 	%rd24, %rd23, %rd22;
	st.shared.f32 	[%rd24], %f252;
	st.shared.f32 	[%rd24+512], %f253;
	st.shared.f32 	[%rd24+1024], %f254;
	st.shared.f32 	[%rd24+1536], %f255;
	bar.sync 	0;
	shl.b32 	%r81, %r31, 7;
	add.s32 	%r82, %r44, %r81;
	mul.wide.s32 	%rd25, %r82, 4;
	add.s64 	%rd27, %rd23, %rd25;
	mad.lo.s32 	%r83, %r108, -4, %r22;
	add.s32 	%r84, %r40, -1;
	setp.eq.s32	%p29, %r83, %r84;
	setp.ne.s32	%p30, %r41, 0;
	and.pred  	%p31, %p29, %p30;
	ld.shared.f32 	%f170, [%rd27+384];
	mul.ftz.f32 	%f171, %f170, 0f3F000000;
	selp.f32	%f172, %f171, %f246, %p31;
	selp.f32	%f173, %f171, %f245, %p31;
	mul.ftz.f32 	%f174, %f247, %f83;
	fma.rn.ftz.f32 	%f175, %f248, %f82, %f174;
	fma.rn.ftz.f32 	%f176, %f172, %f84, %f175;
	fma.rn.ftz.f32 	%f177, %f173, %f85, %f176;
	st.shared.f32 	[%rd27+384], %f177;
	setp.eq.s32	%p32, %r83, %r40;
	and.pred  	%p33, %p32, %p30;
	ld.shared.f32 	%f178, [%rd27+256];
	mul.ftz.f32 	%f179, %f178, 0f3F000000;
	selp.f32	%f180, %f179, %f177, %p33;
	selp.f32	%f181, %f179, %f172, %p33;
	mul.ftz.f32 	%f182, %f248, %f83;
	fma.rn.ftz.f32 	%f183, %f170, %f82, %f182;
	fma.rn.ftz.f32 	%f184, %f180, %f84, %f183;
	fma.rn.ftz.f32 	%f185, %f181, %f85, %f184;
	st.shared.f32 	[%rd27+256], %f185;
	add.s32 	%r85, %r83, -2;
	setp.eq.s32	%p34, %r85, %r84;
	and.pred  	%p35, %p34, %p30;
	ld.shared.f32 	%f247, [%rd27+128];
	mul.ftz.f32 	%f186, %f247, 0f3F000000;
	selp.f32	%f187, %f186, %f185, %p35;
	selp.f32	%f188, %f186, %f180, %p35;
	mul.ftz.f32 	%f189, %f170, %f83;
	fma.rn.ftz.f32 	%f190, %f178, %f82, %f189;
	fma.rn.ftz.f32 	%f191, %f187, %f84, %f190;
	fma.rn.ftz.f32 	%f192, %f188, %f85, %f191;
	st.shared.f32 	[%rd27+128], %f192;
	add.s32 	%r86, %r83, -3;
	setp.eq.s32	%p36, %r86, %r84;
	and.pred  	%p37, %p36, %p30;
	ld.shared.f32 	%f248, [%rd27];
	mul.ftz.f32 	%f193, %f248, 0f3F000000;
	selp.f32	%f245, %f193, %f192, %p37;
	selp.f32	%f194, %f193, %f187, %p37;
	mul.ftz.f32 	%f195, %f178, %f83;
	fma.rn.ftz.f32 	%f196, %f247, %f82, %f195;
	fma.rn.ftz.f32 	%f197, %f245, %f84, %f196;
	fma.rn.ftz.f32 	%f246, %f194, %f85, %f197;
	st.shared.f32 	[%rd27], %f246;
	bar.sync 	0;
	setp.ge.s32	%p38, %r112, %r40;
	@%p38 bra 	BB4_47;

	cvta.to.global.u64 	%rd28, %rd3;
	mad.lo.s32 	%r90, %r112, %r38, %r1;
	mul.wide.s32 	%rd29, %r90, 16;
	add.s64 	%rd30, %rd28, %rd29;
	mul.wide.s32 	%rd31, %r80, 4;
	add.s64 	%rd1, %rd23, %rd31;
	ld.global.v4.f32 	{%f198, %f199, %f200, %f201}, [%rd30];
	ld.shared.f32 	%f202, [%rd1+1536];
	add.ftz.f32 	%f203, %f201, %f202;
	cvt.ftz.sat.f32.f32	%f256, %f203;
	add.ftz.f32 	%f204, %f256, 0fB70637BD;
	setp.gtu.ftz.f32	%p39, %f204, 0f00000000;
	@%p39 bra 	BB4_36;

	mov.f32 	%f259, 0f00000000;
	mov.f32 	%f258, %f259;
	mov.f32 	%f257, %f259;
	mov.f32 	%f256, %f259;
	bra.uni 	BB4_37;

BB4_36:
	ld.shared.f32 	%f209, [%rd1];
	add.ftz.f32 	%f210, %f198, %f209;
	ld.shared.f32 	%f211, [%rd1+512];
	add.ftz.f32 	%f212, %f199, %f211;
	ld.shared.f32 	%f213, [%rd1+1024];
	add.ftz.f32 	%f214, %f200, %f213;
	mov.f32 	%f215, 0f3F800000;
	div.approx.ftz.f32 	%f216, %f215, %f256;
	mul.ftz.f32 	%f257, %f214, %f216;
	mul.ftz.f32 	%f258, %f212, %f216;
	mul.ftz.f32 	%f259, %f210, %f216;

BB4_37:
	setp.ltu.ftz.f32	%p40, %f259, 0f00000000;
	@%p40 bra 	BB4_39;

	lg2.approx.ftz.f32 	%f217, %f259;
	mul.ftz.f32 	%f218, %f217, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f260, %f218;
	bra.uni 	BB4_40;

BB4_39:
	neg.ftz.f32 	%f219, %f259;
	lg2.approx.ftz.f32 	%f220, %f219;
	mul.ftz.f32 	%f221, %f220, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f222, %f221;
	neg.ftz.f32 	%f260, %f222;

BB4_40:
	setp.ltu.ftz.f32	%p41, %f258, 0f00000000;
	@%p41 bra 	BB4_42;

	lg2.approx.ftz.f32 	%f223, %f258;
	mul.ftz.f32 	%f224, %f223, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f261, %f224;
	bra.uni 	BB4_43;

BB4_42:
	neg.ftz.f32 	%f225, %f258;
	lg2.approx.ftz.f32 	%f226, %f225;
	mul.ftz.f32 	%f227, %f226, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f228, %f227;
	neg.ftz.f32 	%f261, %f228;

BB4_43:
	setp.ltu.ftz.f32	%p42, %f257, 0f00000000;
	@%p42 bra 	BB4_45;

	lg2.approx.ftz.f32 	%f229, %f257;
	mul.ftz.f32 	%f230, %f229, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f262, %f230;
	bra.uni 	BB4_46;

BB4_45:
	neg.ftz.f32 	%f231, %f257;
	lg2.approx.ftz.f32 	%f232, %f231;
	mul.ftz.f32 	%f233, %f232, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f234, %f233;
	neg.ftz.f32 	%f262, %f234;

BB4_46:
	mul.wide.s32 	%rd34, %r90, 16;
	add.s64 	%rd35, %rd28, %rd34;
	st.global.v4.f32 	[%rd35], {%f260, %f261, %f262, %f256};

BB4_47:
	bar.sync 	0;
	add.s32 	%r108, %r108, 1;
	mad.lo.s32 	%r109, %r110, %r35, %r49;
	setp.gt.s32	%p43, %r111, 0;
	@%p43 bra 	BB4_21;

BB4_48:
	ret;
}

.visible .entry HorizontalRecursiveGaussianRGBAF16_kernel(
	.param .u64 HorizontalRecursiveGaussianRGBAF16_kernel_param_0,
	.param .u32 HorizontalRecursiveGaussianRGBAF16_kernel_param_1,
	.param .u32 HorizontalRecursiveGaussianRGBAF16_kernel_param_2,
	.param .u32 HorizontalRecursiveGaussianRGBAF16_kernel_param_3,
	.param .u64 HorizontalRecursiveGaussianRGBAF16_kernel_param_4,
	.param .u32 HorizontalRecursiveGaussianRGBAF16_kernel_param_5,
	.param .u32 HorizontalRecursiveGaussianRGBAF16_kernel_param_6,
	.param .u32 HorizontalRecursiveGaussianRGBAF16_kernel_param_7,
	.param .u32 HorizontalRecursiveGaussianRGBAF16_kernel_param_8,
	.param .f32 HorizontalRecursiveGaussianRGBAF16_kernel_param_9,
	.param .f32 HorizontalRecursiveGaussianRGBAF16_kernel_param_10,
	.param .f32 HorizontalRecursiveGaussianRGBAF16_kernel_param_11,
	.param .f32 HorizontalRecursiveGaussianRGBAF16_kernel_param_12,
	.param .f32 HorizontalRecursiveGaussianRGBAF16_kernel_param_13,
	.param .f32 HorizontalRecursiveGaussianRGBAF16_kernel_param_14,
	.param .f32 HorizontalRecursiveGaussianRGBAF16_kernel_param_15,
	.param .f32 HorizontalRecursiveGaussianRGBAF16_kernel_param_16
)
{
	.reg .pred 	%p<81>;
	.reg .s16 	%rs<65>;
	.reg .s32 	%r<190>;
	.reg .f32 	%f<481>;
	.reg .s64 	%rd<66>;
	// demoted variable
	.shared .align 4 .b8 HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem[4224];

	ld.param.u64 	%rd11, [HorizontalRecursiveGaussianRGBAF16_kernel_param_0];
	ld.param.u32 	%r31, [HorizontalRecursiveGaussianRGBAF16_kernel_param_1];
	ld.param.u32 	%r32, [HorizontalRecursiveGaussianRGBAF16_kernel_param_2];
	ld.param.u32 	%r33, [HorizontalRecursiveGaussianRGBAF16_kernel_param_3];
	ld.param.u64 	%rd12, [HorizontalRecursiveGaussianRGBAF16_kernel_param_4];
	ld.param.u32 	%r34, [HorizontalRecursiveGaussianRGBAF16_kernel_param_5];
	ld.param.u32 	%r35, [HorizontalRecursiveGaussianRGBAF16_kernel_param_6];
	ld.param.u32 	%r36, [HorizontalRecursiveGaussianRGBAF16_kernel_param_7];
	ld.param.u32 	%r37, [HorizontalRecursiveGaussianRGBAF16_kernel_param_8];
	ld.param.f32 	%f143, [HorizontalRecursiveGaussianRGBAF16_kernel_param_9];
	ld.param.f32 	%f144, [HorizontalRecursiveGaussianRGBAF16_kernel_param_10];
	ld.param.f32 	%f145, [HorizontalRecursiveGaussianRGBAF16_kernel_param_11];
	ld.param.f32 	%f146, [HorizontalRecursiveGaussianRGBAF16_kernel_param_12];
	ld.param.f32 	%f147, [HorizontalRecursiveGaussianRGBAF16_kernel_param_13];
	ld.param.f32 	%f148, [HorizontalRecursiveGaussianRGBAF16_kernel_param_14];
	ld.param.f32 	%f149, [HorizontalRecursiveGaussianRGBAF16_kernel_param_15];
	ld.param.f32 	%f150, [HorizontalRecursiveGaussianRGBAF16_kernel_param_16];
	mov.u32 	%r186, 0;
	setp.gt.s32	%p7, %r35, 0;
	@%p7 bra 	BB5_1;
	bra.uni 	BB5_40;

BB5_1:
	mov.f32 	%f448, 0f00000000;
	mov.f32 	%f447, %f448;
	mov.f32 	%f446, %f448;
	mov.u32 	%r184, %r186;

BB5_2:
	mov.u32 	%r182, %r184;
	mov.u32 	%r1, %r182;
	mov.u32 	%r41, %ctaid.y;
	shl.b32 	%r42, %r41, 3;
	mov.u32 	%r43, %tid.y;
	add.s32 	%r44, %r42, %r43;
	sub.s32 	%r45, %r36, %r33;
	shr.s32 	%r46, %r45, 1;
	sub.s32 	%r47, %r44, %r46;
	setp.lt.s32	%p8, %r47, %r33;
	mov.u32 	%r48, %tid.x;
	add.s32 	%r3, %r186, %r48;
	sub.s32 	%r49, %r35, %r32;
	shr.s32 	%r4, %r49, 1;
	setp.gt.s32	%p9, %r47, -1;
	and.pred  	%p1, %p9, %p8;
	setp.ge.s32	%p10, %r47, %r33;
	@%p10 bra 	BB5_16;

	sub.s32 	%r50, %r3, %r4;
	setp.gt.s32	%p11, %r50, -1;
	and.pred  	%p12, %p1, %p11;
	setp.lt.s32	%p13, %r50, %r32;
	and.pred  	%p14, %p12, %p13;
	@%p14 bra 	BB5_5;

	mov.f32 	%f438, 0f00000000;
	mov.f32 	%f437, %f438;
	mov.f32 	%f436, %f438;
	mov.f32 	%f435, %f438;
	bra.uni 	BB5_15;

BB5_5:
	cvta.to.global.u64 	%rd13, %rd11;
	mad.lo.s32 	%r59, %r47, %r31, %r50;
	mul.wide.s32 	%rd14, %r59, 8;
	add.s64 	%rd15, %rd13, %rd14;
	ld.global.v4.u16 	{%rs9, %rs10, %rs11, %rs12}, [%rd15];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs9;
	cvt.f32.f16 	%f4, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs10;
	cvt.f32.f16 	%f5, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs11;
	cvt.f32.f16 	%f6, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs12;
	cvt.f32.f16 	%f158, %temp;
	}
	cvt.ftz.sat.f32.f32	%f438, %f158;
	setp.ltu.ftz.f32	%p15, %f4, 0f00000000;
	@%p15 bra 	BB5_7;

	lg2.approx.ftz.f32 	%f159, %f4;
	mul.ftz.f32 	%f160, %f159, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f432, %f160;
	bra.uni 	BB5_8;

BB5_7:
	neg.ftz.f32 	%f161, %f4;
	lg2.approx.ftz.f32 	%f162, %f161;
	mul.ftz.f32 	%f163, %f162, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f164, %f163;
	neg.ftz.f32 	%f432, %f164;

BB5_8:
	setp.ltu.ftz.f32	%p16, %f5, 0f00000000;
	@%p16 bra 	BB5_10;

	lg2.approx.ftz.f32 	%f165, %f5;
	mul.ftz.f32 	%f166, %f165, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f433, %f166;
	bra.uni 	BB5_11;

BB5_10:
	neg.ftz.f32 	%f167, %f5;
	lg2.approx.ftz.f32 	%f168, %f167;
	mul.ftz.f32 	%f169, %f168, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f170, %f169;
	neg.ftz.f32 	%f433, %f170;

BB5_11:
	setp.ltu.ftz.f32	%p17, %f6, 0f00000000;
	@%p17 bra 	BB5_13;

	lg2.approx.ftz.f32 	%f171, %f6;
	mul.ftz.f32 	%f172, %f171, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f434, %f172;
	bra.uni 	BB5_14;

BB5_13:
	neg.ftz.f32 	%f173, %f6;
	lg2.approx.ftz.f32 	%f174, %f173;
	mul.ftz.f32 	%f175, %f174, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f176, %f175;
	neg.ftz.f32 	%f434, %f176;

BB5_14:
	mul.ftz.f32 	%f437, %f434, %f438;
	mul.ftz.f32 	%f436, %f433, %f438;
	mul.ftz.f32 	%f435, %f432, %f438;

BB5_15:
	mad.lo.s32 	%r62, %r43, 33, %r48;
	mul.wide.s32 	%rd16, %r62, 4;
	mov.u64 	%rd17, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	add.s64 	%rd18, %rd17, %rd16;
	st.shared.f32 	[%rd18], %f435;
	st.shared.f32 	[%rd18+1056], %f436;
	st.shared.f32 	[%rd18+2112], %f437;
	st.shared.f32 	[%rd18+3168], %f438;

BB5_16:
	add.s32 	%r69, %r47, 4;
	setp.ge.s32	%p18, %r69, %r33;
	@%p18 bra 	BB5_30;

	sub.s32 	%r70, %r3, %r4;
	setp.gt.s32	%p19, %r70, -1;
	and.pred  	%p20, %p1, %p19;
	setp.lt.s32	%p21, %r70, %r32;
	and.pred  	%p22, %p20, %p21;
	@%p22 bra 	BB5_19;

	mov.f32 	%f445, 0f00000000;
	mov.f32 	%f444, %f445;
	mov.f32 	%f443, %f445;
	mov.f32 	%f442, %f445;
	bra.uni 	BB5_29;

BB5_19:
	mad.lo.s32 	%r74, %r47, %r31, %r70;
	shl.b32 	%r75, %r31, 2;
	add.s32 	%r76, %r74, %r75;
	cvta.to.global.u64 	%rd19, %rd11;
	mul.wide.s32 	%rd20, %r76, 8;
	add.s64 	%rd21, %rd19, %rd20;
	ld.global.v4.u16 	{%rs17, %rs18, %rs19, %rs20}, [%rd21];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs17;
	cvt.f32.f16 	%f24, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs18;
	cvt.f32.f16 	%f25, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs19;
	cvt.f32.f16 	%f26, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs20;
	cvt.f32.f16 	%f181, %temp;
	}
	cvt.ftz.sat.f32.f32	%f445, %f181;
	setp.ltu.ftz.f32	%p23, %f24, 0f00000000;
	@%p23 bra 	BB5_21;

	lg2.approx.ftz.f32 	%f182, %f24;
	mul.ftz.f32 	%f183, %f182, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f439, %f183;
	bra.uni 	BB5_22;

BB5_21:
	neg.ftz.f32 	%f184, %f24;
	lg2.approx.ftz.f32 	%f185, %f184;
	mul.ftz.f32 	%f186, %f185, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f187, %f186;
	neg.ftz.f32 	%f439, %f187;

BB5_22:
	setp.ltu.ftz.f32	%p24, %f25, 0f00000000;
	@%p24 bra 	BB5_24;

	lg2.approx.ftz.f32 	%f188, %f25;
	mul.ftz.f32 	%f189, %f188, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f440, %f189;
	bra.uni 	BB5_25;

BB5_24:
	neg.ftz.f32 	%f190, %f25;
	lg2.approx.ftz.f32 	%f191, %f190;
	mul.ftz.f32 	%f192, %f191, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f193, %f192;
	neg.ftz.f32 	%f440, %f193;

BB5_25:
	setp.ltu.ftz.f32	%p25, %f26, 0f00000000;
	@%p25 bra 	BB5_27;

	lg2.approx.ftz.f32 	%f194, %f26;
	mul.ftz.f32 	%f195, %f194, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f441, %f195;
	bra.uni 	BB5_28;

BB5_27:
	neg.ftz.f32 	%f196, %f26;
	lg2.approx.ftz.f32 	%f197, %f196;
	mul.ftz.f32 	%f198, %f197, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f199, %f198;
	neg.ftz.f32 	%f441, %f199;

BB5_28:
	mul.ftz.f32 	%f444, %f441, %f445;
	mul.ftz.f32 	%f443, %f440, %f445;
	mul.ftz.f32 	%f442, %f439, %f445;

BB5_29:
	mad.lo.s32 	%r79, %r43, 33, %r48;
	mul.wide.s32 	%rd22, %r79, 4;
	mov.u64 	%rd23, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	add.s64 	%rd24, %rd23, %rd22;
	st.shared.f32 	[%rd24+528], %f442;
	st.shared.f32 	[%rd24+1584], %f443;
	st.shared.f32 	[%rd24+2640], %f444;
	st.shared.f32 	[%rd24+3696], %f445;

BB5_30:
	mad.lo.s32 	%r82, %r43, 16, %r48;
	mul.lo.s32 	%r83, %r82, 33;
	mul.wide.s32 	%rd25, %r83, 4;
	mov.u64 	%rd26, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	add.s64 	%rd64, %rd26, %rd25;
	shl.b32 	%r84, %r43, 5;
	add.s32 	%r85, %r84, %r48;
	setp.lt.s32	%p2, %r85, 32;
	bar.sync 	0;
	add.s64 	%rd65, %rd64, 16;
	@!%p2 bra 	BB5_33;
	bra.uni 	BB5_31;

BB5_31:
	mov.u32 	%r185, 0;
	mov.u32 	%r183, %r1;

BB5_32:
	mov.u32 	%r6, %r183;
	mov.u64 	%rd4, %rd65;
	setp.eq.s32	%p26, %r6, 0;
	setp.ne.s32	%p27, %r37, 0;
	and.pred  	%p28, %p26, %p27;
	ld.shared.f32 	%f200, [%rd64];
	mul.ftz.f32 	%f201, %f200, 0f3F000000;
	selp.f32	%f202, %f201, %f447, %p28;
	selp.f32	%f203, %f201, %f446, %p28;
	mul.ftz.f32 	%f204, %f448, %f144;
	fma.rn.ftz.f32 	%f205, %f200, %f143, %f204;
	fma.rn.ftz.f32 	%f206, %f202, %f145, %f205;
	fma.rn.ftz.f32 	%f207, %f203, %f146, %f206;
	st.shared.f32 	[%rd64], %f207;
	ld.shared.f32 	%f208, [%rd4+-12];
	mul.ftz.f32 	%f209, %f200, %f144;
	fma.rn.ftz.f32 	%f210, %f208, %f143, %f209;
	fma.rn.ftz.f32 	%f211, %f207, %f145, %f210;
	fma.rn.ftz.f32 	%f212, %f202, %f146, %f211;
	ld.shared.f32 	%f213, [%rd4+-8];
	ld.shared.f32 	%f214, [%rd4+-4];
	ld.shared.f32 	%f215, [%rd4];
	st.shared.f32 	[%rd4+-12], %f212;
	mul.ftz.f32 	%f216, %f208, %f144;
	fma.rn.ftz.f32 	%f217, %f213, %f143, %f216;
	fma.rn.ftz.f32 	%f218, %f212, %f145, %f217;
	fma.rn.ftz.f32 	%f219, %f207, %f146, %f218;
	st.shared.f32 	[%rd4+-8], %f219;
	mul.ftz.f32 	%f220, %f213, %f144;
	fma.rn.ftz.f32 	%f221, %f214, %f143, %f220;
	fma.rn.ftz.f32 	%f222, %f219, %f145, %f221;
	fma.rn.ftz.f32 	%f223, %f212, %f146, %f222;
	st.shared.f32 	[%rd4+-4], %f223;
	mul.ftz.f32 	%f224, %f214, %f144;
	fma.rn.ftz.f32 	%f225, %f215, %f143, %f224;
	fma.rn.ftz.f32 	%f226, %f223, %f145, %f225;
	fma.rn.ftz.f32 	%f227, %f219, %f146, %f226;
	st.shared.f32 	[%rd4], %f227;
	ld.shared.f32 	%f228, [%rd4+4];
	mul.ftz.f32 	%f229, %f215, %f144;
	fma.rn.ftz.f32 	%f230, %f228, %f143, %f229;
	fma.rn.ftz.f32 	%f231, %f227, %f145, %f230;
	fma.rn.ftz.f32 	%f232, %f223, %f146, %f231;
	ld.shared.f32 	%f233, [%rd4+8];
	ld.shared.f32 	%f448, [%rd4+12];
	st.shared.f32 	[%rd4+4], %f232;
	mul.ftz.f32 	%f234, %f228, %f144;
	fma.rn.ftz.f32 	%f235, %f233, %f143, %f234;
	fma.rn.ftz.f32 	%f236, %f232, %f145, %f235;
	fma.rn.ftz.f32 	%f446, %f227, %f146, %f236;
	st.shared.f32 	[%rd4+8], %f446;
	mul.ftz.f32 	%f237, %f233, %f144;
	fma.rn.ftz.f32 	%f238, %f448, %f143, %f237;
	fma.rn.ftz.f32 	%f239, %f446, %f145, %f238;
	fma.rn.ftz.f32 	%f447, %f232, %f146, %f239;
	st.shared.f32 	[%rd4+12], %f447;
	add.s32 	%r8, %r6, -8;
	add.s64 	%rd65, %rd4, 32;
	add.s32 	%r185, %r185, 32;
	add.s64 	%rd64, %rd4, 16;
	setp.ne.s32	%p29, %r185, 128;
	mov.u32 	%r183, %r8;
	@%p29 bra 	BB5_32;

BB5_33:
	bar.sync 	0;
	mov.u32 	%r181, %ctaid.y;
	shl.b32 	%r180, %r181, 3;
	add.s32 	%r179, %r180, %r43;
	mad.lo.s32 	%r12, %r179, %r34, %r3;
	@!%p8 bra 	BB5_36;
	bra.uni 	BB5_34;

BB5_34:
	setp.ge.s32	%p30, %r3, %r35;
	@%p30 bra 	BB5_36;

	mov.u64 	%rd63, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	mad.lo.s32 	%r94, %r43, 33, %r48;
	mul.wide.s32 	%rd27, %r94, 4;
	add.s64 	%rd29, %rd63, %rd27;
	ld.shared.f32 	%f240, [%rd29];
	ld.shared.f32 	%f241, [%rd29+1056];
	ld.shared.f32 	%f242, [%rd29+2112];
	ld.shared.f32 	%f243, [%rd29+3168];
	cvta.to.global.u64 	%rd30, %rd12;
	mul.wide.s32 	%rd31, %r12, 8;
	add.s64 	%rd32, %rd30, %rd31;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f243;
	mov.b16 	%rs25, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f242;
	mov.b16 	%rs26, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f241;
	mov.b16 	%rs27, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f240;
	mov.b16 	%rs28, %temp;
}
	st.global.v4.u16 	[%rd32], {%rs28, %rs27, %rs26, %rs25};

BB5_36:
	@%p18 bra 	BB5_39;

	setp.ge.s32	%p32, %r3, %r35;
	@%p32 bra 	BB5_39;

	mov.u64 	%rd62, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	shl.b32 	%r96, %r34, 2;
	add.s32 	%r97, %r12, %r96;
	mad.lo.s32 	%r100, %r43, 33, %r48;
	mul.wide.s32 	%rd33, %r100, 4;
	add.s64 	%rd35, %rd62, %rd33;
	ld.shared.f32 	%f244, [%rd35+528];
	ld.shared.f32 	%f245, [%rd35+1584];
	ld.shared.f32 	%f246, [%rd35+2640];
	ld.shared.f32 	%f247, [%rd35+3696];
	cvta.to.global.u64 	%rd36, %rd12;
	mul.wide.s32 	%rd37, %r97, 8;
	add.s64 	%rd38, %rd36, %rd37;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f247;
	mov.b16 	%rs29, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f246;
	mov.b16 	%rs30, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f245;
	mov.b16 	%rs31, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f244;
	mov.b16 	%rs32, %temp;
}
	st.global.v4.u16 	[%rd38], {%rs32, %rs31, %rs30, %rs29};

BB5_39:
	bar.sync 	0;
	add.s32 	%r186, %r186, 32;
	setp.lt.s32	%p33, %r186, %r35;
	add.s32 	%r184, %r1, -32;
	@%p33 bra 	BB5_2;

BB5_40:
	setp.lt.s32	%p34, %r186, 1;
	@%p34 bra 	BB5_102;

	add.s32 	%r16, %r186, -1;
	mov.f32 	%f466, 0f00000000;
	mov.f32 	%f465, %f466;
	mov.f32 	%f464, %f466;
	mov.f32 	%f463, %f466;
	mov.u32 	%r187, 0;

BB5_42:
	mov.u32 	%r102, %ctaid.y;
	shl.b32 	%r103, %r102, 3;
	mov.u32 	%r104, %tid.y;
	add.s32 	%r105, %r103, %r104;
	sub.s32 	%r106, %r36, %r33;
	shr.s32 	%r107, %r106, 1;
	sub.s32 	%r108, %r105, %r107;
	setp.lt.s32	%p35, %r108, %r33;
	mad.lo.s32 	%r18, %r187, -32, %r16;
	mov.u32 	%r109, %tid.x;
	add.s32 	%r110, %r18, %r109;
	add.s32 	%r19, %r110, -31;
	sub.s32 	%r111, %r35, %r32;
	shr.s32 	%r112, %r111, 1;
	sub.s32 	%r113, %r19, %r112;
	mad.lo.s32 	%r20, %r108, %r31, %r113;
	setp.gt.s32	%p36, %r113, -1;
	setp.gt.s32	%p37, %r108, -1;
	and.pred  	%p38, %p37, %p35;
	and.pred  	%p39, %p38, %p36;
	setp.lt.s32	%p40, %r113, %r32;
	and.pred  	%p4, %p39, %p40;
	setp.ge.s32	%p41, %r108, %r33;
	@%p41 bra 	BB5_56;

	@%p4 bra 	BB5_45;

	mov.f32 	%f455, 0f00000000;
	mov.f32 	%f454, %f455;
	mov.f32 	%f453, %f455;
	mov.f32 	%f452, %f455;
	bra.uni 	BB5_55;

BB5_45:
	cvta.to.global.u64 	%rd39, %rd11;
	mul.wide.s32 	%rd40, %r20, 8;
	add.s64 	%rd41, %rd39, %rd40;
	ld.global.v4.u16 	{%rs33, %rs34, %rs35, %rs36}, [%rd41];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs33;
	cvt.f32.f16 	%f57, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs34;
	cvt.f32.f16 	%f58, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs35;
	cvt.f32.f16 	%f59, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs36;
	cvt.f32.f16 	%f256, %temp;
	}
	cvt.ftz.sat.f32.f32	%f455, %f256;
	setp.ltu.ftz.f32	%p42, %f57, 0f00000000;
	@%p42 bra 	BB5_47;

	lg2.approx.ftz.f32 	%f257, %f57;
	mul.ftz.f32 	%f258, %f257, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f449, %f258;
	bra.uni 	BB5_48;

BB5_47:
	neg.ftz.f32 	%f259, %f57;
	lg2.approx.ftz.f32 	%f260, %f259;
	mul.ftz.f32 	%f261, %f260, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f262, %f261;
	neg.ftz.f32 	%f449, %f262;

BB5_48:
	setp.ltu.ftz.f32	%p43, %f58, 0f00000000;
	@%p43 bra 	BB5_50;

	lg2.approx.ftz.f32 	%f263, %f58;
	mul.ftz.f32 	%f264, %f263, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f450, %f264;
	bra.uni 	BB5_51;

BB5_50:
	neg.ftz.f32 	%f265, %f58;
	lg2.approx.ftz.f32 	%f266, %f265;
	mul.ftz.f32 	%f267, %f266, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f268, %f267;
	neg.ftz.f32 	%f450, %f268;

BB5_51:
	setp.ltu.ftz.f32	%p44, %f59, 0f00000000;
	@%p44 bra 	BB5_53;

	lg2.approx.ftz.f32 	%f269, %f59;
	mul.ftz.f32 	%f270, %f269, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f451, %f270;
	bra.uni 	BB5_54;

BB5_53:
	neg.ftz.f32 	%f271, %f59;
	lg2.approx.ftz.f32 	%f272, %f271;
	mul.ftz.f32 	%f273, %f272, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f274, %f273;
	neg.ftz.f32 	%f451, %f274;

BB5_54:
	mul.ftz.f32 	%f454, %f451, %f455;
	mul.ftz.f32 	%f453, %f450, %f455;
	mul.ftz.f32 	%f452, %f449, %f455;

BB5_55:
	mad.lo.s32 	%r116, %r104, 33, %r109;
	mul.wide.s32 	%rd42, %r116, 4;
	mov.u64 	%rd43, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	add.s64 	%rd44, %rd43, %rd42;
	st.shared.f32 	[%rd44], %f452;
	st.shared.f32 	[%rd44+1056], %f453;
	st.shared.f32 	[%rd44+2112], %f454;
	st.shared.f32 	[%rd44+3168], %f455;

BB5_56:
	add.s32 	%r124, %r108, 4;
	setp.ge.s32	%p45, %r124, %r33;
	@%p45 bra 	BB5_70;

	@%p4 bra 	BB5_59;

	mov.f32 	%f462, 0f00000000;
	mov.f32 	%f461, %f462;
	mov.f32 	%f460, %f462;
	mov.f32 	%f459, %f462;
	bra.uni 	BB5_69;

BB5_59:
	shl.b32 	%r125, %r31, 2;
	add.s32 	%r126, %r20, %r125;
	cvta.to.global.u64 	%rd45, %rd11;
	mul.wide.s32 	%rd46, %r126, 8;
	add.s64 	%rd47, %rd45, %rd46;
	ld.global.v4.u16 	{%rs41, %rs42, %rs43, %rs44}, [%rd47];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs41;
	cvt.f32.f16 	%f77, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs42;
	cvt.f32.f16 	%f78, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs43;
	cvt.f32.f16 	%f79, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs44;
	cvt.f32.f16 	%f279, %temp;
	}
	cvt.ftz.sat.f32.f32	%f462, %f279;
	setp.ltu.ftz.f32	%p46, %f77, 0f00000000;
	@%p46 bra 	BB5_61;

	lg2.approx.ftz.f32 	%f280, %f77;
	mul.ftz.f32 	%f281, %f280, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f456, %f281;
	bra.uni 	BB5_62;

BB5_61:
	neg.ftz.f32 	%f282, %f77;
	lg2.approx.ftz.f32 	%f283, %f282;
	mul.ftz.f32 	%f284, %f283, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f285, %f284;
	neg.ftz.f32 	%f456, %f285;

BB5_62:
	setp.ltu.ftz.f32	%p47, %f78, 0f00000000;
	@%p47 bra 	BB5_64;

	lg2.approx.ftz.f32 	%f286, %f78;
	mul.ftz.f32 	%f287, %f286, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f457, %f287;
	bra.uni 	BB5_65;

BB5_64:
	neg.ftz.f32 	%f288, %f78;
	lg2.approx.ftz.f32 	%f289, %f288;
	mul.ftz.f32 	%f290, %f289, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f291, %f290;
	neg.ftz.f32 	%f457, %f291;

BB5_65:
	setp.ltu.ftz.f32	%p48, %f79, 0f00000000;
	@%p48 bra 	BB5_67;

	lg2.approx.ftz.f32 	%f292, %f79;
	mul.ftz.f32 	%f293, %f292, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f458, %f293;
	bra.uni 	BB5_68;

BB5_67:
	neg.ftz.f32 	%f294, %f79;
	lg2.approx.ftz.f32 	%f295, %f294;
	mul.ftz.f32 	%f296, %f295, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f297, %f296;
	neg.ftz.f32 	%f458, %f297;

BB5_68:
	mul.ftz.f32 	%f461, %f458, %f462;
	mul.ftz.f32 	%f460, %f457, %f462;
	mul.ftz.f32 	%f459, %f456, %f462;

BB5_69:
	mad.lo.s32 	%r129, %r104, 33, %r109;
	mul.wide.s32 	%rd48, %r129, 4;
	mov.u64 	%rd49, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	add.s64 	%rd50, %rd49, %rd48;
	st.shared.f32 	[%rd50+528], %f459;
	st.shared.f32 	[%rd50+1584], %f460;
	st.shared.f32 	[%rd50+2640], %f461;
	st.shared.f32 	[%rd50+3696], %f462;

BB5_70:
	shl.b32 	%r130, %r104, 5;
	add.s32 	%r131, %r130, %r109;
	setp.lt.s32	%p5, %r131, 32;
	bar.sync 	0;
	shl.b32 	%r132, %r104, 4;
	add.s32 	%r133, %r132, %r109;
	mad.lo.s32 	%r189, %r133, 33, 31;
	@!%p5 bra 	BB5_73;
	bra.uni 	BB5_71;

BB5_71:
	mov.u32 	%r188, 0;

BB5_72:
	mad.lo.s32 	%r174, %r187, -32, %r16;
	mul.wide.s32 	%rd51, %r189, 4;
	mov.u64 	%rd52, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	add.s64 	%rd53, %rd52, %rd51;
	add.s32 	%r135, %r35, -1;
	sub.s32 	%r136, %r174, %r188;
	setp.eq.s32	%p49, %r136, %r135;
	setp.ne.s32	%p50, %r37, 0;
	and.pred  	%p51, %p49, %p50;
	ld.shared.f32 	%f298, [%rd53];
	mul.ftz.f32 	%f299, %f298, 0f3F000000;
	selp.f32	%f300, %f299, %f464, %p51;
	selp.f32	%f301, %f299, %f463, %p51;
	mul.ftz.f32 	%f302, %f465, %f148;
	fma.rn.ftz.f32 	%f303, %f466, %f147, %f302;
	fma.rn.ftz.f32 	%f304, %f300, %f149, %f303;
	fma.rn.ftz.f32 	%f305, %f301, %f150, %f304;
	ld.shared.f32 	%f306, [%rd53+-4];
	ld.shared.f32 	%f307, [%rd53+-8];
	ld.shared.f32 	%f308, [%rd53+-12];
	st.shared.f32 	[%rd53], %f305;
	not.b32 	%r137, %r188;
	add.s32 	%r138, %r174, %r137;
	setp.eq.s32	%p52, %r138, %r135;
	and.pred  	%p53, %p52, %p50;
	mul.ftz.f32 	%f309, %f306, 0f3F000000;
	selp.f32	%f310, %f309, %f305, %p53;
	selp.f32	%f311, %f309, %f300, %p53;
	mul.ftz.f32 	%f312, %f466, %f148;
	fma.rn.ftz.f32 	%f313, %f298, %f147, %f312;
	fma.rn.ftz.f32 	%f314, %f310, %f149, %f313;
	fma.rn.ftz.f32 	%f315, %f311, %f150, %f314;
	st.shared.f32 	[%rd53+-4], %f315;
	mov.u32 	%r139, -2;
	sub.s32 	%r140, %r139, %r188;
	add.s32 	%r141, %r174, %r140;
	setp.eq.s32	%p54, %r141, %r135;
	and.pred  	%p55, %p54, %p50;
	mul.ftz.f32 	%f316, %f307, 0f3F000000;
	selp.f32	%f317, %f316, %f315, %p55;
	selp.f32	%f318, %f316, %f310, %p55;
	mul.ftz.f32 	%f319, %f298, %f148;
	fma.rn.ftz.f32 	%f320, %f306, %f147, %f319;
	fma.rn.ftz.f32 	%f321, %f317, %f149, %f320;
	fma.rn.ftz.f32 	%f322, %f318, %f150, %f321;
	st.shared.f32 	[%rd53+-8], %f322;
	mov.u32 	%r142, -3;
	sub.s32 	%r143, %r142, %r188;
	add.s32 	%r144, %r174, %r143;
	setp.eq.s32	%p56, %r144, %r135;
	and.pred  	%p57, %p56, %p50;
	mul.ftz.f32 	%f323, %f308, 0f3F000000;
	selp.f32	%f324, %f323, %f322, %p57;
	selp.f32	%f325, %f323, %f317, %p57;
	mul.ftz.f32 	%f326, %f306, %f148;
	fma.rn.ftz.f32 	%f327, %f307, %f147, %f326;
	fma.rn.ftz.f32 	%f328, %f324, %f149, %f327;
	fma.rn.ftz.f32 	%f329, %f325, %f150, %f328;
	st.shared.f32 	[%rd53+-12], %f329;
	mov.u32 	%r145, -4;
	sub.s32 	%r146, %r145, %r188;
	add.s32 	%r147, %r174, %r146;
	setp.eq.s32	%p58, %r147, %r135;
	and.pred  	%p59, %p58, %p50;
	ld.shared.f32 	%f330, [%rd53+-16];
	mul.ftz.f32 	%f331, %f330, 0f3F000000;
	selp.f32	%f332, %f331, %f329, %p59;
	selp.f32	%f333, %f331, %f324, %p59;
	mul.ftz.f32 	%f334, %f307, %f148;
	fma.rn.ftz.f32 	%f335, %f308, %f147, %f334;
	fma.rn.ftz.f32 	%f336, %f332, %f149, %f335;
	fma.rn.ftz.f32 	%f337, %f333, %f150, %f336;
	ld.shared.f32 	%f338, [%rd53+-20];
	ld.shared.f32 	%f465, [%rd53+-24];
	ld.shared.f32 	%f466, [%rd53+-28];
	st.shared.f32 	[%rd53+-16], %f337;
	mov.u32 	%r148, -5;
	sub.s32 	%r149, %r148, %r188;
	add.s32 	%r150, %r174, %r149;
	setp.eq.s32	%p60, %r150, %r135;
	and.pred  	%p61, %p60, %p50;
	mul.ftz.f32 	%f339, %f338, 0f3F000000;
	selp.f32	%f340, %f339, %f337, %p61;
	selp.f32	%f341, %f339, %f332, %p61;
	mul.ftz.f32 	%f342, %f308, %f148;
	fma.rn.ftz.f32 	%f343, %f330, %f147, %f342;
	fma.rn.ftz.f32 	%f344, %f340, %f149, %f343;
	fma.rn.ftz.f32 	%f345, %f341, %f150, %f344;
	st.shared.f32 	[%rd53+-20], %f345;
	mov.u32 	%r151, -6;
	sub.s32 	%r152, %r151, %r188;
	add.s32 	%r153, %r174, %r152;
	setp.eq.s32	%p62, %r153, %r135;
	and.pred  	%p63, %p62, %p50;
	mul.ftz.f32 	%f346, %f465, 0f3F000000;
	selp.f32	%f347, %f346, %f345, %p63;
	selp.f32	%f348, %f346, %f340, %p63;
	mul.ftz.f32 	%f349, %f330, %f148;
	fma.rn.ftz.f32 	%f350, %f338, %f147, %f349;
	fma.rn.ftz.f32 	%f351, %f347, %f149, %f350;
	fma.rn.ftz.f32 	%f352, %f348, %f150, %f351;
	st.shared.f32 	[%rd53+-24], %f352;
	mov.u32 	%r154, -7;
	sub.s32 	%r155, %r154, %r188;
	add.s32 	%r156, %r174, %r155;
	setp.eq.s32	%p64, %r156, %r135;
	and.pred  	%p65, %p64, %p50;
	mul.ftz.f32 	%f353, %f466, 0f3F000000;
	selp.f32	%f463, %f353, %f352, %p65;
	selp.f32	%f354, %f353, %f347, %p65;
	mul.ftz.f32 	%f355, %f338, %f148;
	fma.rn.ftz.f32 	%f356, %f465, %f147, %f355;
	fma.rn.ftz.f32 	%f357, %f463, %f149, %f356;
	fma.rn.ftz.f32 	%f464, %f354, %f150, %f357;
	st.shared.f32 	[%rd53+-28], %f464;
	add.s32 	%r189, %r189, -8;
	add.s32 	%r188, %r188, 8;
	setp.ne.s32	%p66, %r188, 32;
	@%p66 bra 	BB5_72;

BB5_73:
	setp.lt.s32	%p6, %r105, %r36;
	bar.sync 	0;
	mad.lo.s32 	%r177, %r187, -32, %r16;
	add.s32 	%r176, %r177, %r109;
	add.s32 	%r175, %r176, -31;
	mad.lo.s32 	%r29, %r105, %r34, %r175;
	setp.lt.s32	%p67, %r175, %r35;
	and.pred  	%p68, %p6, %p67;
	@!%p68 bra 	BB5_87;
	bra.uni 	BB5_74;

BB5_74:
	cvta.to.global.u64 	%rd54, %rd12;
	mul.wide.s32 	%rd55, %r29, 8;
	add.s64 	%rd7, %rd54, %rd55;
	ld.global.v4.u16 	{%rs49, %rs50, %rs51, %rs52}, [%rd7];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs52;
	cvt.f32.f16 	%f358, %temp;
	}
	mad.lo.s32 	%r162, %r104, 33, %r109;
	mul.wide.s32 	%rd56, %r162, 4;
	mov.u64 	%rd57, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	add.s64 	%rd8, %rd57, %rd56;
	ld.shared.f32 	%f359, [%rd8+3168];
	add.ftz.f32 	%f360, %f358, %f359;
	cvt.ftz.sat.f32.f32	%f467, %f360;
	add.ftz.f32 	%f361, %f467, 0fB70637BD;
	setp.gtu.ftz.f32	%p69, %f361, 0f00000000;
	@%p69 bra 	BB5_76;

	mov.f32 	%f470, 0f00000000;
	mov.f32 	%f469, %f470;
	mov.f32 	%f468, %f470;
	mov.f32 	%f467, %f470;
	bra.uni 	BB5_77;

BB5_76:
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs49;
	cvt.f32.f16 	%f366, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs50;
	cvt.f32.f16 	%f367, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs51;
	cvt.f32.f16 	%f368, %temp;
	}
	ld.shared.f32 	%f369, [%rd8];
	add.ftz.f32 	%f370, %f366, %f369;
	ld.shared.f32 	%f371, [%rd8+1056];
	add.ftz.f32 	%f372, %f367, %f371;
	ld.shared.f32 	%f373, [%rd8+2112];
	add.ftz.f32 	%f374, %f368, %f373;
	mov.f32 	%f375, 0f3F800000;
	div.approx.ftz.f32 	%f376, %f375, %f467;
	mul.ftz.f32 	%f468, %f374, %f376;
	mul.ftz.f32 	%f469, %f372, %f376;
	mul.ftz.f32 	%f470, %f370, %f376;

BB5_77:
	setp.ltu.ftz.f32	%p70, %f470, 0f00000000;
	@%p70 bra 	BB5_79;

	lg2.approx.ftz.f32 	%f377, %f470;
	mul.ftz.f32 	%f378, %f377, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f471, %f378;
	bra.uni 	BB5_80;

BB5_79:
	neg.ftz.f32 	%f379, %f470;
	lg2.approx.ftz.f32 	%f380, %f379;
	mul.ftz.f32 	%f381, %f380, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f382, %f381;
	neg.ftz.f32 	%f471, %f382;

BB5_80:
	setp.ltu.ftz.f32	%p71, %f469, 0f00000000;
	@%p71 bra 	BB5_82;

	lg2.approx.ftz.f32 	%f383, %f469;
	mul.ftz.f32 	%f384, %f383, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f472, %f384;
	bra.uni 	BB5_83;

BB5_82:
	neg.ftz.f32 	%f385, %f469;
	lg2.approx.ftz.f32 	%f386, %f385;
	mul.ftz.f32 	%f387, %f386, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f388, %f387;
	neg.ftz.f32 	%f472, %f388;

BB5_83:
	setp.ltu.ftz.f32	%p72, %f468, 0f00000000;
	@%p72 bra 	BB5_85;

	lg2.approx.ftz.f32 	%f389, %f468;
	mul.ftz.f32 	%f390, %f389, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f473, %f390;
	bra.uni 	BB5_86;

BB5_85:
	neg.ftz.f32 	%f391, %f468;
	lg2.approx.ftz.f32 	%f392, %f391;
	mul.ftz.f32 	%f393, %f392, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f394, %f393;
	neg.ftz.f32 	%f473, %f394;

BB5_86:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f467;
	mov.b16 	%rs53, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f473;
	mov.b16 	%rs54, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f472;
	mov.b16 	%rs55, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f471;
	mov.b16 	%rs56, %temp;
}
	st.global.v4.u16 	[%rd7], {%rs56, %rs55, %rs54, %rs53};

BB5_87:
	add.s32 	%r167, %r105, 4;
	setp.lt.s32	%p74, %r167, %r36;
	and.pred  	%p75, %p74, %p67;
	@!%p75 bra 	BB5_101;
	bra.uni 	BB5_88;

BB5_88:
	shl.b32 	%r168, %r34, 2;
	add.s32 	%r169, %r29, %r168;
	cvta.to.global.u64 	%rd58, %rd12;
	mul.wide.s32 	%rd59, %r169, 8;
	add.s64 	%rd9, %rd58, %rd59;
	ld.global.v4.u16 	{%rs57, %rs58, %rs59, %rs60}, [%rd9];
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs60;
	cvt.f32.f16 	%f395, %temp;
	}
	mad.lo.s32 	%r172, %r104, 33, %r109;
	mul.wide.s32 	%rd60, %r172, 4;
	mov.u64 	%rd61, HorizontalRecursiveGaussianRGBAF16_kernel$__cuda_local_var_180358_10149_non_const_smem;
	add.s64 	%rd10, %rd61, %rd60;
	ld.shared.f32 	%f396, [%rd10+3696];
	add.ftz.f32 	%f397, %f395, %f396;
	cvt.ftz.sat.f32.f32	%f474, %f397;
	add.ftz.f32 	%f398, %f474, 0fB70637BD;
	setp.gtu.ftz.f32	%p76, %f398, 0f00000000;
	@%p76 bra 	BB5_90;

	mov.f32 	%f477, 0f00000000;
	mov.f32 	%f476, %f477;
	mov.f32 	%f475, %f477;
	mov.f32 	%f474, %f477;
	bra.uni 	BB5_91;

BB5_90:
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs57;
	cvt.f32.f16 	%f403, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs58;
	cvt.f32.f16 	%f404, %temp;
	}
	{
	.reg .b16 %temp;
	mov.b16 	%temp, %rs59;
	cvt.f32.f16 	%f405, %temp;
	}
	ld.shared.f32 	%f406, [%rd10+528];
	add.ftz.f32 	%f407, %f403, %f406;
	ld.shared.f32 	%f408, [%rd10+1584];
	add.ftz.f32 	%f409, %f404, %f408;
	ld.shared.f32 	%f410, [%rd10+2640];
	add.ftz.f32 	%f411, %f405, %f410;
	mov.f32 	%f412, 0f3F800000;
	div.approx.ftz.f32 	%f413, %f412, %f474;
	mul.ftz.f32 	%f475, %f411, %f413;
	mul.ftz.f32 	%f476, %f409, %f413;
	mul.ftz.f32 	%f477, %f407, %f413;

BB5_91:
	setp.ltu.ftz.f32	%p77, %f477, 0f00000000;
	@%p77 bra 	BB5_93;

	lg2.approx.ftz.f32 	%f414, %f477;
	mul.ftz.f32 	%f415, %f414, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f478, %f415;
	bra.uni 	BB5_94;

BB5_93:
	neg.ftz.f32 	%f416, %f477;
	lg2.approx.ftz.f32 	%f417, %f416;
	mul.ftz.f32 	%f418, %f417, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f419, %f418;
	neg.ftz.f32 	%f478, %f419;

BB5_94:
	setp.ltu.ftz.f32	%p78, %f476, 0f00000000;
	@%p78 bra 	BB5_96;

	lg2.approx.ftz.f32 	%f420, %f476;
	mul.ftz.f32 	%f421, %f420, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f479, %f421;
	bra.uni 	BB5_97;

BB5_96:
	neg.ftz.f32 	%f422, %f476;
	lg2.approx.ftz.f32 	%f423, %f422;
	mul.ftz.f32 	%f424, %f423, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f425, %f424;
	neg.ftz.f32 	%f479, %f425;

BB5_97:
	setp.ltu.ftz.f32	%p79, %f475, 0f00000000;
	@%p79 bra 	BB5_99;

	lg2.approx.ftz.f32 	%f426, %f475;
	mul.ftz.f32 	%f427, %f426, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f480, %f427;
	bra.uni 	BB5_100;

BB5_99:
	neg.ftz.f32 	%f428, %f475;
	lg2.approx.ftz.f32 	%f429, %f428;
	mul.ftz.f32 	%f430, %f429, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f431, %f430;
	neg.ftz.f32 	%f480, %f431;

BB5_100:
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f474;
	mov.b16 	%rs61, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f480;
	mov.b16 	%rs62, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f479;
	mov.b16 	%rs63, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f478;
	mov.b16 	%rs64, %temp;
}
	st.global.v4.u16 	[%rd9], {%rs64, %rs63, %rs62, %rs61};

BB5_101:
	bar.sync 	0;
	mad.lo.s32 	%r178, %r187, -32, %r16;
	add.s32 	%r173, %r178, -31;
	setp.gt.s32	%p80, %r173, 0;
	add.s32 	%r187, %r187, 1;
	@%p80 bra 	BB5_42;

BB5_102:
	ret;
}

.visible .entry HorizontalRecursiveGaussianRGBAF32_kernel(
	.param .u64 HorizontalRecursiveGaussianRGBAF32_kernel_param_0,
	.param .u32 HorizontalRecursiveGaussianRGBAF32_kernel_param_1,
	.param .u32 HorizontalRecursiveGaussianRGBAF32_kernel_param_2,
	.param .u32 HorizontalRecursiveGaussianRGBAF32_kernel_param_3,
	.param .u64 HorizontalRecursiveGaussianRGBAF32_kernel_param_4,
	.param .u32 HorizontalRecursiveGaussianRGBAF32_kernel_param_5,
	.param .u32 HorizontalRecursiveGaussianRGBAF32_kernel_param_6,
	.param .u32 HorizontalRecursiveGaussianRGBAF32_kernel_param_7,
	.param .u32 HorizontalRecursiveGaussianRGBAF32_kernel_param_8,
	.param .f32 HorizontalRecursiveGaussianRGBAF32_kernel_param_9,
	.param .f32 HorizontalRecursiveGaussianRGBAF32_kernel_param_10,
	.param .f32 HorizontalRecursiveGaussianRGBAF32_kernel_param_11,
	.param .f32 HorizontalRecursiveGaussianRGBAF32_kernel_param_12,
	.param .f32 HorizontalRecursiveGaussianRGBAF32_kernel_param_13,
	.param .f32 HorizontalRecursiveGaussianRGBAF32_kernel_param_14,
	.param .f32 HorizontalRecursiveGaussianRGBAF32_kernel_param_15,
	.param .f32 HorizontalRecursiveGaussianRGBAF32_kernel_param_16
)
{
	.reg .pred 	%p<81>;
	.reg .s32 	%r<182>;
	.reg .f32 	%f<505>;
	.reg .s64 	%rd<66>;
	// demoted variable
	.shared .align 4 .b8 HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem[4224];

	ld.param.u64 	%rd11, [HorizontalRecursiveGaussianRGBAF32_kernel_param_0];
	ld.param.u32 	%r31, [HorizontalRecursiveGaussianRGBAF32_kernel_param_1];
	ld.param.u32 	%r32, [HorizontalRecursiveGaussianRGBAF32_kernel_param_2];
	ld.param.u32 	%r33, [HorizontalRecursiveGaussianRGBAF32_kernel_param_3];
	ld.param.u64 	%rd12, [HorizontalRecursiveGaussianRGBAF32_kernel_param_4];
	ld.param.u32 	%r34, [HorizontalRecursiveGaussianRGBAF32_kernel_param_5];
	ld.param.u32 	%r35, [HorizontalRecursiveGaussianRGBAF32_kernel_param_6];
	ld.param.u32 	%r36, [HorizontalRecursiveGaussianRGBAF32_kernel_param_7];
	ld.param.u32 	%r37, [HorizontalRecursiveGaussianRGBAF32_kernel_param_8];
	ld.param.f32 	%f152, [HorizontalRecursiveGaussianRGBAF32_kernel_param_9];
	ld.param.f32 	%f153, [HorizontalRecursiveGaussianRGBAF32_kernel_param_10];
	ld.param.f32 	%f154, [HorizontalRecursiveGaussianRGBAF32_kernel_param_11];
	ld.param.f32 	%f155, [HorizontalRecursiveGaussianRGBAF32_kernel_param_12];
	ld.param.f32 	%f156, [HorizontalRecursiveGaussianRGBAF32_kernel_param_13];
	ld.param.f32 	%f157, [HorizontalRecursiveGaussianRGBAF32_kernel_param_14];
	ld.param.f32 	%f158, [HorizontalRecursiveGaussianRGBAF32_kernel_param_15];
	ld.param.f32 	%f159, [HorizontalRecursiveGaussianRGBAF32_kernel_param_16];
	mov.u32 	%r178, 0;
	setp.gt.s32	%p6, %r35, 0;
	@%p6 bra 	BB6_1;
	bra.uni 	BB6_40;

BB6_1:
	mov.f32 	%f472, 0f00000000;
	mov.f32 	%f471, %f472;
	mov.f32 	%f470, %f472;
	mov.u32 	%r176, %r178;

BB6_2:
	mov.u32 	%r174, %r176;
	mov.u32 	%r1, %r174;
	mov.u32 	%r41, %ctaid.y;
	shl.b32 	%r42, %r41, 3;
	mov.u32 	%r43, %tid.y;
	add.s32 	%r44, %r42, %r43;
	sub.s32 	%r45, %r36, %r33;
	shr.s32 	%r46, %r45, 1;
	sub.s32 	%r47, %r44, %r46;
	setp.lt.s32	%p7, %r47, %r33;
	mov.u32 	%r48, %tid.x;
	add.s32 	%r3, %r178, %r48;
	sub.s32 	%r49, %r35, %r32;
	shr.s32 	%r4, %r49, 1;
	setp.gt.s32	%p8, %r47, -1;
	and.pred  	%p1, %p8, %p7;
	setp.ge.s32	%p9, %r47, %r33;
	@%p9 bra 	BB6_16;

	sub.s32 	%r50, %r3, %r4;
	setp.gt.s32	%p10, %r50, -1;
	and.pred  	%p11, %p1, %p10;
	setp.lt.s32	%p12, %r50, %r32;
	and.pred  	%p13, %p11, %p12;
	@%p13 bra 	BB6_5;

	mov.f32 	%f462, 0f00000000;
	mov.f32 	%f461, %f462;
	mov.f32 	%f460, %f462;
	mov.f32 	%f459, %f462;
	bra.uni 	BB6_15;

BB6_5:
	cvta.to.global.u64 	%rd13, %rd11;
	mad.lo.s32 	%r59, %r47, %r31, %r50;
	mul.wide.s32 	%rd14, %r59, 16;
	add.s64 	%rd15, %rd13, %rd14;
	ld.global.v4.f32 	{%f167, %f168, %f169, %f170}, [%rd15];
	cvt.ftz.sat.f32.f32	%f462, %f170;
	setp.ltu.ftz.f32	%p14, %f167, 0f00000000;
	@%p14 bra 	BB6_7;

	lg2.approx.ftz.f32 	%f172, %f167;
	mul.ftz.f32 	%f173, %f172, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f456, %f173;
	bra.uni 	BB6_8;

BB6_7:
	neg.ftz.f32 	%f174, %f167;
	lg2.approx.ftz.f32 	%f175, %f174;
	mul.ftz.f32 	%f176, %f175, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f177, %f176;
	neg.ftz.f32 	%f456, %f177;

BB6_8:
	setp.ltu.ftz.f32	%p15, %f168, 0f00000000;
	@%p15 bra 	BB6_10;

	lg2.approx.ftz.f32 	%f178, %f168;
	mul.ftz.f32 	%f179, %f178, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f457, %f179;
	bra.uni 	BB6_11;

BB6_10:
	neg.ftz.f32 	%f180, %f168;
	lg2.approx.ftz.f32 	%f181, %f180;
	mul.ftz.f32 	%f182, %f181, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f183, %f182;
	neg.ftz.f32 	%f457, %f183;

BB6_11:
	setp.ltu.ftz.f32	%p16, %f169, 0f00000000;
	@%p16 bra 	BB6_13;

	lg2.approx.ftz.f32 	%f184, %f169;
	mul.ftz.f32 	%f185, %f184, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f458, %f185;
	bra.uni 	BB6_14;

BB6_13:
	neg.ftz.f32 	%f186, %f169;
	lg2.approx.ftz.f32 	%f187, %f186;
	mul.ftz.f32 	%f188, %f187, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f189, %f188;
	neg.ftz.f32 	%f458, %f189;

BB6_14:
	mul.ftz.f32 	%f461, %f458, %f462;
	mul.ftz.f32 	%f460, %f457, %f462;
	mul.ftz.f32 	%f459, %f456, %f462;

BB6_15:
	mad.lo.s32 	%r62, %r43, 33, %r48;
	mul.wide.s32 	%rd16, %r62, 4;
	mov.u64 	%rd17, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	add.s64 	%rd18, %rd17, %rd16;
	st.shared.f32 	[%rd18], %f459;
	st.shared.f32 	[%rd18+1056], %f460;
	st.shared.f32 	[%rd18+2112], %f461;
	st.shared.f32 	[%rd18+3168], %f462;

BB6_16:
	add.s32 	%r7, %r47, 4;
	setp.ge.s32	%p17, %r7, %r33;
	@%p17 bra 	BB6_30;

	sub.s32 	%r68, %r3, %r4;
	setp.gt.s32	%p18, %r68, -1;
	and.pred  	%p19, %p1, %p18;
	setp.lt.s32	%p20, %r68, %r32;
	and.pred  	%p21, %p19, %p20;
	@%p21 bra 	BB6_19;

	mov.f32 	%f469, 0f00000000;
	mov.f32 	%f468, %f469;
	mov.f32 	%f467, %f469;
	mov.f32 	%f466, %f469;
	bra.uni 	BB6_29;

BB6_19:
	mad.lo.s32 	%r72, %r47, %r31, %r68;
	shl.b32 	%r73, %r31, 2;
	add.s32 	%r74, %r72, %r73;
	cvta.to.global.u64 	%rd19, %rd11;
	mul.wide.s32 	%rd20, %r74, 16;
	add.s64 	%rd21, %rd19, %rd20;
	ld.global.v4.f32 	{%f194, %f195, %f196, %f197}, [%rd21];
	cvt.ftz.sat.f32.f32	%f469, %f197;
	setp.ltu.ftz.f32	%p22, %f194, 0f00000000;
	@%p22 bra 	BB6_21;

	lg2.approx.ftz.f32 	%f198, %f194;
	mul.ftz.f32 	%f199, %f198, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f463, %f199;
	bra.uni 	BB6_22;

BB6_21:
	neg.ftz.f32 	%f200, %f194;
	lg2.approx.ftz.f32 	%f201, %f200;
	mul.ftz.f32 	%f202, %f201, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f203, %f202;
	neg.ftz.f32 	%f463, %f203;

BB6_22:
	setp.ltu.ftz.f32	%p23, %f195, 0f00000000;
	@%p23 bra 	BB6_24;

	lg2.approx.ftz.f32 	%f204, %f195;
	mul.ftz.f32 	%f205, %f204, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f464, %f205;
	bra.uni 	BB6_25;

BB6_24:
	neg.ftz.f32 	%f206, %f195;
	lg2.approx.ftz.f32 	%f207, %f206;
	mul.ftz.f32 	%f208, %f207, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f209, %f208;
	neg.ftz.f32 	%f464, %f209;

BB6_25:
	setp.ltu.ftz.f32	%p24, %f196, 0f00000000;
	@%p24 bra 	BB6_27;

	lg2.approx.ftz.f32 	%f210, %f196;
	mul.ftz.f32 	%f211, %f210, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f465, %f211;
	bra.uni 	BB6_28;

BB6_27:
	neg.ftz.f32 	%f212, %f196;
	lg2.approx.ftz.f32 	%f213, %f212;
	mul.ftz.f32 	%f214, %f213, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f215, %f214;
	neg.ftz.f32 	%f465, %f215;

BB6_28:
	mul.ftz.f32 	%f468, %f465, %f469;
	mul.ftz.f32 	%f467, %f464, %f469;
	mul.ftz.f32 	%f466, %f463, %f469;

BB6_29:
	mad.lo.s32 	%r77, %r43, 33, %r48;
	mul.wide.s32 	%rd22, %r77, 4;
	mov.u64 	%rd23, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	add.s64 	%rd24, %rd23, %rd22;
	st.shared.f32 	[%rd24+528], %f466;
	st.shared.f32 	[%rd24+1584], %f467;
	st.shared.f32 	[%rd24+2640], %f468;
	st.shared.f32 	[%rd24+3696], %f469;

BB6_30:
	mad.lo.s32 	%r80, %r43, 16, %r48;
	mul.lo.s32 	%r81, %r80, 33;
	mul.wide.s32 	%rd25, %r81, 4;
	mov.u64 	%rd26, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	add.s64 	%rd64, %rd26, %rd25;
	shl.b32 	%r82, %r43, 5;
	add.s32 	%r83, %r82, %r48;
	setp.lt.s32	%p2, %r83, 32;
	bar.sync 	0;
	add.s64 	%rd65, %rd64, 16;
	@!%p2 bra 	BB6_33;
	bra.uni 	BB6_31;

BB6_31:
	mov.u32 	%r177, 0;
	mov.u32 	%r175, %r1;

BB6_32:
	mov.u32 	%r8, %r175;
	mov.u64 	%rd4, %rd65;
	setp.eq.s32	%p25, %r8, 0;
	setp.ne.s32	%p26, %r37, 0;
	and.pred  	%p27, %p25, %p26;
	ld.shared.f32 	%f216, [%rd64];
	mul.ftz.f32 	%f217, %f216, 0f3F000000;
	selp.f32	%f218, %f217, %f471, %p27;
	selp.f32	%f219, %f217, %f470, %p27;
	mul.ftz.f32 	%f220, %f472, %f153;
	fma.rn.ftz.f32 	%f221, %f216, %f152, %f220;
	fma.rn.ftz.f32 	%f222, %f218, %f154, %f221;
	fma.rn.ftz.f32 	%f223, %f219, %f155, %f222;
	st.shared.f32 	[%rd64], %f223;
	ld.shared.f32 	%f224, [%rd4+-12];
	mul.ftz.f32 	%f225, %f216, %f153;
	fma.rn.ftz.f32 	%f226, %f224, %f152, %f225;
	fma.rn.ftz.f32 	%f227, %f223, %f154, %f226;
	fma.rn.ftz.f32 	%f228, %f218, %f155, %f227;
	ld.shared.f32 	%f229, [%rd4+-8];
	ld.shared.f32 	%f230, [%rd4+-4];
	ld.shared.f32 	%f231, [%rd4];
	st.shared.f32 	[%rd4+-12], %f228;
	mul.ftz.f32 	%f232, %f224, %f153;
	fma.rn.ftz.f32 	%f233, %f229, %f152, %f232;
	fma.rn.ftz.f32 	%f234, %f228, %f154, %f233;
	fma.rn.ftz.f32 	%f235, %f223, %f155, %f234;
	st.shared.f32 	[%rd4+-8], %f235;
	mul.ftz.f32 	%f236, %f229, %f153;
	fma.rn.ftz.f32 	%f237, %f230, %f152, %f236;
	fma.rn.ftz.f32 	%f238, %f235, %f154, %f237;
	fma.rn.ftz.f32 	%f239, %f228, %f155, %f238;
	st.shared.f32 	[%rd4+-4], %f239;
	mul.ftz.f32 	%f240, %f230, %f153;
	fma.rn.ftz.f32 	%f241, %f231, %f152, %f240;
	fma.rn.ftz.f32 	%f242, %f239, %f154, %f241;
	fma.rn.ftz.f32 	%f243, %f235, %f155, %f242;
	st.shared.f32 	[%rd4], %f243;
	ld.shared.f32 	%f244, [%rd4+4];
	mul.ftz.f32 	%f245, %f231, %f153;
	fma.rn.ftz.f32 	%f246, %f244, %f152, %f245;
	fma.rn.ftz.f32 	%f247, %f243, %f154, %f246;
	fma.rn.ftz.f32 	%f248, %f239, %f155, %f247;
	ld.shared.f32 	%f249, [%rd4+8];
	ld.shared.f32 	%f472, [%rd4+12];
	st.shared.f32 	[%rd4+4], %f248;
	mul.ftz.f32 	%f250, %f244, %f153;
	fma.rn.ftz.f32 	%f251, %f249, %f152, %f250;
	fma.rn.ftz.f32 	%f252, %f248, %f154, %f251;
	fma.rn.ftz.f32 	%f470, %f243, %f155, %f252;
	st.shared.f32 	[%rd4+8], %f470;
	mul.ftz.f32 	%f253, %f249, %f153;
	fma.rn.ftz.f32 	%f254, %f472, %f152, %f253;
	fma.rn.ftz.f32 	%f255, %f470, %f154, %f254;
	fma.rn.ftz.f32 	%f471, %f248, %f155, %f255;
	st.shared.f32 	[%rd4+12], %f471;
	add.s32 	%r10, %r8, -8;
	add.s64 	%rd65, %rd4, 32;
	add.s32 	%r177, %r177, 32;
	add.s64 	%rd64, %rd4, 16;
	setp.ne.s32	%p28, %r177, 128;
	mov.u32 	%r175, %r10;
	@%p28 bra 	BB6_32;

BB6_33:
	bar.sync 	0;
	mov.u32 	%r173, %ctaid.y;
	shl.b32 	%r172, %r173, 3;
	add.s32 	%r171, %r172, %r43;
	mad.lo.s32 	%r12, %r171, %r34, %r3;
	@%p9 bra 	BB6_36;

	setp.ge.s32	%p30, %r3, %r35;
	@%p30 bra 	BB6_36;

	mov.u64 	%rd63, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	mad.lo.s32 	%r87, %r43, 33, %r48;
	mul.wide.s32 	%rd27, %r87, 4;
	add.s64 	%rd29, %rd63, %rd27;
	cvta.to.global.u64 	%rd30, %rd12;
	mul.wide.s32 	%rd31, %r12, 16;
	add.s64 	%rd32, %rd30, %rd31;
	ld.shared.f32 	%f256, [%rd29+3168];
	ld.shared.f32 	%f257, [%rd29+2112];
	ld.shared.f32 	%f258, [%rd29+1056];
	ld.shared.f32 	%f259, [%rd29];
	st.global.v4.f32 	[%rd32], {%f259, %f258, %f257, %f256};

BB6_36:
	@%p17 bra 	BB6_39;

	setp.ge.s32	%p32, %r3, %r35;
	@%p32 bra 	BB6_39;

	mov.u64 	%rd62, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	shl.b32 	%r88, %r34, 2;
	add.s32 	%r89, %r12, %r88;
	mad.lo.s32 	%r92, %r43, 33, %r48;
	mul.wide.s32 	%rd33, %r92, 4;
	add.s64 	%rd35, %rd62, %rd33;
	cvta.to.global.u64 	%rd36, %rd12;
	mul.wide.s32 	%rd37, %r89, 16;
	add.s64 	%rd38, %rd36, %rd37;
	ld.shared.f32 	%f260, [%rd35+3696];
	ld.shared.f32 	%f261, [%rd35+2640];
	ld.shared.f32 	%f262, [%rd35+1584];
	ld.shared.f32 	%f263, [%rd35+528];
	st.global.v4.f32 	[%rd38], {%f263, %f262, %f261, %f260};

BB6_39:
	bar.sync 	0;
	add.s32 	%r178, %r178, 32;
	setp.lt.s32	%p33, %r178, %r35;
	add.s32 	%r176, %r1, -32;
	@%p33 bra 	BB6_2;

BB6_40:
	setp.lt.s32	%p34, %r178, 1;
	@%p34 bra 	BB6_102;

	add.s32 	%r16, %r178, -1;
	mov.f32 	%f490, 0f00000000;
	mov.f32 	%f489, %f490;
	mov.f32 	%f488, %f490;
	mov.f32 	%f487, %f490;
	mov.u32 	%r179, 0;

BB6_42:
	mov.u32 	%r94, %ctaid.y;
	shl.b32 	%r95, %r94, 3;
	mov.u32 	%r96, %tid.y;
	add.s32 	%r97, %r95, %r96;
	sub.s32 	%r98, %r36, %r33;
	shr.s32 	%r99, %r98, 1;
	sub.s32 	%r100, %r97, %r99;
	setp.lt.s32	%p35, %r100, %r33;
	mad.lo.s32 	%r18, %r179, -32, %r16;
	mov.u32 	%r101, %tid.x;
	add.s32 	%r102, %r18, %r101;
	add.s32 	%r19, %r102, -31;
	sub.s32 	%r103, %r35, %r32;
	shr.s32 	%r104, %r103, 1;
	sub.s32 	%r105, %r19, %r104;
	mad.lo.s32 	%r20, %r100, %r31, %r105;
	setp.gt.s32	%p36, %r105, -1;
	setp.gt.s32	%p37, %r100, -1;
	and.pred  	%p38, %p37, %p35;
	and.pred  	%p39, %p38, %p36;
	setp.lt.s32	%p40, %r105, %r32;
	and.pred  	%p3, %p39, %p40;
	setp.ge.s32	%p41, %r100, %r33;
	@%p41 bra 	BB6_56;

	@%p3 bra 	BB6_45;

	mov.f32 	%f479, 0f00000000;
	mov.f32 	%f478, %f479;
	mov.f32 	%f477, %f479;
	mov.f32 	%f476, %f479;
	bra.uni 	BB6_55;

BB6_45:
	cvta.to.global.u64 	%rd39, %rd11;
	mul.wide.s32 	%rd40, %r20, 16;
	add.s64 	%rd41, %rd39, %rd40;
	ld.global.v4.f32 	{%f272, %f273, %f274, %f275}, [%rd41];
	cvt.ftz.sat.f32.f32	%f479, %f275;
	setp.ltu.ftz.f32	%p42, %f272, 0f00000000;
	@%p42 bra 	BB6_47;

	lg2.approx.ftz.f32 	%f277, %f272;
	mul.ftz.f32 	%f278, %f277, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f473, %f278;
	bra.uni 	BB6_48;

BB6_47:
	neg.ftz.f32 	%f279, %f272;
	lg2.approx.ftz.f32 	%f280, %f279;
	mul.ftz.f32 	%f281, %f280, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f282, %f281;
	neg.ftz.f32 	%f473, %f282;

BB6_48:
	setp.ltu.ftz.f32	%p43, %f273, 0f00000000;
	@%p43 bra 	BB6_50;

	lg2.approx.ftz.f32 	%f283, %f273;
	mul.ftz.f32 	%f284, %f283, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f474, %f284;
	bra.uni 	BB6_51;

BB6_50:
	neg.ftz.f32 	%f285, %f273;
	lg2.approx.ftz.f32 	%f286, %f285;
	mul.ftz.f32 	%f287, %f286, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f288, %f287;
	neg.ftz.f32 	%f474, %f288;

BB6_51:
	setp.ltu.ftz.f32	%p44, %f274, 0f00000000;
	@%p44 bra 	BB6_53;

	lg2.approx.ftz.f32 	%f289, %f274;
	mul.ftz.f32 	%f290, %f289, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f475, %f290;
	bra.uni 	BB6_54;

BB6_53:
	neg.ftz.f32 	%f291, %f274;
	lg2.approx.ftz.f32 	%f292, %f291;
	mul.ftz.f32 	%f293, %f292, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f294, %f293;
	neg.ftz.f32 	%f475, %f294;

BB6_54:
	mul.ftz.f32 	%f478, %f475, %f479;
	mul.ftz.f32 	%f477, %f474, %f479;
	mul.ftz.f32 	%f476, %f473, %f479;

BB6_55:
	mad.lo.s32 	%r108, %r96, 33, %r101;
	mul.wide.s32 	%rd42, %r108, 4;
	mov.u64 	%rd43, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	add.s64 	%rd44, %rd43, %rd42;
	st.shared.f32 	[%rd44], %f476;
	st.shared.f32 	[%rd44+1056], %f477;
	st.shared.f32 	[%rd44+2112], %f478;
	st.shared.f32 	[%rd44+3168], %f479;

BB6_56:
	add.s32 	%r116, %r100, 4;
	setp.ge.s32	%p45, %r116, %r33;
	@%p45 bra 	BB6_70;

	@%p3 bra 	BB6_59;

	mov.f32 	%f486, 0f00000000;
	mov.f32 	%f485, %f486;
	mov.f32 	%f484, %f486;
	mov.f32 	%f483, %f486;
	bra.uni 	BB6_69;

BB6_59:
	shl.b32 	%r117, %r31, 2;
	add.s32 	%r118, %r20, %r117;
	cvta.to.global.u64 	%rd45, %rd11;
	mul.wide.s32 	%rd46, %r118, 16;
	add.s64 	%rd47, %rd45, %rd46;
	ld.global.v4.f32 	{%f299, %f300, %f301, %f302}, [%rd47];
	cvt.ftz.sat.f32.f32	%f486, %f302;
	setp.ltu.ftz.f32	%p46, %f299, 0f00000000;
	@%p46 bra 	BB6_61;

	lg2.approx.ftz.f32 	%f304, %f299;
	mul.ftz.f32 	%f305, %f304, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f480, %f305;
	bra.uni 	BB6_62;

BB6_61:
	neg.ftz.f32 	%f306, %f299;
	lg2.approx.ftz.f32 	%f307, %f306;
	mul.ftz.f32 	%f308, %f307, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f309, %f308;
	neg.ftz.f32 	%f480, %f309;

BB6_62:
	setp.ltu.ftz.f32	%p47, %f300, 0f00000000;
	@%p47 bra 	BB6_64;

	lg2.approx.ftz.f32 	%f310, %f300;
	mul.ftz.f32 	%f311, %f310, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f481, %f311;
	bra.uni 	BB6_65;

BB6_64:
	neg.ftz.f32 	%f312, %f300;
	lg2.approx.ftz.f32 	%f313, %f312;
	mul.ftz.f32 	%f314, %f313, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f315, %f314;
	neg.ftz.f32 	%f481, %f315;

BB6_65:
	setp.ltu.ftz.f32	%p48, %f301, 0f00000000;
	@%p48 bra 	BB6_67;

	lg2.approx.ftz.f32 	%f316, %f301;
	mul.ftz.f32 	%f317, %f316, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f482, %f317;
	bra.uni 	BB6_68;

BB6_67:
	neg.ftz.f32 	%f318, %f301;
	lg2.approx.ftz.f32 	%f319, %f318;
	mul.ftz.f32 	%f320, %f319, 0f400CCCCD;
	ex2.approx.ftz.f32 	%f321, %f320;
	neg.ftz.f32 	%f482, %f321;

BB6_68:
	mul.ftz.f32 	%f485, %f482, %f486;
	mul.ftz.f32 	%f484, %f481, %f486;
	mul.ftz.f32 	%f483, %f480, %f486;

BB6_69:
	mad.lo.s32 	%r121, %r96, 33, %r101;
	mul.wide.s32 	%rd48, %r121, 4;
	mov.u64 	%rd49, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	add.s64 	%rd50, %rd49, %rd48;
	st.shared.f32 	[%rd50+528], %f483;
	st.shared.f32 	[%rd50+1584], %f484;
	st.shared.f32 	[%rd50+2640], %f485;
	st.shared.f32 	[%rd50+3696], %f486;

BB6_70:
	shl.b32 	%r122, %r96, 5;
	add.s32 	%r123, %r122, %r101;
	setp.lt.s32	%p4, %r123, 32;
	bar.sync 	0;
	shl.b32 	%r124, %r96, 4;
	add.s32 	%r125, %r124, %r101;
	mad.lo.s32 	%r181, %r125, 33, 31;
	@!%p4 bra 	BB6_73;
	bra.uni 	BB6_71;

BB6_71:
	mov.u32 	%r180, 0;

BB6_72:
	mad.lo.s32 	%r166, %r179, -32, %r16;
	mul.wide.s32 	%rd51, %r181, 4;
	mov.u64 	%rd52, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	add.s64 	%rd53, %rd52, %rd51;
	add.s32 	%r127, %r35, -1;
	sub.s32 	%r128, %r166, %r180;
	setp.eq.s32	%p49, %r128, %r127;
	setp.ne.s32	%p50, %r37, 0;
	and.pred  	%p51, %p49, %p50;
	ld.shared.f32 	%f322, [%rd53];
	mul.ftz.f32 	%f323, %f322, 0f3F000000;
	selp.f32	%f324, %f323, %f488, %p51;
	selp.f32	%f325, %f323, %f487, %p51;
	mul.ftz.f32 	%f326, %f489, %f157;
	fma.rn.ftz.f32 	%f327, %f490, %f156, %f326;
	fma.rn.ftz.f32 	%f328, %f324, %f158, %f327;
	fma.rn.ftz.f32 	%f329, %f325, %f159, %f328;
	ld.shared.f32 	%f330, [%rd53+-4];
	ld.shared.f32 	%f331, [%rd53+-8];
	ld.shared.f32 	%f332, [%rd53+-12];
	st.shared.f32 	[%rd53], %f329;
	not.b32 	%r129, %r180;
	add.s32 	%r130, %r166, %r129;
	setp.eq.s32	%p52, %r130, %r127;
	and.pred  	%p53, %p52, %p50;
	mul.ftz.f32 	%f333, %f330, 0f3F000000;
	selp.f32	%f334, %f333, %f329, %p53;
	selp.f32	%f335, %f333, %f324, %p53;
	mul.ftz.f32 	%f336, %f490, %f157;
	fma.rn.ftz.f32 	%f337, %f322, %f156, %f336;
	fma.rn.ftz.f32 	%f338, %f334, %f158, %f337;
	fma.rn.ftz.f32 	%f339, %f335, %f159, %f338;
	st.shared.f32 	[%rd53+-4], %f339;
	mov.u32 	%r131, -2;
	sub.s32 	%r132, %r131, %r180;
	add.s32 	%r133, %r166, %r132;
	setp.eq.s32	%p54, %r133, %r127;
	and.pred  	%p55, %p54, %p50;
	mul.ftz.f32 	%f340, %f331, 0f3F000000;
	selp.f32	%f341, %f340, %f339, %p55;
	selp.f32	%f342, %f340, %f334, %p55;
	mul.ftz.f32 	%f343, %f322, %f157;
	fma.rn.ftz.f32 	%f344, %f330, %f156, %f343;
	fma.rn.ftz.f32 	%f345, %f341, %f158, %f344;
	fma.rn.ftz.f32 	%f346, %f342, %f159, %f345;
	st.shared.f32 	[%rd53+-8], %f346;
	mov.u32 	%r134, -3;
	sub.s32 	%r135, %r134, %r180;
	add.s32 	%r136, %r166, %r135;
	setp.eq.s32	%p56, %r136, %r127;
	and.pred  	%p57, %p56, %p50;
	mul.ftz.f32 	%f347, %f332, 0f3F000000;
	selp.f32	%f348, %f347, %f346, %p57;
	selp.f32	%f349, %f347, %f341, %p57;
	mul.ftz.f32 	%f350, %f330, %f157;
	fma.rn.ftz.f32 	%f351, %f331, %f156, %f350;
	fma.rn.ftz.f32 	%f352, %f348, %f158, %f351;
	fma.rn.ftz.f32 	%f353, %f349, %f159, %f352;
	st.shared.f32 	[%rd53+-12], %f353;
	mov.u32 	%r137, -4;
	sub.s32 	%r138, %r137, %r180;
	add.s32 	%r139, %r166, %r138;
	setp.eq.s32	%p58, %r139, %r127;
	and.pred  	%p59, %p58, %p50;
	ld.shared.f32 	%f354, [%rd53+-16];
	mul.ftz.f32 	%f355, %f354, 0f3F000000;
	selp.f32	%f356, %f355, %f353, %p59;
	selp.f32	%f357, %f355, %f348, %p59;
	mul.ftz.f32 	%f358, %f331, %f157;
	fma.rn.ftz.f32 	%f359, %f332, %f156, %f358;
	fma.rn.ftz.f32 	%f360, %f356, %f158, %f359;
	fma.rn.ftz.f32 	%f361, %f357, %f159, %f360;
	ld.shared.f32 	%f362, [%rd53+-20];
	ld.shared.f32 	%f489, [%rd53+-24];
	ld.shared.f32 	%f490, [%rd53+-28];
	st.shared.f32 	[%rd53+-16], %f361;
	mov.u32 	%r140, -5;
	sub.s32 	%r141, %r140, %r180;
	add.s32 	%r142, %r166, %r141;
	setp.eq.s32	%p60, %r142, %r127;
	and.pred  	%p61, %p60, %p50;
	mul.ftz.f32 	%f363, %f362, 0f3F000000;
	selp.f32	%f364, %f363, %f361, %p61;
	selp.f32	%f365, %f363, %f356, %p61;
	mul.ftz.f32 	%f366, %f332, %f157;
	fma.rn.ftz.f32 	%f367, %f354, %f156, %f366;
	fma.rn.ftz.f32 	%f368, %f364, %f158, %f367;
	fma.rn.ftz.f32 	%f369, %f365, %f159, %f368;
	st.shared.f32 	[%rd53+-20], %f369;
	mov.u32 	%r143, -6;
	sub.s32 	%r144, %r143, %r180;
	add.s32 	%r145, %r166, %r144;
	setp.eq.s32	%p62, %r145, %r127;
	and.pred  	%p63, %p62, %p50;
	mul.ftz.f32 	%f370, %f489, 0f3F000000;
	selp.f32	%f371, %f370, %f369, %p63;
	selp.f32	%f372, %f370, %f364, %p63;
	mul.ftz.f32 	%f373, %f354, %f157;
	fma.rn.ftz.f32 	%f374, %f362, %f156, %f373;
	fma.rn.ftz.f32 	%f375, %f371, %f158, %f374;
	fma.rn.ftz.f32 	%f376, %f372, %f159, %f375;
	st.shared.f32 	[%rd53+-24], %f376;
	mov.u32 	%r146, -7;
	sub.s32 	%r147, %r146, %r180;
	add.s32 	%r148, %r166, %r147;
	setp.eq.s32	%p64, %r148, %r127;
	and.pred  	%p65, %p64, %p50;
	mul.ftz.f32 	%f377, %f490, 0f3F000000;
	selp.f32	%f487, %f377, %f376, %p65;
	selp.f32	%f378, %f377, %f371, %p65;
	mul.ftz.f32 	%f379, %f362, %f157;
	fma.rn.ftz.f32 	%f380, %f489, %f156, %f379;
	fma.rn.ftz.f32 	%f381, %f487, %f158, %f380;
	fma.rn.ftz.f32 	%f488, %f378, %f159, %f381;
	st.shared.f32 	[%rd53+-28], %f488;
	add.s32 	%r181, %r181, -8;
	add.s32 	%r180, %r180, 8;
	setp.ne.s32	%p66, %r180, 32;
	@%p66 bra 	BB6_72;

BB6_73:
	setp.lt.s32	%p5, %r97, %r36;
	bar.sync 	0;
	mad.lo.s32 	%r169, %r179, -32, %r16;
	add.s32 	%r168, %r169, %r101;
	add.s32 	%r167, %r168, -31;
	mad.lo.s32 	%r29, %r97, %r34, %r167;
	setp.lt.s32	%p67, %r167, %r35;
	and.pred  	%p68, %p5, %p67;
	@!%p68 bra 	BB6_87;
	bra.uni 	BB6_74;

BB6_74:
	cvta.to.global.u64 	%rd54, %rd12;
	mul.wide.s32 	%rd55, %r29, 16;
	add.s64 	%rd7, %rd54, %rd55;
	mad.lo.s32 	%r154, %r96, 33, %r101;
	mul.wide.s32 	%rd56, %r154, 4;
	mov.u64 	%rd57, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	add.s64 	%rd8, %rd57, %rd56;
	ld.global.v4.f32 	{%f382, %f383, %f384, %f385}, [%rd7];
	ld.shared.f32 	%f386, [%rd8+3168];
	add.ftz.f32 	%f387, %f385, %f386;
	cvt.ftz.sat.f32.f32	%f491, %f387;
	add.ftz.f32 	%f388, %f491, 0fB70637BD;
	setp.gtu.ftz.f32	%p69, %f388, 0f00000000;
	@%p69 bra 	BB6_76;

	mov.f32 	%f494, 0f00000000;
	mov.f32 	%f493, %f494;
	mov.f32 	%f492, %f494;
	mov.f32 	%f491, %f494;
	bra.uni 	BB6_77;

BB6_76:
	ld.shared.f32 	%f393, [%rd8];
	add.ftz.f32 	%f394, %f382, %f393;
	ld.shared.f32 	%f395, [%rd8+1056];
	add.ftz.f32 	%f396, %f383, %f395;
	ld.shared.f32 	%f397, [%rd8+2112];
	add.ftz.f32 	%f398, %f384, %f397;
	mov.f32 	%f399, 0f3F800000;
	div.approx.ftz.f32 	%f400, %f399, %f491;
	mul.ftz.f32 	%f492, %f398, %f400;
	mul.ftz.f32 	%f493, %f396, %f400;
	mul.ftz.f32 	%f494, %f394, %f400;

BB6_77:
	setp.ltu.ftz.f32	%p70, %f494, 0f00000000;
	@%p70 bra 	BB6_79;

	lg2.approx.ftz.f32 	%f401, %f494;
	mul.ftz.f32 	%f402, %f401, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f495, %f402;
	bra.uni 	BB6_80;

BB6_79:
	neg.ftz.f32 	%f403, %f494;
	lg2.approx.ftz.f32 	%f404, %f403;
	mul.ftz.f32 	%f405, %f404, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f406, %f405;
	neg.ftz.f32 	%f495, %f406;

BB6_80:
	setp.ltu.ftz.f32	%p71, %f493, 0f00000000;
	@%p71 bra 	BB6_82;

	lg2.approx.ftz.f32 	%f407, %f493;
	mul.ftz.f32 	%f408, %f407, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f496, %f408;
	bra.uni 	BB6_83;

BB6_82:
	neg.ftz.f32 	%f409, %f493;
	lg2.approx.ftz.f32 	%f410, %f409;
	mul.ftz.f32 	%f411, %f410, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f412, %f411;
	neg.ftz.f32 	%f496, %f412;

BB6_83:
	setp.ltu.ftz.f32	%p72, %f492, 0f00000000;
	@%p72 bra 	BB6_85;

	lg2.approx.ftz.f32 	%f413, %f492;
	mul.ftz.f32 	%f414, %f413, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f497, %f414;
	bra.uni 	BB6_86;

BB6_85:
	neg.ftz.f32 	%f415, %f492;
	lg2.approx.ftz.f32 	%f416, %f415;
	mul.ftz.f32 	%f417, %f416, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f418, %f417;
	neg.ftz.f32 	%f497, %f418;

BB6_86:
	st.global.v4.f32 	[%rd7], {%f495, %f496, %f497, %f491};

BB6_87:
	add.s32 	%r159, %r97, 4;
	setp.lt.s32	%p74, %r159, %r36;
	and.pred  	%p75, %p74, %p67;
	@!%p75 bra 	BB6_101;
	bra.uni 	BB6_88;

BB6_88:
	shl.b32 	%r160, %r34, 2;
	add.s32 	%r161, %r29, %r160;
	cvta.to.global.u64 	%rd58, %rd12;
	mul.wide.s32 	%rd59, %r161, 16;
	add.s64 	%rd9, %rd58, %rd59;
	mad.lo.s32 	%r164, %r96, 33, %r101;
	mul.wide.s32 	%rd60, %r164, 4;
	mov.u64 	%rd61, HorizontalRecursiveGaussianRGBAF32_kernel$__cuda_local_var_180358_10844_non_const_smem;
	add.s64 	%rd10, %rd61, %rd60;
	ld.global.v4.f32 	{%f419, %f420, %f421, %f422}, [%rd9];
	ld.shared.f32 	%f423, [%rd10+3696];
	add.ftz.f32 	%f424, %f422, %f423;
	cvt.ftz.sat.f32.f32	%f498, %f424;
	add.ftz.f32 	%f425, %f498, 0fB70637BD;
	setp.gtu.ftz.f32	%p76, %f425, 0f00000000;
	@%p76 bra 	BB6_90;

	mov.f32 	%f501, 0f00000000;
	mov.f32 	%f500, %f501;
	mov.f32 	%f499, %f501;
	mov.f32 	%f498, %f501;
	bra.uni 	BB6_91;

BB6_90:
	ld.shared.f32 	%f430, [%rd10+528];
	add.ftz.f32 	%f431, %f419, %f430;
	ld.shared.f32 	%f432, [%rd10+1584];
	add.ftz.f32 	%f433, %f420, %f432;
	ld.shared.f32 	%f434, [%rd10+2640];
	add.ftz.f32 	%f435, %f421, %f434;
	mov.f32 	%f436, 0f3F800000;
	div.approx.ftz.f32 	%f437, %f436, %f498;
	mul.ftz.f32 	%f499, %f435, %f437;
	mul.ftz.f32 	%f500, %f433, %f437;
	mul.ftz.f32 	%f501, %f431, %f437;

BB6_91:
	setp.ltu.ftz.f32	%p77, %f501, 0f00000000;
	@%p77 bra 	BB6_93;

	lg2.approx.ftz.f32 	%f438, %f501;
	mul.ftz.f32 	%f439, %f438, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f502, %f439;
	bra.uni 	BB6_94;

BB6_93:
	neg.ftz.f32 	%f440, %f501;
	lg2.approx.ftz.f32 	%f441, %f440;
	mul.ftz.f32 	%f442, %f441, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f443, %f442;
	neg.ftz.f32 	%f502, %f443;

BB6_94:
	setp.ltu.ftz.f32	%p78, %f500, 0f00000000;
	@%p78 bra 	BB6_96;

	lg2.approx.ftz.f32 	%f444, %f500;
	mul.ftz.f32 	%f445, %f444, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f503, %f445;
	bra.uni 	BB6_97;

BB6_96:
	neg.ftz.f32 	%f446, %f500;
	lg2.approx.ftz.f32 	%f447, %f446;
	mul.ftz.f32 	%f448, %f447, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f449, %f448;
	neg.ftz.f32 	%f503, %f449;

BB6_97:
	setp.ltu.ftz.f32	%p79, %f499, 0f00000000;
	@%p79 bra 	BB6_99;

	lg2.approx.ftz.f32 	%f450, %f499;
	mul.ftz.f32 	%f451, %f450, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f504, %f451;
	bra.uni 	BB6_100;

BB6_99:
	neg.ftz.f32 	%f452, %f499;
	lg2.approx.ftz.f32 	%f453, %f452;
	mul.ftz.f32 	%f454, %f453, 0f3EE8BA2E;
	ex2.approx.ftz.f32 	%f455, %f454;
	neg.ftz.f32 	%f504, %f455;

BB6_100:
	st.global.v4.f32 	[%rd9], {%f502, %f503, %f504, %f498};

BB6_101:
	bar.sync 	0;
	mad.lo.s32 	%r170, %r179, -32, %r16;
	add.s32 	%r165, %r170, -31;
	setp.gt.s32	%p80, %r165, 0;
	add.s32 	%r179, %r179, 1;
	@%p80 bra 	BB6_42;

BB6_102:
	ret;
}


