//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Fri Jul 25 04:36:16 2014 (1406288176)
// Cuda compilation tools, release 6.5, V6.5.13
//

.version 4.1
.target sm_30
.address_size 64

.global .texref texture0_RECT;
// ShaderKernel_fxOutline$__cuda_local_var_180673_469_non_const_p_local has been demoted

.visible .entry ShaderKernel_fxOutline(
	.param .u64 ShaderKernel_fxOutline_param_0,
	.param .u32 ShaderKernel_fxOutline_param_1,
	.param .u32 ShaderKernel_fxOutline_param_2,
	.param .u32 ShaderKernel_fxOutline_param_3,
	.param .u32 ShaderKernel_fxOutline_param_4,
	.param .u64 ShaderKernel_fxOutline_param_5,
	.param .u64 ShaderKernel_fxOutline_param_6
)
{
	.reg .pred 	%p<7>;
	.reg .s16 	%rs<5>;
	.reg .s32 	%r<14>;
	.reg .f32 	%f<116>;
	.reg .s64 	%rd<28>;
	// demoted variable
	.shared .align 16 .b8 ShaderKernel_fxOutline$__cuda_local_var_180673_469_non_const_p_local[16];

	ld.param.u64 	%rd4, [ShaderKernel_fxOutline_param_0];
	ld.param.u32 	%r4, [ShaderKernel_fxOutline_param_1];
	ld.param.u32 	%r5, [ShaderKernel_fxOutline_param_2];
	ld.param.u32 	%r6, [ShaderKernel_fxOutline_param_3];
	ld.param.u32 	%r7, [ShaderKernel_fxOutline_param_4];
	ld.param.u64 	%rd3, [ShaderKernel_fxOutline_param_5];
	cvta.to.global.u64 	%rd1, %rd4;
	mov.u32 	%r8, %ntid.x;
	mov.u32 	%r9, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r8, %r9, %r1;
	mov.u32 	%r10, %ntid.y;
	mov.u32 	%r11, %ctaid.y;
	mov.u32 	%r12, %tid.y;
	mad.lo.s32 	%r3, %r10, %r11, %r12;
	setp.lt.s32	%p1, %r2, %r6;
	setp.lt.s32	%p2, %r3, %r7;
	and.pred  	%p3, %p1, %p2;
	@!%p3 bra 	BB0_6;
	bra.uni 	BB0_1;

BB0_1:
	setp.ne.s32	%p4, %r1, 0;
	@%p4 bra 	BB0_3;

	cvta.to.global.u64 	%rd5, %rd3;
	ld.global.v4.f32 	{%f7, %f8, %f9, %f10}, [%rd5];
	st.shared.v4.f32 	[ShaderKernel_fxOutline$__cuda_local_var_180673_469_non_const_p_local], {%f7, %f8, %f9, %f10};

BB0_3:
	cvt.rn.f32.s32	%f15, %r2;
	add.ftz.f32 	%f1, %f15, 0f3F000000;
	cvt.rn.f32.s32	%f16, %r3;
	add.ftz.f32 	%f2, %f16, 0f3F000000;
	bar.sync 	0;
	add.ftz.f32 	%f63, %f1, 0f3F800000;
	mov.f32 	%f71, 0f3F800000;
	add.ftz.f32 	%f40, %f2, 0fBF800000;
	// inline asm
	tex.2d.v4.f32.f32 {%f17, %f18, %f19, %f20}, [texture0_RECT, {%f63, %f40}];
	// inline asm
	add.ftz.f32 	%f58, %f2, 0f3F800000;
	add.ftz.f32 	%f45, %f1, 0fBF800000;
	// inline asm
	tex.2d.v4.f32.f32 {%f23, %f24, %f25, %f26}, [texture0_RECT, {%f45, %f58}];
	// inline asm
	sub.ftz.f32 	%f72, %f19, %f25;
	sub.ftz.f32 	%f73, %f18, %f24;
	sub.ftz.f32 	%f74, %f17, %f23;
	// inline asm
	tex.2d.v4.f32.f32 {%f29, %f30, %f31, %f32}, [texture0_RECT, {%f45, %f40}];
	// inline asm
	sub.ftz.f32 	%f75, %f72, %f31;
	sub.ftz.f32 	%f76, %f73, %f30;
	sub.ftz.f32 	%f77, %f74, %f29;
	add.ftz.f32 	%f78, %f31, %f72;
	add.ftz.f32 	%f79, %f30, %f73;
	add.ftz.f32 	%f80, %f29, %f74;
	add.ftz.f32 	%f51, %f1, 0f00000000;
	// inline asm
	tex.2d.v4.f32.f32 {%f35, %f36, %f37, %f38}, [texture0_RECT, {%f51, %f40}];
	// inline asm
	fma.rn.ftz.f32 	%f81, %f37, 0f40000000, %f78;
	fma.rn.ftz.f32 	%f82, %f36, 0f40000000, %f79;
	fma.rn.ftz.f32 	%f83, %f35, 0f40000000, %f80;
	add.ftz.f32 	%f64, %f2, 0f00000000;
	// inline asm
	tex.2d.v4.f32.f32 {%f41, %f42, %f43, %f44}, [texture0_RECT, {%f45, %f64}];
	// inline asm
	fma.rn.ftz.f32 	%f84, %f43, 0fC0000000, %f75;
	fma.rn.ftz.f32 	%f85, %f42, 0fC0000000, %f76;
	fma.rn.ftz.f32 	%f86, %f41, 0fC0000000, %f77;
	// inline asm
	tex.2d.v4.f32.f32 {%f47, %f48, %f49, %f50}, [texture0_RECT, {%f51, %f58}];
	// inline asm
	fma.rn.ftz.f32 	%f87, %f49, 0fC0000000, %f81;
	fma.rn.ftz.f32 	%f88, %f48, 0fC0000000, %f82;
	fma.rn.ftz.f32 	%f89, %f47, 0fC0000000, %f83;
	// inline asm
	tex.2d.v4.f32.f32 {%f53, %f54, %f55, %f56}, [texture0_RECT, {%f63, %f58}];
	// inline asm
	sub.ftz.f32 	%f90, %f87, %f55;
	sub.ftz.f32 	%f91, %f88, %f54;
	sub.ftz.f32 	%f92, %f89, %f53;
	add.ftz.f32 	%f93, %f55, %f84;
	add.ftz.f32 	%f94, %f54, %f85;
	add.ftz.f32 	%f95, %f53, %f86;
	// inline asm
	tex.2d.v4.f32.f32 {%f59, %f60, %f61, %f62}, [texture0_RECT, {%f63, %f64}];
	// inline asm
	fma.rn.ftz.f32 	%f96, %f61, 0f40000000, %f93;
	fma.rn.ftz.f32 	%f97, %f60, 0f40000000, %f94;
	fma.rn.ftz.f32 	%f98, %f59, 0f40000000, %f95;
	mul.ftz.f32 	%f99, %f96, %f96;
	mul.ftz.f32 	%f100, %f97, %f97;
	mul.ftz.f32 	%f101, %f98, %f98;
	fma.rn.ftz.f32 	%f102, %f90, %f90, %f99;
	fma.rn.ftz.f32 	%f103, %f91, %f91, %f100;
	fma.rn.ftz.f32 	%f104, %f92, %f92, %f101;
	add.ftz.f32 	%f105, %f102, %f103;
	add.ftz.f32 	%f106, %f105, %f104;
	cvt.ftz.sat.f32.f32	%f107, %f106;
	setp.gt.ftz.f32	%p5, %f107, 0f322BCC77;
	selp.f32	%f108, %f107, 0f322BCC77, %p5;
	rsqrt.approx.ftz.f32 	%f109, %f108;
	mul.ftz.f32 	%f110, %f109, %f108;
	cvt.ftz.sat.f32.f32	%f111, %f110;
	ld.shared.f32 	%f112, [ShaderKernel_fxOutline$__cuda_local_var_180673_469_non_const_p_local];
	mul.ftz.f32 	%f113, %f111, %f112;
	cvt.rmi.ftz.f32.f32	%f114, %f113;
	sub.ftz.f32 	%f115, %f71, %f114;
	// inline asm
	tex.2d.v4.f32.f32 {%f65, %f66, %f67, %f68}, [texture0_RECT, {%f1, %f2}];
	// inline asm
	mul.ftz.f32 	%f3, %f115, %f67;
	mul.ftz.f32 	%f4, %f115, %f66;
	mul.ftz.f32 	%f5, %f115, %f65;
	mad.lo.s32 	%r13, %r3, %r4, %r2;
	cvt.s64.s32	%rd2, %r13;
	setp.eq.s32	%p6, %r5, 0;
	@%p6 bra 	BB0_5;

	shl.b64 	%rd24, %rd2, 4;
	add.s64 	%rd25, %rd1, %rd24;
	st.global.v4.f32 	[%rd25], {%f5, %f4, %f3, %f68};
	bra.uni 	BB0_6;

BB0_5:
	shl.b64 	%rd26, %rd2, 3;
	add.s64 	%rd27, %rd1, %rd26;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f68;
	mov.b16 	%rs1, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f3;
	mov.b16 	%rs2, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f4;
	mov.b16 	%rs3, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f5;
	mov.b16 	%rs4, %temp;
}
	st.global.v4.u16 	[%rd27], {%rs4, %rs3, %rs2, %rs1};

BB0_6:
	ret;
}


