//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Fri Jul 25 04:36:16 2014 (1406288176)
// Cuda compilation tools, release 6.5, V6.5.13
//

.version 4.1
.target sm_30
.address_size 64

.global .texref texture0_RECT;
// ShaderKernel_fxDay2NiteH$__cuda_local_var_180678_471_non_const_p_local has been demoted

.visible .entry ShaderKernel_fxDay2NiteH(
	.param .u64 ShaderKernel_fxDay2NiteH_param_0,
	.param .u32 ShaderKernel_fxDay2NiteH_param_1,
	.param .u32 ShaderKernel_fxDay2NiteH_param_2,
	.param .u32 ShaderKernel_fxDay2NiteH_param_3,
	.param .u32 ShaderKernel_fxDay2NiteH_param_4,
	.param .u64 ShaderKernel_fxDay2NiteH_param_5,
	.param .u64 ShaderKernel_fxDay2NiteH_param_6
)
{
	.reg .pred 	%p<8>;
	.reg .s16 	%rs<4>;
	.reg .s32 	%r<14>;
	.reg .f32 	%f<229>;
	.reg .s64 	%rd<32>;
	// demoted variable
	.shared .align 16 .b8 ShaderKernel_fxDay2NiteH$__cuda_local_var_180678_471_non_const_p_local[96];

	ld.param.u64 	%rd4, [ShaderKernel_fxDay2NiteH_param_0];
	ld.param.u32 	%r4, [ShaderKernel_fxDay2NiteH_param_1];
	ld.param.u32 	%r5, [ShaderKernel_fxDay2NiteH_param_2];
	ld.param.u32 	%r6, [ShaderKernel_fxDay2NiteH_param_3];
	ld.param.u32 	%r7, [ShaderKernel_fxDay2NiteH_param_4];
	ld.param.u64 	%rd3, [ShaderKernel_fxDay2NiteH_param_5];
	cvta.to.global.u64 	%rd1, %rd4;
	mov.u32 	%r8, %ntid.x;
	mov.u32 	%r9, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r8, %r9, %r1;
	mov.u32 	%r10, %ntid.y;
	mov.u32 	%r11, %ctaid.y;
	mov.u32 	%r12, %tid.y;
	mad.lo.s32 	%r3, %r10, %r11, %r12;
	setp.lt.s32	%p1, %r2, %r6;
	setp.lt.s32	%p2, %r3, %r7;
	and.pred  	%p3, %p1, %p2;
	@!%p3 bra 	BB0_6;
	bra.uni 	BB0_1;

BB0_1:
	setp.gt.u32	%p4, %r1, 5;
	@%p4 bra 	BB0_3;

	cvta.to.global.u64 	%rd5, %rd3;
	mul.wide.u32 	%rd6, %r1, 16;
	mov.u64 	%rd7, ShaderKernel_fxDay2NiteH$__cuda_local_var_180678_471_non_const_p_local;
	add.s64 	%rd8, %rd7, %rd6;
	add.s64 	%rd9, %rd5, %rd6;
	ld.global.v4.f32 	{%f5, %f6, %f7, %f8}, [%rd9];
	st.shared.v4.f32 	[%rd8], {%f5, %f6, %f7, %f8};

BB0_3:
	cvt.rn.f32.s32	%f13, %r2;
	add.ftz.f32 	%f1, %f13, 0f3F000000;
	cvt.rn.f32.s32	%f14, %r3;
	add.ftz.f32 	%f2, %f14, 0f3F000000;
	bar.sync 	0;
	// inline asm
	tex.2d.v4.f32.f32 {%f15, %f16, %f17, %f18}, [texture0_RECT, {%f1, %f2}];
	// inline asm
	add.ftz.f32 	%f68, %f2, 0f00000000;
	add.ftz.f32 	%f25, %f1, 0f3F800000;
	mov.f32 	%f69, 0f3F800000;
	// inline asm
	tex.2d.v4.f32.f32 {%f21, %f22, %f23, %f24}, [texture0_RECT, {%f25, %f68}];
	// inline asm
	ld.shared.v2.f32 	{%f70, %f71}, [ShaderKernel_fxDay2NiteH$__cuda_local_var_180678_471_non_const_p_local];
	fma.rn.ftz.f32 	%f73, %f23, %f70, %f17;
	fma.rn.ftz.f32 	%f74, %f22, %f70, %f16;
	fma.rn.ftz.f32 	%f75, %f21, %f70, %f15;
	fma.rn.ftz.f32 	%f77, %f23, %f71, %f17;
	fma.rn.ftz.f32 	%f78, %f22, %f71, %f16;
	fma.rn.ftz.f32 	%f79, %f21, %f71, %f15;
	add.ftz.f32 	%f31, %f1, 0fBF800000;
	// inline asm
	tex.2d.v4.f32.f32 {%f27, %f28, %f29, %f30}, [texture0_RECT, {%f31, %f68}];
	// inline asm
	fma.rn.ftz.f32 	%f80, %f29, %f70, %f73;
	fma.rn.ftz.f32 	%f81, %f28, %f70, %f74;
	fma.rn.ftz.f32 	%f82, %f27, %f70, %f75;
	fma.rn.ftz.f32 	%f83, %f29, %f71, %f77;
	fma.rn.ftz.f32 	%f84, %f28, %f71, %f78;
	fma.rn.ftz.f32 	%f85, %f27, %f71, %f79;
	add.ftz.f32 	%f37, %f1, 0f40000000;
	// inline asm
	tex.2d.v4.f32.f32 {%f33, %f34, %f35, %f36}, [texture0_RECT, {%f37, %f68}];
	// inline asm
	ld.shared.v2.f32 	{%f86, %f87}, [ShaderKernel_fxDay2NiteH$__cuda_local_var_180678_471_non_const_p_local+16];
	fma.rn.ftz.f32 	%f89, %f35, %f86, %f80;
	fma.rn.ftz.f32 	%f90, %f34, %f86, %f81;
	fma.rn.ftz.f32 	%f91, %f33, %f86, %f82;
	fma.rn.ftz.f32 	%f93, %f35, %f87, %f83;
	fma.rn.ftz.f32 	%f94, %f34, %f87, %f84;
	fma.rn.ftz.f32 	%f95, %f33, %f87, %f85;
	add.ftz.f32 	%f43, %f1, 0fC0000000;
	// inline asm
	tex.2d.v4.f32.f32 {%f39, %f40, %f41, %f42}, [texture0_RECT, {%f43, %f68}];
	// inline asm
	fma.rn.ftz.f32 	%f96, %f41, %f86, %f89;
	fma.rn.ftz.f32 	%f97, %f40, %f86, %f90;
	fma.rn.ftz.f32 	%f98, %f39, %f86, %f91;
	fma.rn.ftz.f32 	%f99, %f41, %f87, %f93;
	fma.rn.ftz.f32 	%f100, %f40, %f87, %f94;
	fma.rn.ftz.f32 	%f101, %f39, %f87, %f95;
	add.ftz.f32 	%f49, %f1, 0f40400000;
	// inline asm
	tex.2d.v4.f32.f32 {%f45, %f46, %f47, %f48}, [texture0_RECT, {%f49, %f68}];
	// inline asm
	ld.shared.v2.f32 	{%f102, %f103}, [ShaderKernel_fxDay2NiteH$__cuda_local_var_180678_471_non_const_p_local+32];
	fma.rn.ftz.f32 	%f105, %f47, %f102, %f96;
	fma.rn.ftz.f32 	%f106, %f46, %f102, %f97;
	fma.rn.ftz.f32 	%f107, %f45, %f102, %f98;
	fma.rn.ftz.f32 	%f109, %f47, %f103, %f99;
	fma.rn.ftz.f32 	%f110, %f46, %f103, %f100;
	fma.rn.ftz.f32 	%f111, %f45, %f103, %f101;
	add.ftz.f32 	%f55, %f1, 0fC0400000;
	// inline asm
	tex.2d.v4.f32.f32 {%f51, %f52, %f53, %f54}, [texture0_RECT, {%f55, %f68}];
	// inline asm
	fma.rn.ftz.f32 	%f112, %f53, %f102, %f105;
	fma.rn.ftz.f32 	%f113, %f52, %f102, %f106;
	fma.rn.ftz.f32 	%f114, %f51, %f102, %f107;
	fma.rn.ftz.f32 	%f115, %f53, %f103, %f109;
	fma.rn.ftz.f32 	%f116, %f52, %f103, %f110;
	fma.rn.ftz.f32 	%f117, %f51, %f103, %f111;
	add.ftz.f32 	%f61, %f1, 0f40800000;
	// inline asm
	tex.2d.v4.f32.f32 {%f57, %f58, %f59, %f60}, [texture0_RECT, {%f61, %f68}];
	// inline asm
	ld.shared.v2.f32 	{%f118, %f119}, [ShaderKernel_fxDay2NiteH$__cuda_local_var_180678_471_non_const_p_local+48];
	fma.rn.ftz.f32 	%f121, %f59, %f118, %f112;
	fma.rn.ftz.f32 	%f122, %f58, %f118, %f113;
	fma.rn.ftz.f32 	%f123, %f57, %f118, %f114;
	fma.rn.ftz.f32 	%f125, %f59, %f119, %f115;
	fma.rn.ftz.f32 	%f126, %f58, %f119, %f116;
	fma.rn.ftz.f32 	%f127, %f57, %f119, %f117;
	add.ftz.f32 	%f67, %f1, 0fC0800000;
	// inline asm
	tex.2d.v4.f32.f32 {%f63, %f64, %f65, %f66}, [texture0_RECT, {%f67, %f68}];
	// inline asm
	fma.rn.ftz.f32 	%f128, %f65, %f118, %f121;
	fma.rn.ftz.f32 	%f129, %f64, %f118, %f122;
	fma.rn.ftz.f32 	%f130, %f63, %f118, %f123;
	fma.rn.ftz.f32 	%f131, %f65, %f119, %f125;
	fma.rn.ftz.f32 	%f132, %f64, %f119, %f126;
	fma.rn.ftz.f32 	%f133, %f63, %f119, %f127;
	ld.shared.v2.f32 	{%f134, %f135}, [ShaderKernel_fxDay2NiteH$__cuda_local_var_180678_471_non_const_p_local+64];
	mul.ftz.f32 	%f137, %f134, %f128;
	mul.ftz.f32 	%f138, %f134, %f129;
	mul.ftz.f32 	%f139, %f134, %f130;
	mul.ftz.f32 	%f141, %f135, %f131;
	mul.ftz.f32 	%f142, %f135, %f132;
	mul.ftz.f32 	%f143, %f135, %f133;
	mul.ftz.f32 	%f144, %f138, 0f3F000000;
	fma.rn.ftz.f32 	%f145, %f137, 0f3F000000, %f144;
	fma.rn.ftz.f32 	%f146, %f139, 0f3F000000, %f145;
	mul.ftz.f32 	%f147, %f142, 0f3F000000;
	fma.rn.ftz.f32 	%f148, %f141, 0f3F000000, %f147;
	fma.rn.ftz.f32 	%f149, %f143, 0f3F000000, %f148;
	mul.ftz.f32 	%f150, %f137, %f146;
	mul.ftz.f32 	%f151, %f138, %f146;
	mul.ftz.f32 	%f152, %f139, %f146;
	mul.ftz.f32 	%f153, %f141, %f149;
	mul.ftz.f32 	%f154, %f142, %f149;
	mul.ftz.f32 	%f155, %f143, %f149;
	mul.ftz.f32 	%f156, %f146, %f146;
	mul.ftz.f32 	%f157, %f149, %f149;
	sub.ftz.f32 	%f158, %f150, %f156;
	sub.ftz.f32 	%f159, %f151, %f156;
	sub.ftz.f32 	%f160, %f152, %f156;
	fma.rn.ftz.f32 	%f161, %f158, 0f3F400000, %f156;
	fma.rn.ftz.f32 	%f162, %f159, 0f3F400000, %f156;
	fma.rn.ftz.f32 	%f163, %f160, 0f3F400000, %f156;
	add.ftz.f32 	%f164, %f161, %f161;
	add.ftz.f32 	%f165, %f162, %f162;
	add.ftz.f32 	%f166, %f163, %f163;
	ld.shared.v4.f32 	{%f167, %f168, %f169, %f170}, [ShaderKernel_fxDay2NiteH$__cuda_local_var_180678_471_non_const_p_local+80];
	sub.ftz.f32 	%f172, %f69, %f167;
	mul.ftz.f32 	%f173, %f172, %f137;
	fma.rn.ftz.f32 	%f174, %f167, %f164, %f173;
	sub.ftz.f32 	%f176, %f69, %f168;
	mul.ftz.f32 	%f177, %f176, %f138;
	fma.rn.ftz.f32 	%f178, %f168, %f165, %f177;
	sub.ftz.f32 	%f180, %f69, %f169;
	mul.ftz.f32 	%f181, %f180, %f139;
	fma.rn.ftz.f32 	%f182, %f169, %f166, %f181;
	sub.ftz.f32 	%f183, %f153, %f157;
	sub.ftz.f32 	%f184, %f154, %f157;
	sub.ftz.f32 	%f185, %f155, %f157;
	fma.rn.ftz.f32 	%f186, %f183, 0f3F400000, %f157;
	fma.rn.ftz.f32 	%f187, %f184, 0f3F400000, %f157;
	fma.rn.ftz.f32 	%f188, %f185, 0f3F400000, %f157;
	add.ftz.f32 	%f189, %f186, %f186;
	add.ftz.f32 	%f190, %f187, %f187;
	add.ftz.f32 	%f191, %f188, %f188;
	mul.ftz.f32 	%f192, %f172, %f141;
	fma.rn.ftz.f32 	%f193, %f167, %f189, %f192;
	mul.ftz.f32 	%f194, %f176, %f142;
	fma.rn.ftz.f32 	%f195, %f168, %f190, %f194;
	mul.ftz.f32 	%f196, %f180, %f143;
	fma.rn.ftz.f32 	%f197, %f169, %f191, %f196;
	mul.ftz.f32 	%f198, %f178, 0f3EA617C2;
	fma.rn.ftz.f32 	%f199, %f174, 0f3F03D07D, %f198;
	fma.rn.ftz.f32 	%f200, %f182, 0f3E248E8A, %f199;
	mul.ftz.f32 	%f201, %f178, 0f3F2B9F56;
	fma.rn.ftz.f32 	%f202, %f174, 0f3E87E282, %f201;
	fma.rn.ftz.f32 	%f203, %f182, 0f3D837B4A, %f202;
	mul.ftz.f32 	%f204, %f178, 0f3DFF9724;
	fma.rn.ftz.f32 	%f205, %f174, 0f3CCB295F, %f204;
	fma.rn.ftz.f32 	%f206, %f182, 0f3F59B3D0, %f205;
	mul.ftz.f32 	%f207, %f195, 0f3EA617C2;
	fma.rn.ftz.f32 	%f208, %f193, 0f3F03D07D, %f207;
	fma.rn.ftz.f32 	%f209, %f197, 0f3E248E8A, %f208;
	mul.ftz.f32 	%f210, %f195, 0f3F2B9F56;
	fma.rn.ftz.f32 	%f211, %f193, 0f3E87E282, %f210;
	fma.rn.ftz.f32 	%f212, %f197, 0f3D837B4A, %f211;
	mul.ftz.f32 	%f213, %f195, 0f3DFF9724;
	fma.rn.ftz.f32 	%f214, %f193, 0f3CCB295F, %f213;
	fma.rn.ftz.f32 	%f215, %f197, 0f3F59B3D0, %f214;
	setp.gt.ftz.f32	%p5, %f200, 0f3A83126F;
	selp.f32	%f216, %f200, 0f3A83126F, %p5;
	setp.gt.ftz.f32	%p6, %f209, 0f3A83126F;
	selp.f32	%f217, %f209, 0f3A83126F, %p6;
	add.ftz.f32 	%f218, %f203, %f206;
	add.ftz.f32 	%f219, %f212, %f215;
	div.rn.ftz.f32 	%f220, %f69, %f216;
	div.rn.ftz.f32 	%f221, %f69, %f217;
	fma.rn.ftz.f32 	%f222, %f220, %f218, 0f3F800000;
	fma.rn.ftz.f32 	%f223, %f221, %f219, 0f3F800000;
	fma.rn.ftz.f32 	%f224, %f222, 0f3FAA3D71, 0fBFD70A3D;
	fma.rn.ftz.f32 	%f225, %f223, 0f3FAA3D71, 0fBFD70A3D;
	mul.ftz.f32 	%f3, %f224, %f203;
	mul.ftz.f32 	%f4, %f225, %f212;
	mad.lo.s32 	%r13, %r3, %r4, %r2;
	cvt.s64.s32	%rd2, %r13;
	setp.eq.s32	%p7, %r5, 0;
	@%p7 bra 	BB0_5;

	shl.b64 	%rd28, %rd2, 4;
	add.s64 	%rd29, %rd1, %rd28;
	st.global.v4.f32 	[%rd29], {%f226, %f4, %f3, %f227};
	bra.uni 	BB0_6;

BB0_5:
	shl.b64 	%rd30, %rd2, 3;
	add.s64 	%rd31, %rd1, %rd30;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f3;
	mov.b16 	%rs1, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f4;
	mov.b16 	%rs2, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f228;
	mov.b16 	%rs3, %temp;
}
	st.global.v4.u16 	[%rd31], {%rs3, %rs2, %rs1, %rs3};

BB0_6:
	ret;
}


